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Ioana Ciornei0bb29b22018-07-31 12:02:47 -05001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002/* Copyright 2014-2016 Freescale Semiconductor Inc.
Ioana Ciornei48c04812020-04-22 15:05:10 +03003 * Copyright 2016-2020 NXP
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004 */
5#include <linux/init.h>
6#include <linux/module.h>
7#include <linux/platform_device.h>
8#include <linux/etherdevice.h>
9#include <linux/of_net.h>
10#include <linux/interrupt.h>
11#include <linux/msi.h>
12#include <linux/kthread.h>
Ioana Radulescu08eb2392017-05-24 07:13:27 -050013#include <linux/iommu.h>
Ioana Radulescu859f9982018-04-26 18:23:47 +080014#include <linux/net_tstamp.h>
Bogdan Purcareata6bd067c2018-02-05 08:07:42 -060015#include <linux/fsl/mc.h>
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +000016#include <linux/bpf.h>
17#include <linux/bpf_trace.h>
Yangbo Lud21c7842020-09-18 17:07:59 +080018#include <linux/fsl/ptp_qoriq.h>
Ioana Ciornei3657cda2020-07-21 19:38:25 +030019#include <net/pkt_cls.h>
Ioana Radulescu859f9982018-04-26 18:23:47 +080020#include <net/sock.h>
21
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050022#include "dpaa2-eth.h"
23
Ioana Radulescu56361872017-04-28 04:50:32 -050024/* CREATE_TRACE_POINTS only needs to be defined once. Other dpa files
25 * using trace events only need to #include <trace/events/sched.h>
26 */
27#define CREATE_TRACE_POINTS
28#include "dpaa2-eth-trace.h"
29
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050030MODULE_LICENSE("Dual BSD/GPL");
31MODULE_AUTHOR("Freescale Semiconductor, Inc");
32MODULE_DESCRIPTION("Freescale DPAA2 Ethernet Driver");
33
Yangbo Lud21c7842020-09-18 17:07:59 +080034struct ptp_qoriq *dpaa2_ptp;
35EXPORT_SYMBOL(dpaa2_ptp);
36
Ioana Radulescu08eb2392017-05-24 07:13:27 -050037static void *dpaa2_iova_to_virt(struct iommu_domain *domain,
38 dma_addr_t iova_addr)
39{
40 phys_addr_t phys_addr;
41
42 phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr;
43
44 return phys_to_virt(phys_addr);
45}
46
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +030047static void dpaa2_eth_validate_rx_csum(struct dpaa2_eth_priv *priv,
48 u32 fd_status,
49 struct sk_buff *skb)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050050{
51 skb_checksum_none_assert(skb);
52
53 /* HW checksum validation is disabled, nothing to do here */
54 if (!(priv->net_dev->features & NETIF_F_RXCSUM))
55 return;
56
57 /* Read checksum validation bits */
58 if (!((fd_status & DPAA2_FAS_L3CV) &&
59 (fd_status & DPAA2_FAS_L4CV)))
60 return;
61
62 /* Inform the stack there's no need to compute L3/L4 csum anymore */
63 skb->ip_summed = CHECKSUM_UNNECESSARY;
64}
65
66/* Free a received FD.
67 * Not to be used for Tx conf FDs or on any other paths.
68 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +030069static void dpaa2_eth_free_rx_fd(struct dpaa2_eth_priv *priv,
70 const struct dpaa2_fd *fd,
71 void *vaddr)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050072{
73 struct device *dev = priv->net_dev->dev.parent;
74 dma_addr_t addr = dpaa2_fd_get_addr(fd);
75 u8 fd_format = dpaa2_fd_get_format(fd);
76 struct dpaa2_sg_entry *sgt;
77 void *sg_vaddr;
78 int i;
79
80 /* If single buffer frame, just free the data buffer */
81 if (fd_format == dpaa2_fd_single)
82 goto free_buf;
83 else if (fd_format != dpaa2_fd_sg)
84 /* We don't support any other format */
85 return;
86
Ioana Radulescu729d79b2017-10-11 08:29:48 -050087 /* For S/G frames, we first need to free all SG entries
88 * except the first one, which was taken care of already
89 */
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050090 sgt = vaddr + dpaa2_fd_get_offset(fd);
Ioana Radulescu729d79b2017-10-11 08:29:48 -050091 for (i = 1; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050092 addr = dpaa2_sg_get_addr(&sgt[i]);
Ioana Radulescu08eb2392017-05-24 07:13:27 -050093 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +030094 dma_unmap_page(dev, addr, priv->rx_buf_size,
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +000095 DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050096
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +000097 free_pages((unsigned long)sg_vaddr, 0);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -050098 if (dpaa2_sg_is_final(&sgt[i]))
99 break;
100 }
101
102free_buf:
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000103 free_pages((unsigned long)vaddr, 0);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500104}
105
106/* Build a linear skb based on a single-buffer frame descriptor */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300107static struct sk_buff *dpaa2_eth_build_linear_skb(struct dpaa2_eth_channel *ch,
108 const struct dpaa2_fd *fd,
109 void *fd_vaddr)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500110{
111 struct sk_buff *skb = NULL;
112 u16 fd_offset = dpaa2_fd_get_offset(fd);
113 u32 fd_length = dpaa2_fd_get_len(fd);
114
Ioana Radulescucbb3ea42017-10-11 08:29:44 -0500115 ch->buf_count--;
116
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000117 skb = build_skb(fd_vaddr, DPAA2_ETH_RX_BUF_RAW_SIZE);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500118 if (unlikely(!skb))
119 return NULL;
120
121 skb_reserve(skb, fd_offset);
122 skb_put(skb, fd_length);
123
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500124 return skb;
125}
126
127/* Build a non linear (fragmented) skb based on a S/G table */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300128static struct sk_buff *dpaa2_eth_build_frag_skb(struct dpaa2_eth_priv *priv,
129 struct dpaa2_eth_channel *ch,
130 struct dpaa2_sg_entry *sgt)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500131{
132 struct sk_buff *skb = NULL;
133 struct device *dev = priv->net_dev->dev.parent;
134 void *sg_vaddr;
135 dma_addr_t sg_addr;
136 u16 sg_offset;
137 u32 sg_length;
138 struct page *page, *head_page;
139 int page_offset;
140 int i;
141
142 for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
143 struct dpaa2_sg_entry *sge = &sgt[i];
144
145 /* NOTE: We only support SG entries in dpaa2_sg_single format,
146 * but this is the only format we may receive from HW anyway
147 */
148
149 /* Get the address and length from the S/G entry */
150 sg_addr = dpaa2_sg_get_addr(sge);
Ioana Radulescu08eb2392017-05-24 07:13:27 -0500151 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, sg_addr);
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +0300152 dma_unmap_page(dev, sg_addr, priv->rx_buf_size,
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000153 DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500154
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500155 sg_length = dpaa2_sg_get_len(sge);
156
157 if (i == 0) {
158 /* We build the skb around the first data buffer */
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000159 skb = build_skb(sg_vaddr, DPAA2_ETH_RX_BUF_RAW_SIZE);
Ioana Radulescucbb3ea42017-10-11 08:29:44 -0500160 if (unlikely(!skb)) {
Ioana Radulescu729d79b2017-10-11 08:29:48 -0500161 /* Free the first SG entry now, since we already
162 * unmapped it and obtained the virtual address
163 */
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000164 free_pages((unsigned long)sg_vaddr, 0);
Ioana Radulescu729d79b2017-10-11 08:29:48 -0500165
Ioana Radulescucbb3ea42017-10-11 08:29:44 -0500166 /* We still need to subtract the buffers used
167 * by this FD from our software counter
168 */
169 while (!dpaa2_sg_is_final(&sgt[i]) &&
170 i < DPAA2_ETH_MAX_SG_ENTRIES)
171 i++;
172 break;
173 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500174
175 sg_offset = dpaa2_sg_get_offset(sge);
176 skb_reserve(skb, sg_offset);
177 skb_put(skb, sg_length);
178 } else {
179 /* Rest of the data buffers are stored as skb frags */
180 page = virt_to_page(sg_vaddr);
181 head_page = virt_to_head_page(sg_vaddr);
182
183 /* Offset in page (which may be compound).
184 * Data in subsequent SG entries is stored from the
185 * beginning of the buffer, so we don't need to add the
186 * sg_offset.
187 */
188 page_offset = ((unsigned long)sg_vaddr &
189 (PAGE_SIZE - 1)) +
190 (page_address(page) - page_address(head_page));
191
192 skb_add_rx_frag(skb, i - 1, head_page, page_offset,
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +0300193 sg_length, priv->rx_buf_size);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500194 }
195
196 if (dpaa2_sg_is_final(sge))
197 break;
198 }
199
Ioana Radulescub63baf72017-10-11 08:29:45 -0500200 WARN_ONCE(i == DPAA2_ETH_MAX_SG_ENTRIES, "Final bit not set in SGT");
201
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500202 /* Count all data buffers + SG table buffer */
203 ch->buf_count -= i + 2;
204
205 return skb;
206}
207
Ioana Ciocoi Radulescu569375f2018-11-26 16:27:31 +0000208/* Free buffers acquired from the buffer pool or which were meant to
209 * be released in the pool
210 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300211static void dpaa2_eth_free_bufs(struct dpaa2_eth_priv *priv, u64 *buf_array,
212 int count)
Ioana Ciocoi Radulescu569375f2018-11-26 16:27:31 +0000213{
214 struct device *dev = priv->net_dev->dev.parent;
215 void *vaddr;
216 int i;
217
218 for (i = 0; i < count; i++) {
219 vaddr = dpaa2_iova_to_virt(priv->iommu_domain, buf_array[i]);
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +0300220 dma_unmap_page(dev, buf_array[i], priv->rx_buf_size,
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000221 DMA_BIDIRECTIONAL);
222 free_pages((unsigned long)vaddr, 0);
Ioana Ciocoi Radulescu569375f2018-11-26 16:27:31 +0000223 }
224}
225
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300226static void dpaa2_eth_xdp_release_buf(struct dpaa2_eth_priv *priv,
227 struct dpaa2_eth_channel *ch,
228 dma_addr_t addr)
Ioana Ciocoi Radulescu5d39dc22018-11-26 16:27:31 +0000229{
Ioana Radulescuef17bd72019-10-07 14:38:28 +0300230 int retries = 0;
Ioana Ciocoi Radulescu5d39dc22018-11-26 16:27:31 +0000231 int err;
232
233 ch->xdp.drop_bufs[ch->xdp.drop_cnt++] = addr;
234 if (ch->xdp.drop_cnt < DPAA2_ETH_BUFS_PER_CMD)
235 return;
236
237 while ((err = dpaa2_io_service_release(ch->dpio, priv->bpid,
238 ch->xdp.drop_bufs,
Ioana Radulescuef17bd72019-10-07 14:38:28 +0300239 ch->xdp.drop_cnt)) == -EBUSY) {
240 if (retries++ >= DPAA2_ETH_SWP_BUSY_RETRIES)
241 break;
Ioana Ciocoi Radulescu5d39dc22018-11-26 16:27:31 +0000242 cpu_relax();
Ioana Radulescuef17bd72019-10-07 14:38:28 +0300243 }
Ioana Ciocoi Radulescu5d39dc22018-11-26 16:27:31 +0000244
245 if (err) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300246 dpaa2_eth_free_bufs(priv, ch->xdp.drop_bufs, ch->xdp.drop_cnt);
Ioana Ciocoi Radulescu5d39dc22018-11-26 16:27:31 +0000247 ch->buf_count -= ch->xdp.drop_cnt;
248 }
249
250 ch->xdp.drop_cnt = 0;
251}
252
Ioana Ciornei38c440b2020-05-06 20:47:17 +0300253static int dpaa2_eth_xdp_flush(struct dpaa2_eth_priv *priv,
254 struct dpaa2_eth_fq *fq,
255 struct dpaa2_eth_xdp_fds *xdp_fds)
256{
257 int total_enqueued = 0, retries = 0, enqueued;
258 struct dpaa2_eth_drv_stats *percpu_extras;
259 int num_fds, err, max_retries;
260 struct dpaa2_fd *fds;
261
262 percpu_extras = this_cpu_ptr(priv->percpu_extras);
263
264 /* try to enqueue all the FDs until the max number of retries is hit */
265 fds = xdp_fds->fds;
266 num_fds = xdp_fds->num;
267 max_retries = num_fds * DPAA2_ETH_ENQUEUE_RETRIES;
268 while (total_enqueued < num_fds && retries < max_retries) {
269 err = priv->enqueue(priv, fq, &fds[total_enqueued],
270 0, num_fds - total_enqueued, &enqueued);
271 if (err == -EBUSY) {
272 percpu_extras->tx_portal_busy += ++retries;
273 continue;
274 }
275 total_enqueued += enqueued;
276 }
277 xdp_fds->num = 0;
278
279 return total_enqueued;
280}
281
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300282static void dpaa2_eth_xdp_tx_flush(struct dpaa2_eth_priv *priv,
283 struct dpaa2_eth_channel *ch,
284 struct dpaa2_eth_fq *fq)
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000285{
Ioana Ciornei74a1c052020-05-13 16:55:46 +0300286 struct rtnl_link_stats64 *percpu_stats;
287 struct dpaa2_fd *fds;
288 int enqueued, i;
289
290 percpu_stats = this_cpu_ptr(priv->percpu_stats);
291
292 // enqueue the array of XDP_TX frames
293 enqueued = dpaa2_eth_xdp_flush(priv, fq, &fq->xdp_tx_fds);
294
295 /* update statistics */
296 percpu_stats->tx_packets += enqueued;
297 fds = fq->xdp_tx_fds.fds;
298 for (i = 0; i < enqueued; i++) {
299 percpu_stats->tx_bytes += dpaa2_fd_get_len(&fds[i]);
300 ch->stats.xdp_tx++;
301 }
302 for (i = enqueued; i < fq->xdp_tx_fds.num; i++) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300303 dpaa2_eth_xdp_release_buf(priv, ch, dpaa2_fd_get_addr(&fds[i]));
Ioana Ciornei74a1c052020-05-13 16:55:46 +0300304 percpu_stats->tx_errors++;
305 ch->stats.xdp_tx_err++;
306 }
307 fq->xdp_tx_fds.num = 0;
308}
309
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300310static void dpaa2_eth_xdp_enqueue(struct dpaa2_eth_priv *priv,
311 struct dpaa2_eth_channel *ch,
312 struct dpaa2_fd *fd,
313 void *buf_start, u16 queue_id)
Ioana Ciornei74a1c052020-05-13 16:55:46 +0300314{
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000315 struct dpaa2_faead *faead;
Ioana Ciornei74a1c052020-05-13 16:55:46 +0300316 struct dpaa2_fd *dest_fd;
317 struct dpaa2_eth_fq *fq;
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000318 u32 ctrl, frc;
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000319
320 /* Mark the egress frame hardware annotation area as valid */
321 frc = dpaa2_fd_get_frc(fd);
322 dpaa2_fd_set_frc(fd, frc | DPAA2_FD_FRC_FAEADV);
323 dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_ASAL);
324
325 /* Instruct hardware to release the FD buffer directly into
326 * the buffer pool once transmission is completed, instead of
327 * sending a Tx confirmation frame to us
328 */
329 ctrl = DPAA2_FAEAD_A4V | DPAA2_FAEAD_A2V | DPAA2_FAEAD_EBDDV;
330 faead = dpaa2_get_faead(buf_start, false);
331 faead->ctrl = cpu_to_le32(ctrl);
332 faead->conf_fqid = 0;
333
334 fq = &priv->fq[queue_id];
Ioana Ciornei74a1c052020-05-13 16:55:46 +0300335 dest_fd = &fq->xdp_tx_fds.fds[fq->xdp_tx_fds.num++];
336 memcpy(dest_fd, fd, sizeof(*dest_fd));
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000337
Ioana Ciornei74a1c052020-05-13 16:55:46 +0300338 if (fq->xdp_tx_fds.num < DEV_MAP_BULK_SIZE)
339 return;
340
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300341 dpaa2_eth_xdp_tx_flush(priv, ch, fq);
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000342}
343
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300344static u32 dpaa2_eth_run_xdp(struct dpaa2_eth_priv *priv,
345 struct dpaa2_eth_channel *ch,
346 struct dpaa2_eth_fq *rx_fq,
347 struct dpaa2_fd *fd, void *vaddr)
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000348{
Ioana Ciocoi Radulescu5d39dc22018-11-26 16:27:31 +0000349 dma_addr_t addr = dpaa2_fd_get_addr(fd);
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000350 struct bpf_prog *xdp_prog;
351 struct xdp_buff xdp;
352 u32 xdp_act = XDP_PASS;
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000353 int err;
354
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000355 rcu_read_lock();
356
357 xdp_prog = READ_ONCE(ch->xdp.prog);
358 if (!xdp_prog)
359 goto out;
360
361 xdp.data = vaddr + dpaa2_fd_get_offset(fd);
362 xdp.data_end = xdp.data + dpaa2_fd_get_len(fd);
Ioana Ciocoi Radulescu7b1eea12018-11-26 16:27:30 +0000363 xdp.data_hard_start = xdp.data - XDP_PACKET_HEADROOM;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000364 xdp_set_data_meta_invalid(&xdp);
Ioana Radulescud678be12019-03-01 17:47:24 +0000365 xdp.rxq = &ch->xdp_rxq;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000366
Jesper Dangaard Brouer4a9b0522020-05-14 12:49:53 +0200367 xdp.frame_sz = DPAA2_ETH_RX_BUF_RAW_SIZE -
368 (dpaa2_fd_get_offset(fd) - XDP_PACKET_HEADROOM);
369
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000370 xdp_act = bpf_prog_run_xdp(xdp_prog, &xdp);
371
Ioana Ciocoi Radulescu7b1eea12018-11-26 16:27:30 +0000372 /* xdp.data pointer may have changed */
373 dpaa2_fd_set_offset(fd, xdp.data - vaddr);
374 dpaa2_fd_set_len(fd, xdp.data_end - xdp.data);
375
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000376 switch (xdp_act) {
377 case XDP_PASS:
378 break;
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000379 case XDP_TX:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300380 dpaa2_eth_xdp_enqueue(priv, ch, fd, vaddr, rx_fq->flowid);
Ioana Ciocoi Radulescu99e43522018-11-26 16:27:33 +0000381 break;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000382 default:
383 bpf_warn_invalid_xdp_action(xdp_act);
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -0500384 fallthrough;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000385 case XDP_ABORTED:
386 trace_xdp_exception(priv->net_dev, xdp_prog, xdp_act);
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -0500387 fallthrough;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000388 case XDP_DROP:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300389 dpaa2_eth_xdp_release_buf(priv, ch, addr);
Ioana Ciocoi Radulescua4a7b762018-11-26 16:27:34 +0000390 ch->stats.xdp_drop++;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000391 break;
Ioana Radulescud678be12019-03-01 17:47:24 +0000392 case XDP_REDIRECT:
393 dma_unmap_page(priv->net_dev->dev.parent, addr,
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +0300394 priv->rx_buf_size, DMA_BIDIRECTIONAL);
Ioana Radulescud678be12019-03-01 17:47:24 +0000395 ch->buf_count--;
Jesper Dangaard Brouer4a9b0522020-05-14 12:49:53 +0200396
397 /* Allow redirect use of full headroom */
Ioana Radulescud678be12019-03-01 17:47:24 +0000398 xdp.data_hard_start = vaddr;
Jesper Dangaard Brouer4a9b0522020-05-14 12:49:53 +0200399 xdp.frame_sz = DPAA2_ETH_RX_BUF_RAW_SIZE;
400
Ioana Radulescud678be12019-03-01 17:47:24 +0000401 err = xdp_do_redirect(priv->net_dev, &xdp, xdp_prog);
402 if (unlikely(err))
403 ch->stats.xdp_drop++;
404 else
405 ch->stats.xdp_redirect++;
406 break;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000407 }
408
Ioana Radulescud678be12019-03-01 17:47:24 +0000409 ch->xdp.res |= xdp_act;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000410out:
411 rcu_read_unlock();
412 return xdp_act;
413}
414
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500415/* Main Rx frame processing routine */
416static void dpaa2_eth_rx(struct dpaa2_eth_priv *priv,
417 struct dpaa2_eth_channel *ch,
418 const struct dpaa2_fd *fd,
Ioana Ciocoi Radulescudbcdf722018-11-14 11:48:35 +0000419 struct dpaa2_eth_fq *fq)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500420{
421 dma_addr_t addr = dpaa2_fd_get_addr(fd);
422 u8 fd_format = dpaa2_fd_get_format(fd);
423 void *vaddr;
424 struct sk_buff *skb;
425 struct rtnl_link_stats64 *percpu_stats;
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500426 struct dpaa2_eth_drv_stats *percpu_extras;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500427 struct device *dev = priv->net_dev->dev.parent;
428 struct dpaa2_fas *fas;
Ioana Radulescud695e762017-06-06 10:00:35 -0500429 void *buf_data;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500430 u32 status = 0;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000431 u32 xdp_act;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500432
Ioana Radulescu56361872017-04-28 04:50:32 -0500433 /* Tracing point */
434 trace_dpaa2_rx_fd(priv->net_dev, fd);
435
Ioana Radulescu08eb2392017-05-24 07:13:27 -0500436 vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +0300437 dma_sync_single_for_cpu(dev, addr, priv->rx_buf_size,
Ioana Ciocoi Radulescu18c2e772018-11-26 16:27:32 +0000438 DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500439
Ioana Radulescu54ce8912017-12-08 06:47:53 -0600440 fas = dpaa2_get_fas(vaddr, false);
Ioana Radulescud695e762017-06-06 10:00:35 -0500441 prefetch(fas);
442 buf_data = vaddr + dpaa2_fd_get_offset(fd);
443 prefetch(buf_data);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500444
445 percpu_stats = this_cpu_ptr(priv->percpu_stats);
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500446 percpu_extras = this_cpu_ptr(priv->percpu_extras);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500447
448 if (fd_format == dpaa2_fd_single) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300449 xdp_act = dpaa2_eth_run_xdp(priv, ch, fq, (struct dpaa2_fd *)fd, vaddr);
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000450 if (xdp_act != XDP_PASS) {
451 percpu_stats->rx_packets++;
452 percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
453 return;
454 }
455
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +0300456 dma_unmap_page(dev, addr, priv->rx_buf_size,
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000457 DMA_BIDIRECTIONAL);
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300458 skb = dpaa2_eth_build_linear_skb(ch, fd, vaddr);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500459 } else if (fd_format == dpaa2_fd_sg) {
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +0000460 WARN_ON(priv->xdp_prog);
461
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +0300462 dma_unmap_page(dev, addr, priv->rx_buf_size,
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000463 DMA_BIDIRECTIONAL);
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300464 skb = dpaa2_eth_build_frag_skb(priv, ch, buf_data);
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +0000465 free_pages((unsigned long)vaddr, 0);
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500466 percpu_extras->rx_sg_frames++;
467 percpu_extras->rx_sg_bytes += dpaa2_fd_get_len(fd);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500468 } else {
469 /* We don't support any other format */
470 goto err_frame_format;
471 }
472
473 if (unlikely(!skb))
474 goto err_build_skb;
475
476 prefetch(skb->data);
477
Ioana Radulescu859f9982018-04-26 18:23:47 +0800478 /* Get the timestamp value */
479 if (priv->rx_tstamp) {
480 struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
481 __le64 *ts = dpaa2_get_ts(vaddr, false);
482 u64 ns;
483
484 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
485
486 ns = DPAA2_PTP_CLK_PERIOD_NS * le64_to_cpup(ts);
487 shhwtstamps->hwtstamp = ns_to_ktime(ns);
488 }
489
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500490 /* Check if we need to validate the L4 csum */
491 if (likely(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV)) {
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500492 status = le32_to_cpu(fas->status);
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300493 dpaa2_eth_validate_rx_csum(priv, status, skb);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500494 }
495
496 skb->protocol = eth_type_trans(skb, priv->net_dev);
Ioana Ciocoi Radulescudbcdf722018-11-14 11:48:35 +0000497 skb_record_rx_queue(skb, fq->flowid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500498
499 percpu_stats->rx_packets++;
500 percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
501
Ioana Ciornei0a25d922019-03-25 13:42:39 +0000502 list_add_tail(&skb->list, ch->rx_list);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500503
504 return;
505
506err_build_skb:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300507 dpaa2_eth_free_rx_fd(priv, fd, vaddr);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500508err_frame_format:
509 percpu_stats->rx_dropped++;
510}
511
512/* Consume all frames pull-dequeued into the store. This is the simplest way to
513 * make sure we don't accidentally issue another volatile dequeue which would
514 * overwrite (leak) frames already in the store.
515 *
516 * Observance of NAPI budget is not our concern, leaving that to the caller.
517 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300518static int dpaa2_eth_consume_frames(struct dpaa2_eth_channel *ch,
519 struct dpaa2_eth_fq **src)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500520{
521 struct dpaa2_eth_priv *priv = ch->priv;
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +0000522 struct dpaa2_eth_fq *fq = NULL;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500523 struct dpaa2_dq *dq;
524 const struct dpaa2_fd *fd;
Ioana Radulescuef17bd72019-10-07 14:38:28 +0300525 int cleaned = 0, retries = 0;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500526 int is_last;
527
528 do {
529 dq = dpaa2_io_store_next(ch->store, &is_last);
530 if (unlikely(!dq)) {
531 /* If we're here, we *must* have placed a
532 * volatile dequeue comnmand, so keep reading through
533 * the store until we get some sort of valid response
534 * token (either a valid frame or an "empty dequeue")
535 */
Ioana Radulescuef17bd72019-10-07 14:38:28 +0300536 if (retries++ >= DPAA2_ETH_SWP_BUSY_RETRIES) {
537 netdev_err_once(priv->net_dev,
538 "Unable to read a valid dequeue response\n");
539 return -ETIMEDOUT;
540 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500541 continue;
542 }
543
544 fd = dpaa2_dq_fd(dq);
Ioana Radulescu75c583a2018-02-26 10:28:06 -0600545 fq = (struct dpaa2_eth_fq *)(uintptr_t)dpaa2_dq_fqd_ctx(dq);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500546
Ioana Ciocoi Radulescudbcdf722018-11-14 11:48:35 +0000547 fq->consume(priv, ch, fd, fq);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500548 cleaned++;
Ioana Radulescuef17bd72019-10-07 14:38:28 +0300549 retries = 0;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500550 } while (!is_last);
551
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +0000552 if (!cleaned)
553 return 0;
554
555 fq->stats.frames += cleaned;
Ioana Ciornei460fd832020-04-24 12:33:18 +0300556 ch->stats.frames += cleaned;
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +0000557
558 /* A dequeue operation only pulls frames from a single queue
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +0000559 * into the store. Return the frame queue as an out param.
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +0000560 */
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +0000561 if (src)
562 *src = fq;
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +0000563
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500564 return cleaned;
565}
566
Ioana Radulescu859f9982018-04-26 18:23:47 +0800567/* Configure the egress frame annotation for timestamp update */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300568static void dpaa2_eth_enable_tx_tstamp(struct dpaa2_fd *fd, void *buf_start)
Ioana Radulescu859f9982018-04-26 18:23:47 +0800569{
570 struct dpaa2_faead *faead;
571 u32 ctrl, frc;
572
573 /* Mark the egress frame annotation area as valid */
574 frc = dpaa2_fd_get_frc(fd);
575 dpaa2_fd_set_frc(fd, frc | DPAA2_FD_FRC_FAEADV);
576
577 /* Set hardware annotation size */
578 ctrl = dpaa2_fd_get_ctrl(fd);
579 dpaa2_fd_set_ctrl(fd, ctrl | DPAA2_FD_CTRL_ASAL);
580
581 /* enable UPD (update prepanded data) bit in FAEAD field of
582 * hardware frame annotation area
583 */
584 ctrl = DPAA2_FAEAD_A2V | DPAA2_FAEAD_UPDV | DPAA2_FAEAD_UPD;
585 faead = dpaa2_get_faead(buf_start, true);
586 faead->ctrl = cpu_to_le32(ctrl);
587}
588
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500589/* Create a frame descriptor based on a fragmented skb */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300590static int dpaa2_eth_build_sg_fd(struct dpaa2_eth_priv *priv,
591 struct sk_buff *skb,
Yangbo Lu64a965d2020-09-18 17:08:00 +0800592 struct dpaa2_fd *fd,
593 void **swa_addr)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500594{
595 struct device *dev = priv->net_dev->dev.parent;
596 void *sgt_buf = NULL;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500597 dma_addr_t addr;
598 int nr_frags = skb_shinfo(skb)->nr_frags;
599 struct dpaa2_sg_entry *sgt;
600 int i, err;
601 int sgt_buf_size;
602 struct scatterlist *scl, *crt_scl;
603 int num_sg;
604 int num_dma_bufs;
605 struct dpaa2_eth_swa *swa;
606
607 /* Create and map scatterlist.
608 * We don't advertise NETIF_F_FRAGLIST, so skb_to_sgvec() will not have
609 * to go beyond nr_frags+1.
610 * Note: We don't support chained scatterlists
611 */
612 if (unlikely(PAGE_SIZE / sizeof(struct scatterlist) < nr_frags + 1))
613 return -EINVAL;
614
615 scl = kcalloc(nr_frags + 1, sizeof(struct scatterlist), GFP_ATOMIC);
616 if (unlikely(!scl))
617 return -ENOMEM;
618
619 sg_init_table(scl, nr_frags + 1);
620 num_sg = skb_to_sgvec(skb, scl, 0, skb->len);
Ioana Ciornei37fbbdda2020-06-24 14:34:18 +0300621 if (unlikely(num_sg < 0)) {
622 err = -ENOMEM;
623 goto dma_map_sg_failed;
624 }
Ioana Radulescu1e5fa9e2017-05-24 07:13:28 -0500625 num_dma_bufs = dma_map_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500626 if (unlikely(!num_dma_bufs)) {
627 err = -ENOMEM;
628 goto dma_map_sg_failed;
629 }
630
631 /* Prepare the HW SGT structure */
632 sgt_buf_size = priv->tx_data_offset +
Ioana Radulescufa722c02018-03-23 08:44:12 -0500633 sizeof(struct dpaa2_sg_entry) * num_dma_bufs;
Sebastian Andrzej Siewior90bc6d42019-06-07 21:20:37 +0200634 sgt_buf = napi_alloc_frag(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500635 if (unlikely(!sgt_buf)) {
636 err = -ENOMEM;
637 goto sgt_buf_alloc_failed;
638 }
639 sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
Ioana Radulescu6a9bbe52018-03-14 15:04:51 -0500640 memset(sgt_buf, 0, sgt_buf_size);
641
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500642 sgt = (struct dpaa2_sg_entry *)(sgt_buf + priv->tx_data_offset);
643
644 /* Fill in the HW SGT structure.
645 *
646 * sgt_buf is zeroed out, so the following fields are implicit
647 * in all sgt entries:
648 * - offset is 0
649 * - format is 'dpaa2_sg_single'
650 */
651 for_each_sg(scl, crt_scl, num_dma_bufs, i) {
652 dpaa2_sg_set_addr(&sgt[i], sg_dma_address(crt_scl));
653 dpaa2_sg_set_len(&sgt[i], sg_dma_len(crt_scl));
654 }
655 dpaa2_sg_set_final(&sgt[i - 1], true);
656
657 /* Store the skb backpointer in the SGT buffer.
658 * Fit the scatterlist and the number of buffers alongside the
659 * skb backpointer in the software annotation area. We'll need
660 * all of them on Tx Conf.
661 */
Yangbo Lu64a965d2020-09-18 17:08:00 +0800662 *swa_addr = (void *)sgt_buf;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500663 swa = (struct dpaa2_eth_swa *)sgt_buf;
Ioana Radulescue3fdf6b2019-03-01 17:47:23 +0000664 swa->type = DPAA2_ETH_SWA_SG;
665 swa->sg.skb = skb;
666 swa->sg.scl = scl;
667 swa->sg.num_sg = num_sg;
668 swa->sg.sgt_size = sgt_buf_size;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500669
670 /* Separately map the SGT buffer */
Ioana Radulescu1e5fa9e2017-05-24 07:13:28 -0500671 addr = dma_map_single(dev, sgt_buf, sgt_buf_size, DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500672 if (unlikely(dma_mapping_error(dev, addr))) {
673 err = -ENOMEM;
674 goto dma_map_single_failed;
675 }
676 dpaa2_fd_set_offset(fd, priv->tx_data_offset);
677 dpaa2_fd_set_format(fd, dpaa2_fd_sg);
678 dpaa2_fd_set_addr(fd, addr);
679 dpaa2_fd_set_len(fd, skb->len);
Ioana Radulescub948c8c2018-10-12 16:27:40 +0000680 dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500681
682 return 0;
683
684dma_map_single_failed:
Ioana Radulescu6a9bbe52018-03-14 15:04:51 -0500685 skb_free_frag(sgt_buf);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500686sgt_buf_alloc_failed:
Ioana Radulescu1e5fa9e2017-05-24 07:13:28 -0500687 dma_unmap_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500688dma_map_sg_failed:
689 kfree(scl);
690 return err;
691}
692
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300693/* Create a SG frame descriptor based on a linear skb.
694 *
695 * This function is used on the Tx path when the skb headroom is not large
696 * enough for the HW requirements, thus instead of realloc-ing the skb we
697 * create a SG frame descriptor with only one entry.
698 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300699static int dpaa2_eth_build_sg_fd_single_buf(struct dpaa2_eth_priv *priv,
700 struct sk_buff *skb,
Yangbo Lu64a965d2020-09-18 17:08:00 +0800701 struct dpaa2_fd *fd,
702 void **swa_addr)
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300703{
704 struct device *dev = priv->net_dev->dev.parent;
705 struct dpaa2_eth_sgt_cache *sgt_cache;
706 struct dpaa2_sg_entry *sgt;
707 struct dpaa2_eth_swa *swa;
708 dma_addr_t addr, sgt_addr;
709 void *sgt_buf = NULL;
710 int sgt_buf_size;
711 int err;
712
713 /* Prepare the HW SGT structure */
714 sgt_cache = this_cpu_ptr(priv->sgt_cache);
715 sgt_buf_size = priv->tx_data_offset + sizeof(struct dpaa2_sg_entry);
716
717 if (sgt_cache->count == 0)
718 sgt_buf = kzalloc(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN,
719 GFP_ATOMIC);
720 else
721 sgt_buf = sgt_cache->buf[--sgt_cache->count];
722 if (unlikely(!sgt_buf))
723 return -ENOMEM;
724
725 sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
726 sgt = (struct dpaa2_sg_entry *)(sgt_buf + priv->tx_data_offset);
727
728 addr = dma_map_single(dev, skb->data, skb->len, DMA_BIDIRECTIONAL);
729 if (unlikely(dma_mapping_error(dev, addr))) {
730 err = -ENOMEM;
731 goto data_map_failed;
732 }
733
734 /* Fill in the HW SGT structure */
735 dpaa2_sg_set_addr(sgt, addr);
736 dpaa2_sg_set_len(sgt, skb->len);
737 dpaa2_sg_set_final(sgt, true);
738
739 /* Store the skb backpointer in the SGT buffer */
Yangbo Lu64a965d2020-09-18 17:08:00 +0800740 *swa_addr = (void *)sgt_buf;
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300741 swa = (struct dpaa2_eth_swa *)sgt_buf;
742 swa->type = DPAA2_ETH_SWA_SINGLE;
743 swa->single.skb = skb;
744 swa->sg.sgt_size = sgt_buf_size;
745
746 /* Separately map the SGT buffer */
747 sgt_addr = dma_map_single(dev, sgt_buf, sgt_buf_size, DMA_BIDIRECTIONAL);
748 if (unlikely(dma_mapping_error(dev, sgt_addr))) {
749 err = -ENOMEM;
750 goto sgt_map_failed;
751 }
752
753 dpaa2_fd_set_offset(fd, priv->tx_data_offset);
754 dpaa2_fd_set_format(fd, dpaa2_fd_sg);
755 dpaa2_fd_set_addr(fd, sgt_addr);
756 dpaa2_fd_set_len(fd, skb->len);
757 dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
758
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300759 return 0;
760
761sgt_map_failed:
762 dma_unmap_single(dev, addr, skb->len, DMA_BIDIRECTIONAL);
763data_map_failed:
764 if (sgt_cache->count >= DPAA2_ETH_SGT_CACHE_SIZE)
765 kfree(sgt_buf);
766 else
767 sgt_cache->buf[sgt_cache->count++] = sgt_buf;
768
769 return err;
770}
771
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500772/* Create a frame descriptor based on a linear skb */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300773static int dpaa2_eth_build_single_fd(struct dpaa2_eth_priv *priv,
774 struct sk_buff *skb,
Yangbo Lu64a965d2020-09-18 17:08:00 +0800775 struct dpaa2_fd *fd,
776 void **swa_addr)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500777{
778 struct device *dev = priv->net_dev->dev.parent;
Ioana Radulescuc1636852017-12-08 06:47:58 -0600779 u8 *buffer_start, *aligned_start;
Ioana Radulescue3fdf6b2019-03-01 17:47:23 +0000780 struct dpaa2_eth_swa *swa;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500781 dma_addr_t addr;
782
Ioana Radulescuc1636852017-12-08 06:47:58 -0600783 buffer_start = skb->data - dpaa2_eth_needed_headroom(priv, skb);
784
785 /* If there's enough room to align the FD address, do it.
786 * It will help hardware optimize accesses.
787 */
788 aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
789 DPAA2_ETH_TX_BUF_ALIGN);
790 if (aligned_start >= skb->head)
791 buffer_start = aligned_start;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500792
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500793 /* Store a backpointer to the skb at the beginning of the buffer
794 * (in the private data area) such that we can release it
795 * on Tx confirm
796 */
Yangbo Lu64a965d2020-09-18 17:08:00 +0800797 *swa_addr = (void *)buffer_start;
Ioana Radulescue3fdf6b2019-03-01 17:47:23 +0000798 swa = (struct dpaa2_eth_swa *)buffer_start;
799 swa->type = DPAA2_ETH_SWA_SINGLE;
800 swa->single.skb = skb;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500801
802 addr = dma_map_single(dev, buffer_start,
803 skb_tail_pointer(skb) - buffer_start,
Ioana Radulescu1e5fa9e2017-05-24 07:13:28 -0500804 DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500805 if (unlikely(dma_mapping_error(dev, addr)))
806 return -ENOMEM;
807
808 dpaa2_fd_set_addr(fd, addr);
809 dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start));
810 dpaa2_fd_set_len(fd, skb->len);
811 dpaa2_fd_set_format(fd, dpaa2_fd_single);
Ioana Radulescub948c8c2018-10-12 16:27:40 +0000812 dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500813
814 return 0;
815}
816
817/* FD freeing routine on the Tx path
818 *
819 * DMA-unmap and free FD and possibly SGT buffer allocated on Tx. The skb
820 * back-pointed to is also freed.
821 * This can be called either from dpaa2_eth_tx_conf() or on the error path of
822 * dpaa2_eth_tx().
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500823 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +0300824static void dpaa2_eth_free_tx_fd(const struct dpaa2_eth_priv *priv,
825 struct dpaa2_eth_fq *fq,
826 const struct dpaa2_fd *fd, bool in_napi)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500827{
828 struct device *dev = priv->net_dev->dev.parent;
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300829 dma_addr_t fd_addr, sg_addr;
Ioana Radulescud678be12019-03-01 17:47:24 +0000830 struct sk_buff *skb = NULL;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500831 unsigned char *buffer_start;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500832 struct dpaa2_eth_swa *swa;
833 u8 fd_format = dpaa2_fd_get_format(fd);
Ioana Radulescud678be12019-03-01 17:47:24 +0000834 u32 fd_len = dpaa2_fd_get_len(fd);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500835
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300836 struct dpaa2_eth_sgt_cache *sgt_cache;
837 struct dpaa2_sg_entry *sgt;
838
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500839 fd_addr = dpaa2_fd_get_addr(fd);
Ioana Radulescue3fdf6b2019-03-01 17:47:23 +0000840 buffer_start = dpaa2_iova_to_virt(priv->iommu_domain, fd_addr);
841 swa = (struct dpaa2_eth_swa *)buffer_start;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500842
843 if (fd_format == dpaa2_fd_single) {
Ioana Radulescud678be12019-03-01 17:47:24 +0000844 if (swa->type == DPAA2_ETH_SWA_SINGLE) {
845 skb = swa->single.skb;
846 /* Accessing the skb buffer is safe before dma unmap,
847 * because we didn't map the actual skb shell.
848 */
849 dma_unmap_single(dev, fd_addr,
850 skb_tail_pointer(skb) - buffer_start,
851 DMA_BIDIRECTIONAL);
852 } else {
853 WARN_ONCE(swa->type != DPAA2_ETH_SWA_XDP, "Wrong SWA type");
854 dma_unmap_single(dev, fd_addr, swa->xdp.dma_size,
855 DMA_BIDIRECTIONAL);
856 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500857 } else if (fd_format == dpaa2_fd_sg) {
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300858 if (swa->type == DPAA2_ETH_SWA_SG) {
859 skb = swa->sg.skb;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500860
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300861 /* Unmap the scatterlist */
862 dma_unmap_sg(dev, swa->sg.scl, swa->sg.num_sg,
863 DMA_BIDIRECTIONAL);
864 kfree(swa->sg.scl);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500865
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300866 /* Unmap the SGT buffer */
867 dma_unmap_single(dev, fd_addr, swa->sg.sgt_size,
868 DMA_BIDIRECTIONAL);
869 } else {
870 skb = swa->single.skb;
871
872 /* Unmap the SGT Buffer */
873 dma_unmap_single(dev, fd_addr, swa->single.sgt_size,
874 DMA_BIDIRECTIONAL);
875
876 sgt = (struct dpaa2_sg_entry *)(buffer_start +
877 priv->tx_data_offset);
878 sg_addr = dpaa2_sg_get_addr(sgt);
879 dma_unmap_single(dev, sg_addr, skb->len, DMA_BIDIRECTIONAL);
880 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500881 } else {
Ioana Radulescu2b7c86e2017-12-08 06:47:56 -0600882 netdev_dbg(priv->net_dev, "Invalid FD format\n");
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500883 return;
884 }
885
Ioana Radulescud678be12019-03-01 17:47:24 +0000886 if (swa->type != DPAA2_ETH_SWA_XDP && in_napi) {
887 fq->dq_frames++;
888 fq->dq_bytes += fd_len;
889 }
890
891 if (swa->type == DPAA2_ETH_SWA_XDP) {
892 xdp_return_frame(swa->xdp.xdpf);
893 return;
894 }
895
Ioana Radulescu859f9982018-04-26 18:23:47 +0800896 /* Get the timestamp value */
897 if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
898 struct skb_shared_hwtstamps shhwtstamps;
Ioana Radulescue3fdf6b2019-03-01 17:47:23 +0000899 __le64 *ts = dpaa2_get_ts(buffer_start, true);
Ioana Radulescu859f9982018-04-26 18:23:47 +0800900 u64 ns;
901
902 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
903
904 ns = DPAA2_PTP_CLK_PERIOD_NS * le64_to_cpup(ts);
905 shhwtstamps.hwtstamp = ns_to_ktime(ns);
906 skb_tstamp_tx(skb, &shhwtstamps);
907 }
908
Ioana Radulescu6a9bbe52018-03-14 15:04:51 -0500909 /* Free SGT buffer allocated on tx */
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300910 if (fd_format != dpaa2_fd_single) {
911 sgt_cache = this_cpu_ptr(priv->sgt_cache);
912 if (swa->type == DPAA2_ETH_SWA_SG) {
913 skb_free_frag(buffer_start);
914 } else {
915 if (sgt_cache->count >= DPAA2_ETH_SGT_CACHE_SIZE)
916 kfree(buffer_start);
917 else
918 sgt_cache->buf[sgt_cache->count++] = buffer_start;
919 }
920 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500921
922 /* Move on with skb release */
Ioana Ciocoi Radulescu0723a3a2019-02-04 17:00:35 +0000923 napi_consume_skb(skb, in_napi);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500924}
925
Ioana Radulescuc433db42017-06-06 10:00:26 -0500926static netdev_tx_t dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500927{
928 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
929 struct dpaa2_fd fd;
930 struct rtnl_link_stats64 *percpu_stats;
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500931 struct dpaa2_eth_drv_stats *percpu_extras;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500932 struct dpaa2_eth_fq *fq;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +0000933 struct netdev_queue *nq;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500934 u16 queue_mapping;
Ioana Radulescu18c21462017-12-08 06:47:57 -0600935 unsigned int needed_headroom;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +0000936 u32 fd_len;
Ioana Radulescuab1e6de2019-06-11 14:50:03 +0300937 u8 prio = 0;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500938 int err, i;
Yangbo Lu64a965d2020-09-18 17:08:00 +0800939 void *swa;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500940
941 percpu_stats = this_cpu_ptr(priv->percpu_stats);
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500942 percpu_extras = this_cpu_ptr(priv->percpu_extras);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500943
Ioana Radulescu18c21462017-12-08 06:47:57 -0600944 needed_headroom = dpaa2_eth_needed_headroom(priv, skb);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500945
946 /* We'll be holding a back-reference to the skb until Tx Confirmation;
947 * we don't want that overwritten by a concurrent Tx with a cloned skb.
948 */
949 skb = skb_unshare(skb, GFP_ATOMIC);
950 if (unlikely(!skb)) {
951 /* skb_unshare() has already freed the skb */
952 percpu_stats->tx_dropped++;
953 return NETDEV_TX_OK;
954 }
955
956 /* Setup the FD fields */
957 memset(&fd, 0, sizeof(fd));
958
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500959 if (skb_is_nonlinear(skb)) {
Yangbo Lu64a965d2020-09-18 17:08:00 +0800960 err = dpaa2_eth_build_sg_fd(priv, skb, &fd, &swa);
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500961 percpu_extras->tx_sg_frames++;
962 percpu_extras->tx_sg_bytes += skb->len;
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300963 } else if (skb_headroom(skb) < needed_headroom) {
Yangbo Lu64a965d2020-09-18 17:08:00 +0800964 err = dpaa2_eth_build_sg_fd_single_buf(priv, skb, &fd, &swa);
Ioana Ciorneid70446e2020-06-29 21:47:11 +0300965 percpu_extras->tx_sg_frames++;
966 percpu_extras->tx_sg_bytes += skb->len;
Ioana Ciornei4c96c0a2020-06-29 21:47:12 +0300967 percpu_extras->tx_converted_sg_frames++;
968 percpu_extras->tx_converted_sg_bytes += skb->len;
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500969 } else {
Yangbo Lu64a965d2020-09-18 17:08:00 +0800970 err = dpaa2_eth_build_single_fd(priv, skb, &fd, &swa);
Ioana Radulescu85047ab2017-04-28 04:50:31 -0500971 }
972
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500973 if (unlikely(err)) {
974 percpu_stats->tx_dropped++;
975 goto err_build_fd;
976 }
977
Yangbo Lu64a965d2020-09-18 17:08:00 +0800978 if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
979 dpaa2_eth_enable_tx_tstamp(&fd, swa);
980
Ioana Radulescu56361872017-04-28 04:50:32 -0500981 /* Tracing point */
982 trace_dpaa2_tx_fd(net_dev, &fd);
983
Ioana Radulescu537336c2017-12-21 06:33:20 -0600984 /* TxConf FQ selection relies on queue id from the stack.
985 * In case of a forwarded frame from another DPNI interface, we choose
986 * a queue affined to the same core that processed the Rx frame
Ioana Radulescu6e2387e2017-04-28 04:50:29 -0500987 */
Ioana Radulescu537336c2017-12-21 06:33:20 -0600988 queue_mapping = skb_get_queue_mapping(skb);
Ioana Radulescuab1e6de2019-06-11 14:50:03 +0300989
990 if (net_dev->num_tc) {
991 prio = netdev_txq_to_tc(net_dev, queue_mapping);
992 /* Hardware interprets priority level 0 as being the highest,
993 * so we need to do a reverse mapping to the netdev tc index
994 */
995 prio = net_dev->num_tc - prio - 1;
996 /* We have only one FQ array entry for all Tx hardware queues
997 * with the same flow id (but different priority levels)
998 */
999 queue_mapping %= dpaa2_eth_queue_count(priv);
1000 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001001 fq = &priv->fq[queue_mapping];
Ioana Ciornei8c838f52019-03-25 13:06:22 +00001002
1003 fd_len = dpaa2_fd_get_len(&fd);
1004 nq = netdev_get_tx_queue(net_dev, queue_mapping);
1005 netdev_tx_sent_queue(nq, fd_len);
1006
1007 /* Everything that happens after this enqueues might race with
1008 * the Tx confirmation callback for this frame
1009 */
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001010 for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
Ioana Ciornei6ff80442020-04-22 15:05:11 +03001011 err = priv->enqueue(priv, fq, &fd, prio, 1, NULL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001012 if (err != -EBUSY)
1013 break;
1014 }
Ioana Radulescu85047ab2017-04-28 04:50:31 -05001015 percpu_extras->tx_portal_busy += i;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001016 if (unlikely(err < 0)) {
1017 percpu_stats->tx_errors++;
1018 /* Clean up everything, including freeing the skb */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001019 dpaa2_eth_free_tx_fd(priv, fq, &fd, false);
Ioana Ciornei8c838f52019-03-25 13:06:22 +00001020 netdev_tx_completed_queue(nq, 1, fd_len);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001021 } else {
1022 percpu_stats->tx_packets++;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001023 percpu_stats->tx_bytes += fd_len;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001024 }
1025
1026 return NETDEV_TX_OK;
1027
1028err_build_fd:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001029 dev_kfree_skb(skb);
1030
1031 return NETDEV_TX_OK;
1032}
1033
1034/* Tx confirmation frame processing routine */
1035static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
Ioana Ciorneib00c8982018-10-12 16:27:38 +00001036 struct dpaa2_eth_channel *ch __always_unused,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001037 const struct dpaa2_fd *fd,
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001038 struct dpaa2_eth_fq *fq)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001039{
1040 struct rtnl_link_stats64 *percpu_stats;
Ioana Radulescu85047ab2017-04-28 04:50:31 -05001041 struct dpaa2_eth_drv_stats *percpu_extras;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001042 u32 fd_len = dpaa2_fd_get_len(fd);
Ioana Radulescu39163c02017-06-06 10:00:39 -05001043 u32 fd_errors;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001044
Ioana Radulescu56361872017-04-28 04:50:32 -05001045 /* Tracing point */
1046 trace_dpaa2_tx_conf_fd(priv->net_dev, fd);
1047
Ioana Radulescu85047ab2017-04-28 04:50:31 -05001048 percpu_extras = this_cpu_ptr(priv->percpu_extras);
1049 percpu_extras->tx_conf_frames++;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001050 percpu_extras->tx_conf_bytes += fd_len;
1051
Ioana Radulescu39163c02017-06-06 10:00:39 -05001052 /* Check frame errors in the FD field */
1053 fd_errors = dpaa2_fd_get_ctrl(fd) & DPAA2_FD_TX_ERR_MASK;
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001054 dpaa2_eth_free_tx_fd(priv, fq, fd, true);
Ioana Radulescu39163c02017-06-06 10:00:39 -05001055
1056 if (likely(!fd_errors))
1057 return;
1058
Ioana Radulescu2b7c86e2017-12-08 06:47:56 -06001059 if (net_ratelimit())
1060 netdev_dbg(priv->net_dev, "TX frame FD error: 0x%08x\n",
1061 fd_errors);
1062
Ioana Radulescu39163c02017-06-06 10:00:39 -05001063 percpu_stats = this_cpu_ptr(priv->percpu_stats);
1064 /* Tx-conf logically pertains to the egress path. */
1065 percpu_stats->tx_errors++;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001066}
1067
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001068static int dpaa2_eth_set_rx_csum(struct dpaa2_eth_priv *priv, bool enable)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001069{
1070 int err;
1071
1072 err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
1073 DPNI_OFF_RX_L3_CSUM, enable);
1074 if (err) {
1075 netdev_err(priv->net_dev,
1076 "dpni_set_offload(RX_L3_CSUM) failed\n");
1077 return err;
1078 }
1079
1080 err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
1081 DPNI_OFF_RX_L4_CSUM, enable);
1082 if (err) {
1083 netdev_err(priv->net_dev,
1084 "dpni_set_offload(RX_L4_CSUM) failed\n");
1085 return err;
1086 }
1087
1088 return 0;
1089}
1090
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001091static int dpaa2_eth_set_tx_csum(struct dpaa2_eth_priv *priv, bool enable)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001092{
1093 int err;
1094
1095 err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
1096 DPNI_OFF_TX_L3_CSUM, enable);
1097 if (err) {
1098 netdev_err(priv->net_dev, "dpni_set_offload(TX_L3_CSUM) failed\n");
1099 return err;
1100 }
1101
1102 err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
1103 DPNI_OFF_TX_L4_CSUM, enable);
1104 if (err) {
1105 netdev_err(priv->net_dev, "dpni_set_offload(TX_L4_CSUM) failed\n");
1106 return err;
1107 }
1108
1109 return 0;
1110}
1111
1112/* Perform a single release command to add buffers
1113 * to the specified buffer pool
1114 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001115static int dpaa2_eth_add_bufs(struct dpaa2_eth_priv *priv,
1116 struct dpaa2_eth_channel *ch, u16 bpid)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001117{
1118 struct device *dev = priv->net_dev->dev.parent;
1119 u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00001120 struct page *page;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001121 dma_addr_t addr;
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001122 int retries = 0;
Ioana Radulescu87eb55e2017-10-11 08:29:43 -05001123 int i, err;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001124
1125 for (i = 0; i < DPAA2_ETH_BUFS_PER_CMD; i++) {
1126 /* Allocate buffer visible to WRIOP + skb shared info +
1127 * alignment padding
1128 */
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00001129 /* allocate one page for each Rx buffer. WRIOP sees
1130 * the entire page except for a tailroom reserved for
1131 * skb shared info
1132 */
1133 page = dev_alloc_pages(0);
1134 if (!page)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001135 goto err_alloc;
1136
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +03001137 addr = dma_map_page(dev, page, 0, priv->rx_buf_size,
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00001138 DMA_BIDIRECTIONAL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001139 if (unlikely(dma_mapping_error(dev, addr)))
1140 goto err_map;
1141
1142 buf_array[i] = addr;
Ioana Radulescu56361872017-04-28 04:50:32 -05001143
1144 /* tracing point */
1145 trace_dpaa2_eth_buf_seed(priv->net_dev,
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00001146 page, DPAA2_ETH_RX_BUF_RAW_SIZE,
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +03001147 addr, priv->rx_buf_size,
Ioana Radulescu56361872017-04-28 04:50:32 -05001148 bpid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001149 }
1150
1151release_bufs:
Ioana Radulescu87eb55e2017-10-11 08:29:43 -05001152 /* In case the portal is busy, retry until successful */
Ioana Radulescu7ec05962018-01-05 05:04:32 -06001153 while ((err = dpaa2_io_service_release(ch->dpio, bpid,
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001154 buf_array, i)) == -EBUSY) {
1155 if (retries++ >= DPAA2_ETH_SWP_BUSY_RETRIES)
1156 break;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001157 cpu_relax();
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001158 }
Ioana Radulescu87eb55e2017-10-11 08:29:43 -05001159
1160 /* If release command failed, clean up and bail out;
1161 * not much else we can do about it
1162 */
1163 if (err) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001164 dpaa2_eth_free_bufs(priv, buf_array, i);
Ioana Radulescu87eb55e2017-10-11 08:29:43 -05001165 return 0;
1166 }
1167
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001168 return i;
1169
1170err_map:
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00001171 __free_pages(page, 0);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001172err_alloc:
Ioana Radulescu87eb55e2017-10-11 08:29:43 -05001173 /* If we managed to allocate at least some buffers,
1174 * release them to hardware
1175 */
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001176 if (i)
1177 goto release_bufs;
1178
1179 return 0;
1180}
1181
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001182static int dpaa2_eth_seed_pool(struct dpaa2_eth_priv *priv, u16 bpid)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001183{
1184 int i, j;
1185 int new_count;
1186
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001187 for (j = 0; j < priv->num_channels; j++) {
1188 for (i = 0; i < DPAA2_ETH_NUM_BUFS;
1189 i += DPAA2_ETH_BUFS_PER_CMD) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001190 new_count = dpaa2_eth_add_bufs(priv, priv->channel[j], bpid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001191 priv->channel[j]->buf_count += new_count;
1192
1193 if (new_count < DPAA2_ETH_BUFS_PER_CMD) {
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001194 return -ENOMEM;
1195 }
1196 }
1197 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001198
1199 return 0;
1200}
1201
1202/**
1203 * Drain the specified number of buffers from the DPNI's private buffer pool.
1204 * @count must not exceeed DPAA2_ETH_BUFS_PER_CMD
1205 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001206static void dpaa2_eth_drain_bufs(struct dpaa2_eth_priv *priv, int count)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001207{
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001208 u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001209 int retries = 0;
Ioana Radulescu87eb55e2017-10-11 08:29:43 -05001210 int ret;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001211
1212 do {
Ioana Radulescu05fa39c2017-06-06 10:00:37 -05001213 ret = dpaa2_io_service_acquire(NULL, priv->bpid,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001214 buf_array, count);
1215 if (ret < 0) {
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001216 if (ret == -EBUSY &&
Ioana Ciornei0e5ad752020-06-24 14:34:19 +03001217 retries++ < DPAA2_ETH_SWP_BUSY_RETRIES)
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001218 continue;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001219 netdev_err(priv->net_dev, "dpaa2_io_service_acquire() failed\n");
1220 return;
1221 }
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001222 dpaa2_eth_free_bufs(priv, buf_array, ret);
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001223 retries = 0;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001224 } while (ret);
1225}
1226
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001227static void dpaa2_eth_drain_pool(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001228{
1229 int i;
1230
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001231 dpaa2_eth_drain_bufs(priv, DPAA2_ETH_BUFS_PER_CMD);
1232 dpaa2_eth_drain_bufs(priv, 1);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001233
1234 for (i = 0; i < priv->num_channels; i++)
1235 priv->channel[i]->buf_count = 0;
1236}
1237
1238/* Function is called from softirq context only, so we don't need to guard
1239 * the access to percpu count
1240 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001241static int dpaa2_eth_refill_pool(struct dpaa2_eth_priv *priv,
1242 struct dpaa2_eth_channel *ch,
1243 u16 bpid)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001244{
1245 int new_count;
1246
1247 if (likely(ch->buf_count >= DPAA2_ETH_REFILL_THRESH))
1248 return 0;
1249
1250 do {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001251 new_count = dpaa2_eth_add_bufs(priv, ch, bpid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001252 if (unlikely(!new_count)) {
1253 /* Out of memory; abort for now, we'll try later on */
1254 break;
1255 }
1256 ch->buf_count += new_count;
1257 } while (ch->buf_count < DPAA2_ETH_NUM_BUFS);
1258
1259 if (unlikely(ch->buf_count < DPAA2_ETH_NUM_BUFS))
1260 return -ENOMEM;
1261
1262 return 0;
1263}
1264
Ioana Ciorneid70446e2020-06-29 21:47:11 +03001265static void dpaa2_eth_sgt_cache_drain(struct dpaa2_eth_priv *priv)
1266{
1267 struct dpaa2_eth_sgt_cache *sgt_cache;
1268 u16 count;
1269 int k, i;
1270
Ioana Ciornei0fe665d2020-07-06 17:55:54 +03001271 for_each_possible_cpu(k) {
Ioana Ciorneid70446e2020-06-29 21:47:11 +03001272 sgt_cache = per_cpu_ptr(priv->sgt_cache, k);
1273 count = sgt_cache->count;
1274
1275 for (i = 0; i < count; i++)
1276 kfree(sgt_cache->buf[i]);
1277 sgt_cache->count = 0;
1278 }
1279}
1280
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001281static int dpaa2_eth_pull_channel(struct dpaa2_eth_channel *ch)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001282{
1283 int err;
Ioana Radulescu85047ab2017-04-28 04:50:31 -05001284 int dequeues = -1;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001285
1286 /* Retry while portal is busy */
1287 do {
Ioana Radulescu7ec05962018-01-05 05:04:32 -06001288 err = dpaa2_io_service_pull_channel(ch->dpio, ch->ch_id,
1289 ch->store);
Ioana Radulescu85047ab2017-04-28 04:50:31 -05001290 dequeues++;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001291 cpu_relax();
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001292 } while (err == -EBUSY && dequeues < DPAA2_ETH_SWP_BUSY_RETRIES);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001293
Ioana Radulescu85047ab2017-04-28 04:50:31 -05001294 ch->stats.dequeue_portal_busy += dequeues;
1295 if (unlikely(err))
1296 ch->stats.pull_err++;
1297
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001298 return err;
1299}
1300
1301/* NAPI poll routine
1302 *
1303 * Frames are dequeued from the QMan channel associated with this NAPI context.
1304 * Rx, Tx confirmation and (if configured) Rx error frames all count
1305 * towards the NAPI budget.
1306 */
1307static int dpaa2_eth_poll(struct napi_struct *napi, int budget)
1308{
1309 struct dpaa2_eth_channel *ch;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001310 struct dpaa2_eth_priv *priv;
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001311 int rx_cleaned = 0, txconf_cleaned = 0;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001312 struct dpaa2_eth_fq *fq, *txc_fq = NULL;
1313 struct netdev_queue *nq;
1314 int store_cleaned, work_done;
Ioana Ciornei0a25d922019-03-25 13:42:39 +00001315 struct list_head rx_list;
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001316 int retries = 0;
Ioana Ciornei74a1c052020-05-13 16:55:46 +03001317 u16 flowid;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001318 int err;
1319
1320 ch = container_of(napi, struct dpaa2_eth_channel, napi);
Ioana Radulescud678be12019-03-01 17:47:24 +00001321 ch->xdp.res = 0;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001322 priv = ch->priv;
1323
Ioana Ciornei0a25d922019-03-25 13:42:39 +00001324 INIT_LIST_HEAD(&rx_list);
1325 ch->rx_list = &rx_list;
1326
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001327 do {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001328 err = dpaa2_eth_pull_channel(ch);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001329 if (unlikely(err))
1330 break;
1331
1332 /* Refill pool if appropriate */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001333 dpaa2_eth_refill_pool(priv, ch, priv->bpid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001334
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001335 store_cleaned = dpaa2_eth_consume_frames(ch, &fq);
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001336 if (store_cleaned <= 0)
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001337 break;
1338 if (fq->type == DPAA2_RX_FQ) {
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001339 rx_cleaned += store_cleaned;
Ioana Ciornei74a1c052020-05-13 16:55:46 +03001340 flowid = fq->flowid;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001341 } else {
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001342 txconf_cleaned += store_cleaned;
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001343 /* We have a single Tx conf FQ on this channel */
1344 txc_fq = fq;
1345 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001346
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001347 /* If we either consumed the whole NAPI budget with Rx frames
1348 * or we reached the Tx confirmations threshold, we're done.
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001349 */
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001350 if (rx_cleaned >= budget ||
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001351 txconf_cleaned >= DPAA2_ETH_TXCONF_PER_NAPI) {
1352 work_done = budget;
1353 goto out;
1354 }
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001355 } while (store_cleaned);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001356
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001357 /* We didn't consume the entire budget, so finish napi and
1358 * re-enable data availability notifications
1359 */
1360 napi_complete_done(napi, rx_cleaned);
1361 do {
1362 err = dpaa2_io_service_rearm(ch->dpio, &ch->nctx);
1363 cpu_relax();
Ioana Radulescuef17bd72019-10-07 14:38:28 +03001364 } while (err == -EBUSY && retries++ < DPAA2_ETH_SWP_BUSY_RETRIES);
Ioana Ciocoi Radulescu68049a52018-10-08 14:16:31 +00001365 WARN_ONCE(err, "CDAN notifications rearm failed on core %d",
1366 ch->nctx.desired_cpu);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001367
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001368 work_done = max(rx_cleaned, 1);
1369
1370out:
Ioana Ciornei0a25d922019-03-25 13:42:39 +00001371 netif_receive_skb_list(ch->rx_list);
1372
Ioana Radulescud678be12019-03-01 17:47:24 +00001373 if (txc_fq && txc_fq->dq_frames) {
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001374 nq = netdev_get_tx_queue(priv->net_dev, txc_fq->flowid);
1375 netdev_tx_completed_queue(nq, txc_fq->dq_frames,
1376 txc_fq->dq_bytes);
1377 txc_fq->dq_frames = 0;
1378 txc_fq->dq_bytes = 0;
1379 }
1380
Ioana Radulescud678be12019-03-01 17:47:24 +00001381 if (ch->xdp.res & XDP_REDIRECT)
1382 xdp_do_flush_map();
Ioana Ciornei74a1c052020-05-13 16:55:46 +03001383 else if (rx_cleaned && ch->xdp.res & XDP_TX)
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001384 dpaa2_eth_xdp_tx_flush(priv, ch, &priv->fq[flowid]);
Ioana Radulescud678be12019-03-01 17:47:24 +00001385
Ioana Ciocoi Radulescu569dac62018-11-14 11:48:36 +00001386 return work_done;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001387}
1388
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001389static void dpaa2_eth_enable_ch_napi(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001390{
1391 struct dpaa2_eth_channel *ch;
1392 int i;
1393
1394 for (i = 0; i < priv->num_channels; i++) {
1395 ch = priv->channel[i];
1396 napi_enable(&ch->napi);
1397 }
1398}
1399
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001400static void dpaa2_eth_disable_ch_napi(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001401{
1402 struct dpaa2_eth_channel *ch;
1403 int i;
1404
1405 for (i = 0; i < priv->num_channels; i++) {
1406 ch = priv->channel[i];
1407 napi_disable(&ch->napi);
1408 }
1409}
1410
Ioana Ciornei07beb162020-05-31 00:08:14 +03001411void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv,
1412 bool tx_pause, bool pfc)
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001413{
1414 struct dpni_taildrop td = {0};
Ioana Radulescu685e39e2020-05-31 00:08:08 +03001415 struct dpaa2_eth_fq *fq;
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001416 int i, err;
1417
Ioana Ciornei07beb162020-05-31 00:08:14 +03001418 /* FQ taildrop: threshold is in bytes, per frame queue. Enabled if
1419 * flow control is disabled (as it might interfere with either the
1420 * buffer pool depletion trigger for pause frames or with the group
1421 * congestion trigger for PFC frames)
1422 */
Ioana Radulescu2c8d1c82020-05-31 00:08:11 +03001423 td.enable = !tx_pause;
Ioana Ciornei07beb162020-05-31 00:08:14 +03001424 if (priv->rx_fqtd_enabled == td.enable)
1425 goto set_cgtd;
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001426
Ioana Radulescu2c8d1c82020-05-31 00:08:11 +03001427 td.threshold = DPAA2_ETH_FQ_TAILDROP_THRESH;
1428 td.units = DPNI_CONGESTION_UNIT_BYTES;
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001429
1430 for (i = 0; i < priv->num_fqs; i++) {
Ioana Radulescu685e39e2020-05-31 00:08:08 +03001431 fq = &priv->fq[i];
1432 if (fq->type != DPAA2_RX_FQ)
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001433 continue;
1434 err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token,
Ioana Radulescu685e39e2020-05-31 00:08:08 +03001435 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
1436 fq->tc, fq->flowid, &td);
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001437 if (err) {
1438 netdev_err(priv->net_dev,
Ioana Radulescu2c8d1c82020-05-31 00:08:11 +03001439 "dpni_set_taildrop(FQ) failed\n");
1440 return;
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001441 }
1442 }
1443
Ioana Ciornei07beb162020-05-31 00:08:14 +03001444 priv->rx_fqtd_enabled = td.enable;
1445
1446set_cgtd:
Ioana Radulescu2c8d1c82020-05-31 00:08:11 +03001447 /* Congestion group taildrop: threshold is in frames, per group
1448 * of FQs belonging to the same traffic class
Ioana Ciornei07beb162020-05-31 00:08:14 +03001449 * Enabled if general Tx pause disabled or if PFCs are enabled
1450 * (congestion group threhsold for PFC generation is lower than the
1451 * CG taildrop threshold, so it won't interfere with it; we also
1452 * want frames in non-PFC enabled traffic classes to be kept in check)
Ioana Radulescu2c8d1c82020-05-31 00:08:11 +03001453 */
Ioana Ciornei07beb162020-05-31 00:08:14 +03001454 td.enable = !tx_pause || (tx_pause && pfc);
1455 if (priv->rx_cgtd_enabled == td.enable)
1456 return;
1457
Ioana Radulescu2c8d1c82020-05-31 00:08:11 +03001458 td.threshold = DPAA2_ETH_CG_TAILDROP_THRESH(priv);
1459 td.units = DPNI_CONGESTION_UNIT_FRAMES;
1460 for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
1461 err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token,
1462 DPNI_CP_GROUP, DPNI_QUEUE_RX,
1463 i, 0, &td);
1464 if (err) {
1465 netdev_err(priv->net_dev,
1466 "dpni_set_taildrop(CG) failed\n");
1467 return;
1468 }
1469 }
1470
Ioana Ciornei07beb162020-05-31 00:08:14 +03001471 priv->rx_cgtd_enabled = td.enable;
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001472}
1473
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001474static int dpaa2_eth_link_state_update(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001475{
Ioana Ciornei85b7a342018-10-12 16:27:33 +00001476 struct dpni_link_state state = {0};
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001477 bool tx_pause;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001478 int err;
1479
1480 err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
1481 if (unlikely(err)) {
1482 netdev_err(priv->net_dev,
1483 "dpni_get_link_state() failed\n");
1484 return err;
1485 }
1486
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001487 /* If Tx pause frame settings have changed, we need to update
1488 * Rx FQ taildrop configuration as well. We configure taildrop
1489 * only when pause frame generation is disabled.
1490 */
Ioana Radulescuad054f22020-05-31 00:08:10 +03001491 tx_pause = dpaa2_eth_tx_pause_enabled(state.options);
Ioana Ciornei07beb162020-05-31 00:08:14 +03001492 dpaa2_eth_set_rx_taildrop(priv, tx_pause, priv->pfc_enabled);
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03001493
Ioana Ciornei71947922019-10-31 01:18:31 +02001494 /* When we manage the MAC/PHY using phylink there is no need
1495 * to manually update the netif_carrier.
1496 */
1497 if (priv->mac)
1498 goto out;
1499
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001500 /* Chech link state; speed / duplex changes are not treated yet */
1501 if (priv->link_state.up == state.up)
Ioana Radulescucce629432019-08-28 17:08:14 +03001502 goto out;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001503
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001504 if (state.up) {
1505 netif_carrier_on(priv->net_dev);
1506 netif_tx_start_all_queues(priv->net_dev);
1507 } else {
1508 netif_tx_stop_all_queues(priv->net_dev);
1509 netif_carrier_off(priv->net_dev);
1510 }
1511
Ioana Radulescu77160af2017-06-06 10:00:28 -05001512 netdev_info(priv->net_dev, "Link Event: state %s\n",
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001513 state.up ? "up" : "down");
1514
Ioana Radulescucce629432019-08-28 17:08:14 +03001515out:
1516 priv->link_state = state;
1517
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001518 return 0;
1519}
1520
1521static int dpaa2_eth_open(struct net_device *net_dev)
1522{
1523 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1524 int err;
1525
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001526 err = dpaa2_eth_seed_pool(priv, priv->bpid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001527 if (err) {
1528 /* Not much to do; the buffer pool, though not filled up,
1529 * may still contain some buffers which would enable us
1530 * to limp on.
1531 */
1532 netdev_err(net_dev, "Buffer seeding failed for DPBP %d (bpid=%d)\n",
Ioana Radulescu05fa39c2017-06-06 10:00:37 -05001533 priv->dpbp_dev->obj_desc.id, priv->bpid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001534 }
1535
Ioana Ciornei71947922019-10-31 01:18:31 +02001536 if (!priv->mac) {
1537 /* We'll only start the txqs when the link is actually ready;
1538 * make sure we don't race against the link up notification,
1539 * which may come immediately after dpni_enable();
1540 */
1541 netif_tx_stop_all_queues(net_dev);
1542
1543 /* Also, explicitly set carrier off, otherwise
1544 * netif_carrier_ok() will return true and cause 'ip link show'
1545 * to report the LOWER_UP flag, even though the link
1546 * notification wasn't even received.
1547 */
1548 netif_carrier_off(net_dev);
1549 }
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001550 dpaa2_eth_enable_ch_napi(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001551
1552 err = dpni_enable(priv->mc_io, 0, priv->mc_token);
1553 if (err < 0) {
1554 netdev_err(net_dev, "dpni_enable() failed\n");
1555 goto enable_err;
1556 }
1557
Ioana Ciornei71947922019-10-31 01:18:31 +02001558 if (!priv->mac) {
1559 /* If the DPMAC object has already processed the link up
1560 * interrupt, we have to learn the link state ourselves.
1561 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001562 err = dpaa2_eth_link_state_update(priv);
Ioana Ciornei71947922019-10-31 01:18:31 +02001563 if (err < 0) {
1564 netdev_err(net_dev, "Can't update link state\n");
1565 goto link_state_err;
1566 }
1567 } else {
1568 phylink_start(priv->mac->phylink);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001569 }
1570
1571 return 0;
1572
1573link_state_err:
1574enable_err:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001575 dpaa2_eth_disable_ch_napi(priv);
1576 dpaa2_eth_drain_pool(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001577 return err;
1578}
1579
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001580/* Total number of in-flight frames on ingress queues */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001581static u32 dpaa2_eth_ingress_fq_count(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001582{
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001583 struct dpaa2_eth_fq *fq;
1584 u32 fcnt = 0, bcnt = 0, total = 0;
1585 int i, err;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001586
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001587 for (i = 0; i < priv->num_fqs; i++) {
1588 fq = &priv->fq[i];
1589 err = dpaa2_io_query_fq_count(NULL, fq->fqid, &fcnt, &bcnt);
1590 if (err) {
1591 netdev_warn(priv->net_dev, "query_fq_count failed");
1592 break;
1593 }
1594 total += fcnt;
1595 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001596
1597 return total;
1598}
1599
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001600static void dpaa2_eth_wait_for_ingress_fq_empty(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001601{
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001602 int retries = 10;
1603 u32 pending;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001604
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001605 do {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001606 pending = dpaa2_eth_ingress_fq_count(priv);
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001607 if (pending)
1608 msleep(100);
1609 } while (pending && --retries);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001610}
1611
Ioana Radulescu52b6a4f2019-09-02 13:23:19 +03001612#define DPNI_TX_PENDING_VER_MAJOR 7
1613#define DPNI_TX_PENDING_VER_MINOR 13
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001614static void dpaa2_eth_wait_for_egress_fq_empty(struct dpaa2_eth_priv *priv)
Ioana Radulescu52b6a4f2019-09-02 13:23:19 +03001615{
1616 union dpni_statistics stats;
1617 int retries = 10;
1618 int err;
1619
1620 if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_TX_PENDING_VER_MAJOR,
1621 DPNI_TX_PENDING_VER_MINOR) < 0)
1622 goto out;
1623
1624 do {
1625 err = dpni_get_statistics(priv->mc_io, 0, priv->mc_token, 6,
1626 &stats);
1627 if (err)
1628 goto out;
1629 if (stats.page_6.tx_pending_frames == 0)
1630 return;
1631 } while (--retries);
1632
1633out:
1634 msleep(500);
1635}
1636
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001637static int dpaa2_eth_stop(struct net_device *net_dev)
1638{
1639 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
Ioana Ciornei85b7a342018-10-12 16:27:33 +00001640 int dpni_enabled = 0;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001641 int retries = 10;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001642
Ioana Ciornei71947922019-10-31 01:18:31 +02001643 if (!priv->mac) {
1644 netif_tx_stop_all_queues(net_dev);
1645 netif_carrier_off(net_dev);
1646 } else {
1647 phylink_stop(priv->mac->phylink);
1648 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001649
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001650 /* On dpni_disable(), the MC firmware will:
1651 * - stop MAC Rx and wait for all Rx frames to be enqueued to software
1652 * - cut off WRIOP dequeues from egress FQs and wait until transmission
1653 * of all in flight Tx frames is finished (and corresponding Tx conf
1654 * frames are enqueued back to software)
1655 *
1656 * Before calling dpni_disable(), we wait for all Tx frames to arrive
1657 * on WRIOP. After it finishes, wait until all remaining frames on Rx
1658 * and Tx conf queues are consumed on NAPI poll.
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001659 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001660 dpaa2_eth_wait_for_egress_fq_empty(priv);
Ioana Ciocoi Radulescu68d74312019-01-16 16:51:44 +00001661
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001662 do {
1663 dpni_disable(priv->mc_io, 0, priv->mc_token);
1664 dpni_is_enabled(priv->mc_io, 0, priv->mc_token, &dpni_enabled);
1665 if (dpni_enabled)
1666 /* Allow the hardware some slack */
1667 msleep(100);
1668 } while (dpni_enabled && --retries);
1669 if (!retries) {
1670 netdev_warn(net_dev, "Retry count exceeded disabling DPNI\n");
1671 /* Must go on and disable NAPI nonetheless, so we don't crash at
1672 * the next "ifconfig up"
1673 */
1674 }
1675
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001676 dpaa2_eth_wait_for_ingress_fq_empty(priv);
1677 dpaa2_eth_disable_ch_napi(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001678
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001679 /* Empty the buffer pool */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001680 dpaa2_eth_drain_pool(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001681
Ioana Ciorneid70446e2020-06-29 21:47:11 +03001682 /* Empty the Scatter-Gather Buffer cache */
1683 dpaa2_eth_sgt_cache_drain(priv);
1684
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001685 return 0;
1686}
1687
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001688static int dpaa2_eth_set_addr(struct net_device *net_dev, void *addr)
1689{
1690 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1691 struct device *dev = net_dev->dev.parent;
1692 int err;
1693
1694 err = eth_mac_addr(net_dev, addr);
1695 if (err < 0) {
1696 dev_err(dev, "eth_mac_addr() failed (%d)\n", err);
1697 return err;
1698 }
1699
1700 err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
1701 net_dev->dev_addr);
1702 if (err) {
1703 dev_err(dev, "dpni_set_primary_mac_addr() failed (%d)\n", err);
1704 return err;
1705 }
1706
1707 return 0;
1708}
1709
1710/** Fill in counters maintained by the GPP driver. These may be different from
1711 * the hardware counters obtained by ethtool.
1712 */
Ioana Radulescuacbff8e2017-06-06 10:00:24 -05001713static void dpaa2_eth_get_stats(struct net_device *net_dev,
1714 struct rtnl_link_stats64 *stats)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001715{
1716 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1717 struct rtnl_link_stats64 *percpu_stats;
1718 u64 *cpustats;
1719 u64 *netstats = (u64 *)stats;
1720 int i, j;
1721 int num = sizeof(struct rtnl_link_stats64) / sizeof(u64);
1722
1723 for_each_possible_cpu(i) {
1724 percpu_stats = per_cpu_ptr(priv->percpu_stats, i);
1725 cpustats = (u64 *)percpu_stats;
1726 for (j = 0; j < num; j++)
1727 netstats[j] += cpustats[j];
1728 }
1729}
1730
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001731/* Copy mac unicast addresses from @net_dev to @priv.
1732 * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1733 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001734static void dpaa2_eth_add_uc_hw_addr(const struct net_device *net_dev,
1735 struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001736{
1737 struct netdev_hw_addr *ha;
1738 int err;
1739
1740 netdev_for_each_uc_addr(ha, net_dev) {
1741 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1742 ha->addr);
1743 if (err)
1744 netdev_warn(priv->net_dev,
1745 "Could not add ucast MAC %pM to the filtering table (err %d)\n",
1746 ha->addr, err);
1747 }
1748}
1749
1750/* Copy mac multicast addresses from @net_dev to @priv
1751 * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1752 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001753static void dpaa2_eth_add_mc_hw_addr(const struct net_device *net_dev,
1754 struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001755{
1756 struct netdev_hw_addr *ha;
1757 int err;
1758
1759 netdev_for_each_mc_addr(ha, net_dev) {
1760 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1761 ha->addr);
1762 if (err)
1763 netdev_warn(priv->net_dev,
1764 "Could not add mcast MAC %pM to the filtering table (err %d)\n",
1765 ha->addr, err);
1766 }
1767}
1768
1769static void dpaa2_eth_set_rx_mode(struct net_device *net_dev)
1770{
1771 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1772 int uc_count = netdev_uc_count(net_dev);
1773 int mc_count = netdev_mc_count(net_dev);
1774 u8 max_mac = priv->dpni_attrs.mac_filter_entries;
1775 u32 options = priv->dpni_attrs.options;
1776 u16 mc_token = priv->mc_token;
1777 struct fsl_mc_io *mc_io = priv->mc_io;
1778 int err;
1779
1780 /* Basic sanity checks; these probably indicate a misconfiguration */
1781 if (options & DPNI_OPT_NO_MAC_FILTER && max_mac != 0)
1782 netdev_info(net_dev,
1783 "mac_filter_entries=%d, DPNI_OPT_NO_MAC_FILTER option must be disabled\n",
1784 max_mac);
1785
1786 /* Force promiscuous if the uc or mc counts exceed our capabilities. */
1787 if (uc_count > max_mac) {
1788 netdev_info(net_dev,
1789 "Unicast addr count reached %d, max allowed is %d; forcing promisc\n",
1790 uc_count, max_mac);
1791 goto force_promisc;
1792 }
1793 if (mc_count + uc_count > max_mac) {
1794 netdev_info(net_dev,
1795 "Unicast + multicast addr count reached %d, max allowed is %d; forcing promisc\n",
1796 uc_count + mc_count, max_mac);
1797 goto force_mc_promisc;
1798 }
1799
1800 /* Adjust promisc settings due to flag combinations */
1801 if (net_dev->flags & IFF_PROMISC)
1802 goto force_promisc;
1803 if (net_dev->flags & IFF_ALLMULTI) {
1804 /* First, rebuild unicast filtering table. This should be done
1805 * in promisc mode, in order to avoid frame loss while we
1806 * progressively add entries to the table.
1807 * We don't know whether we had been in promisc already, and
1808 * making an MC call to find out is expensive; so set uc promisc
1809 * nonetheless.
1810 */
1811 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1812 if (err)
1813 netdev_warn(net_dev, "Can't set uc promisc\n");
1814
1815 /* Actual uc table reconstruction. */
1816 err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 0);
1817 if (err)
1818 netdev_warn(net_dev, "Can't clear uc filters\n");
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001819 dpaa2_eth_add_uc_hw_addr(net_dev, priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001820
1821 /* Finally, clear uc promisc and set mc promisc as requested. */
1822 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1823 if (err)
1824 netdev_warn(net_dev, "Can't clear uc promisc\n");
1825 goto force_mc_promisc;
1826 }
1827
1828 /* Neither unicast, nor multicast promisc will be on... eventually.
1829 * For now, rebuild mac filtering tables while forcing both of them on.
1830 */
1831 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1832 if (err)
1833 netdev_warn(net_dev, "Can't set uc promisc (%d)\n", err);
1834 err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1835 if (err)
1836 netdev_warn(net_dev, "Can't set mc promisc (%d)\n", err);
1837
1838 /* Actual mac filtering tables reconstruction */
1839 err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 1);
1840 if (err)
1841 netdev_warn(net_dev, "Can't clear mac filters\n");
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001842 dpaa2_eth_add_mc_hw_addr(net_dev, priv);
1843 dpaa2_eth_add_uc_hw_addr(net_dev, priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001844
1845 /* Now we can clear both ucast and mcast promisc, without risking
1846 * to drop legitimate frames anymore.
1847 */
1848 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1849 if (err)
1850 netdev_warn(net_dev, "Can't clear ucast promisc\n");
1851 err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 0);
1852 if (err)
1853 netdev_warn(net_dev, "Can't clear mcast promisc\n");
1854
1855 return;
1856
1857force_promisc:
1858 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1859 if (err)
1860 netdev_warn(net_dev, "Can't set ucast promisc\n");
1861force_mc_promisc:
1862 err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1863 if (err)
1864 netdev_warn(net_dev, "Can't set mcast promisc\n");
1865}
1866
1867static int dpaa2_eth_set_features(struct net_device *net_dev,
1868 netdev_features_t features)
1869{
1870 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1871 netdev_features_t changed = features ^ net_dev->features;
1872 bool enable;
1873 int err;
1874
1875 if (changed & NETIF_F_RXCSUM) {
1876 enable = !!(features & NETIF_F_RXCSUM);
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001877 err = dpaa2_eth_set_rx_csum(priv, enable);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001878 if (err)
1879 return err;
1880 }
1881
1882 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
1883 enable = !!(features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001884 err = dpaa2_eth_set_tx_csum(priv, enable);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05001885 if (err)
1886 return err;
1887 }
1888
1889 return 0;
1890}
1891
Ioana Radulescu859f9982018-04-26 18:23:47 +08001892static int dpaa2_eth_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1893{
1894 struct dpaa2_eth_priv *priv = netdev_priv(dev);
1895 struct hwtstamp_config config;
1896
1897 if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
1898 return -EFAULT;
1899
1900 switch (config.tx_type) {
1901 case HWTSTAMP_TX_OFF:
1902 priv->tx_tstamp = false;
1903 break;
1904 case HWTSTAMP_TX_ON:
1905 priv->tx_tstamp = true;
1906 break;
1907 default:
1908 return -ERANGE;
1909 }
1910
1911 if (config.rx_filter == HWTSTAMP_FILTER_NONE) {
1912 priv->rx_tstamp = false;
1913 } else {
1914 priv->rx_tstamp = true;
1915 /* TS is set for all frame types, not only those requested */
1916 config.rx_filter = HWTSTAMP_FILTER_ALL;
1917 }
1918
1919 return copy_to_user(rq->ifr_data, &config, sizeof(config)) ?
1920 -EFAULT : 0;
1921}
1922
1923static int dpaa2_eth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1924{
Russell King4a841822020-02-27 12:00:21 +00001925 struct dpaa2_eth_priv *priv = netdev_priv(dev);
1926
Ioana Radulescu859f9982018-04-26 18:23:47 +08001927 if (cmd == SIOCSHWTSTAMP)
1928 return dpaa2_eth_ts_ioctl(dev, rq, cmd);
1929
Russell King4a841822020-02-27 12:00:21 +00001930 if (priv->mac)
1931 return phylink_mii_ioctl(priv->mac->phylink, rq, cmd);
1932
1933 return -EOPNOTSUPP;
Ioana Radulescu859f9982018-04-26 18:23:47 +08001934}
1935
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00001936static bool xdp_mtu_valid(struct dpaa2_eth_priv *priv, int mtu)
1937{
1938 int mfl, linear_mfl;
1939
1940 mfl = DPAA2_ETH_L2_MAX_FRM(mtu);
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +03001941 linear_mfl = priv->rx_buf_size - DPAA2_ETH_RX_HWA_SIZE -
Ioana Ciocoi Radulescu7b1eea12018-11-26 16:27:30 +00001942 dpaa2_eth_rx_head_room(priv) - XDP_PACKET_HEADROOM;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00001943
1944 if (mfl > linear_mfl) {
1945 netdev_warn(priv->net_dev, "Maximum MTU for XDP is %d\n",
1946 linear_mfl - VLAN_ETH_HLEN);
1947 return false;
1948 }
1949
1950 return true;
1951}
1952
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001953static int dpaa2_eth_set_rx_mfl(struct dpaa2_eth_priv *priv, int mtu, bool has_xdp)
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00001954{
1955 int mfl, err;
1956
1957 /* We enforce a maximum Rx frame length based on MTU only if we have
1958 * an XDP program attached (in order to avoid Rx S/G frames).
1959 * Otherwise, we accept all incoming frames as long as they are not
1960 * larger than maximum size supported in hardware
1961 */
1962 if (has_xdp)
1963 mfl = DPAA2_ETH_L2_MAX_FRM(mtu);
1964 else
1965 mfl = DPAA2_ETH_MFL;
1966
1967 err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token, mfl);
1968 if (err) {
1969 netdev_err(priv->net_dev, "dpni_set_max_frame_length failed\n");
1970 return err;
1971 }
1972
1973 return 0;
1974}
1975
1976static int dpaa2_eth_change_mtu(struct net_device *dev, int new_mtu)
1977{
1978 struct dpaa2_eth_priv *priv = netdev_priv(dev);
1979 int err;
1980
1981 if (!priv->xdp_prog)
1982 goto out;
1983
1984 if (!xdp_mtu_valid(priv, new_mtu))
1985 return -EINVAL;
1986
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001987 err = dpaa2_eth_set_rx_mfl(priv, new_mtu, true);
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00001988 if (err)
1989 return err;
1990
1991out:
1992 dev->mtu = new_mtu;
1993 return 0;
1994}
1995
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03001996static int dpaa2_eth_update_rx_buffer_headroom(struct dpaa2_eth_priv *priv, bool has_xdp)
Ioana Ciocoi Radulescu7b1eea12018-11-26 16:27:30 +00001997{
1998 struct dpni_buffer_layout buf_layout = {0};
1999 int err;
2000
2001 err = dpni_get_buffer_layout(priv->mc_io, 0, priv->mc_token,
2002 DPNI_QUEUE_RX, &buf_layout);
2003 if (err) {
2004 netdev_err(priv->net_dev, "dpni_get_buffer_layout failed\n");
2005 return err;
2006 }
2007
2008 /* Reserve extra headroom for XDP header size changes */
2009 buf_layout.data_head_room = dpaa2_eth_rx_head_room(priv) +
2010 (has_xdp ? XDP_PACKET_HEADROOM : 0);
2011 buf_layout.options = DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM;
2012 err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2013 DPNI_QUEUE_RX, &buf_layout);
2014 if (err) {
2015 netdev_err(priv->net_dev, "dpni_set_buffer_layout failed\n");
2016 return err;
2017 }
2018
2019 return 0;
2020}
2021
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002022static int dpaa2_eth_setup_xdp(struct net_device *dev, struct bpf_prog *prog)
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002023{
2024 struct dpaa2_eth_priv *priv = netdev_priv(dev);
2025 struct dpaa2_eth_channel *ch;
2026 struct bpf_prog *old;
2027 bool up, need_update;
2028 int i, err;
2029
2030 if (prog && !xdp_mtu_valid(priv, dev->mtu))
2031 return -EINVAL;
2032
Andrii Nakryiko85192db2019-11-17 09:28:03 -08002033 if (prog)
2034 bpf_prog_add(prog, priv->num_channels);
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002035
2036 up = netif_running(dev);
2037 need_update = (!!priv->xdp_prog != !!prog);
2038
2039 if (up)
2040 dpaa2_eth_stop(dev);
2041
Ioana Ciocoi Radulescu7b1eea12018-11-26 16:27:30 +00002042 /* While in xdp mode, enforce a maximum Rx frame size based on MTU.
2043 * Also, when switching between xdp/non-xdp modes we need to reconfigure
2044 * our Rx buffer layout. Buffer pool was drained on dpaa2_eth_stop,
2045 * so we are sure no old format buffers will be used from now on.
2046 */
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002047 if (need_update) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002048 err = dpaa2_eth_set_rx_mfl(priv, dev->mtu, !!prog);
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002049 if (err)
2050 goto out_err;
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002051 err = dpaa2_eth_update_rx_buffer_headroom(priv, !!prog);
Ioana Ciocoi Radulescu7b1eea12018-11-26 16:27:30 +00002052 if (err)
2053 goto out_err;
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002054 }
2055
2056 old = xchg(&priv->xdp_prog, prog);
2057 if (old)
2058 bpf_prog_put(old);
2059
2060 for (i = 0; i < priv->num_channels; i++) {
2061 ch = priv->channel[i];
2062 old = xchg(&ch->xdp.prog, prog);
2063 if (old)
2064 bpf_prog_put(old);
2065 }
2066
2067 if (up) {
2068 err = dpaa2_eth_open(dev);
2069 if (err)
2070 return err;
2071 }
2072
2073 return 0;
2074
2075out_err:
2076 if (prog)
2077 bpf_prog_sub(prog, priv->num_channels);
2078 if (up)
2079 dpaa2_eth_open(dev);
2080
2081 return err;
2082}
2083
2084static int dpaa2_eth_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2085{
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002086 switch (xdp->command) {
2087 case XDP_SETUP_PROG:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002088 return dpaa2_eth_setup_xdp(dev, xdp->prog);
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002089 default:
2090 return -EINVAL;
2091 }
2092
2093 return 0;
2094}
2095
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002096static int dpaa2_eth_xdp_create_fd(struct net_device *net_dev,
2097 struct xdp_frame *xdpf,
2098 struct dpaa2_fd *fd)
Ioana Radulescud678be12019-03-01 17:47:24 +00002099{
2100 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2101 struct device *dev = net_dev->dev.parent;
Ioana Radulescud678be12019-03-01 17:47:24 +00002102 unsigned int needed_headroom;
2103 struct dpaa2_eth_swa *swa;
Ioana Radulescud678be12019-03-01 17:47:24 +00002104 void *buffer_start, *aligned_start;
2105 dma_addr_t addr;
Ioana Radulescud678be12019-03-01 17:47:24 +00002106
2107 /* We require a minimum headroom to be able to transmit the frame.
2108 * Otherwise return an error and let the original net_device handle it
2109 */
2110 needed_headroom = dpaa2_eth_needed_headroom(priv, NULL);
2111 if (xdpf->headroom < needed_headroom)
2112 return -EINVAL;
2113
Ioana Radulescud678be12019-03-01 17:47:24 +00002114 /* Setup the FD fields */
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002115 memset(fd, 0, sizeof(*fd));
Ioana Radulescud678be12019-03-01 17:47:24 +00002116
2117 /* Align FD address, if possible */
2118 buffer_start = xdpf->data - needed_headroom;
2119 aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
2120 DPAA2_ETH_TX_BUF_ALIGN);
2121 if (aligned_start >= xdpf->data - xdpf->headroom)
2122 buffer_start = aligned_start;
2123
2124 swa = (struct dpaa2_eth_swa *)buffer_start;
2125 /* fill in necessary fields here */
2126 swa->type = DPAA2_ETH_SWA_XDP;
2127 swa->xdp.dma_size = xdpf->data + xdpf->len - buffer_start;
2128 swa->xdp.xdpf = xdpf;
2129
2130 addr = dma_map_single(dev, buffer_start,
2131 swa->xdp.dma_size,
2132 DMA_BIDIRECTIONAL);
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002133 if (unlikely(dma_mapping_error(dev, addr)))
Ioana Radulescud678be12019-03-01 17:47:24 +00002134 return -ENOMEM;
Ioana Radulescud678be12019-03-01 17:47:24 +00002135
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002136 dpaa2_fd_set_addr(fd, addr);
2137 dpaa2_fd_set_offset(fd, xdpf->data - buffer_start);
2138 dpaa2_fd_set_len(fd, xdpf->len);
2139 dpaa2_fd_set_format(fd, dpaa2_fd_single);
2140 dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
Ioana Radulescud678be12019-03-01 17:47:24 +00002141
2142 return 0;
2143}
2144
2145static int dpaa2_eth_xdp_xmit(struct net_device *net_dev, int n,
2146 struct xdp_frame **frames, u32 flags)
2147{
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002148 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002149 struct dpaa2_eth_xdp_fds *xdp_redirect_fds;
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002150 struct rtnl_link_stats64 *percpu_stats;
2151 struct dpaa2_eth_fq *fq;
Ioana Ciornei8665d972020-04-22 15:05:13 +03002152 struct dpaa2_fd *fds;
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002153 int enqueued, i, err;
Ioana Radulescud678be12019-03-01 17:47:24 +00002154
2155 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2156 return -EINVAL;
2157
2158 if (!netif_running(net_dev))
2159 return -ENETDOWN;
2160
Ioana Ciornei8665d972020-04-22 15:05:13 +03002161 fq = &priv->fq[smp_processor_id()];
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002162 xdp_redirect_fds = &fq->xdp_redirect_fds;
2163 fds = xdp_redirect_fds->fds;
Ioana Ciornei8665d972020-04-22 15:05:13 +03002164
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002165 percpu_stats = this_cpu_ptr(priv->percpu_stats);
Ioana Ciornei6aa40b92020-04-22 15:05:12 +03002166
Ioana Ciornei8665d972020-04-22 15:05:13 +03002167 /* create a FD for each xdp_frame in the list received */
Ioana Radulescud678be12019-03-01 17:47:24 +00002168 for (i = 0; i < n; i++) {
Ioana Ciornei8665d972020-04-22 15:05:13 +03002169 err = dpaa2_eth_xdp_create_fd(net_dev, frames[i], &fds[i]);
2170 if (err)
2171 break;
2172 }
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002173 xdp_redirect_fds->num = i;
Ioana Radulescud678be12019-03-01 17:47:24 +00002174
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002175 /* enqueue all the frame descriptors */
2176 enqueued = dpaa2_eth_xdp_flush(priv, fq, xdp_redirect_fds);
Ioana Radulescud678be12019-03-01 17:47:24 +00002177
Ioana Ciornei8665d972020-04-22 15:05:13 +03002178 /* update statistics */
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002179 percpu_stats->tx_packets += enqueued;
2180 for (i = 0; i < enqueued; i++)
Ioana Ciornei8665d972020-04-22 15:05:13 +03002181 percpu_stats->tx_bytes += dpaa2_fd_get_len(&fds[i]);
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002182 for (i = enqueued; i < n; i++)
Ioana Ciornei8665d972020-04-22 15:05:13 +03002183 xdp_return_frame_rx_napi(frames[i]);
2184
Ioana Ciornei38c440b2020-05-06 20:47:17 +03002185 return enqueued;
Ioana Radulescud678be12019-03-01 17:47:24 +00002186}
2187
Ioana Radulescu06d5b172019-06-11 14:50:01 +03002188static int update_xps(struct dpaa2_eth_priv *priv)
2189{
2190 struct net_device *net_dev = priv->net_dev;
2191 struct cpumask xps_mask;
2192 struct dpaa2_eth_fq *fq;
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002193 int i, num_queues, netdev_queues;
Ioana Radulescu06d5b172019-06-11 14:50:01 +03002194 int err = 0;
2195
2196 num_queues = dpaa2_eth_queue_count(priv);
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002197 netdev_queues = (net_dev->num_tc ? : 1) * num_queues;
Ioana Radulescu06d5b172019-06-11 14:50:01 +03002198
2199 /* The first <num_queues> entries in priv->fq array are Tx/Tx conf
2200 * queues, so only process those
2201 */
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002202 for (i = 0; i < netdev_queues; i++) {
2203 fq = &priv->fq[i % num_queues];
Ioana Radulescu06d5b172019-06-11 14:50:01 +03002204
2205 cpumask_clear(&xps_mask);
2206 cpumask_set_cpu(fq->target_cpu, &xps_mask);
2207
2208 err = netif_set_xps_queue(net_dev, &xps_mask, i);
2209 if (err) {
2210 netdev_warn_once(net_dev, "Error setting XPS queue\n");
2211 break;
2212 }
2213 }
2214
2215 return err;
2216}
2217
Ioana Ciorneie3ec13b2020-07-21 19:38:23 +03002218static int dpaa2_eth_setup_mqprio(struct net_device *net_dev,
2219 struct tc_mqprio_qopt *mqprio)
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002220{
2221 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002222 u8 num_tc, num_queues;
2223 int i;
2224
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002225 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
2226 num_queues = dpaa2_eth_queue_count(priv);
2227 num_tc = mqprio->num_tc;
2228
2229 if (num_tc == net_dev->num_tc)
2230 return 0;
2231
2232 if (num_tc > dpaa2_eth_tc_count(priv)) {
2233 netdev_err(net_dev, "Max %d traffic classes supported\n",
2234 dpaa2_eth_tc_count(priv));
Jesper Dangaard Brouerb89c1e62020-04-23 16:57:50 +02002235 return -EOPNOTSUPP;
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002236 }
2237
2238 if (!num_tc) {
2239 netdev_reset_tc(net_dev);
2240 netif_set_real_num_tx_queues(net_dev, num_queues);
2241 goto out;
2242 }
2243
2244 netdev_set_num_tc(net_dev, num_tc);
2245 netif_set_real_num_tx_queues(net_dev, num_tc * num_queues);
2246
2247 for (i = 0; i < num_tc; i++)
2248 netdev_set_tc_queue(net_dev, i, num_queues, i * num_queues);
2249
2250out:
2251 update_xps(priv);
2252
2253 return 0;
2254}
2255
Ioana Ciornei3657cda2020-07-21 19:38:25 +03002256#define bps_to_mbits(rate) (div_u64((rate), 1000000) * 8)
2257
2258static int dpaa2_eth_setup_tbf(struct net_device *net_dev, struct tc_tbf_qopt_offload *p)
2259{
2260 struct tc_tbf_qopt_offload_replace_params *cfg = &p->replace_params;
2261 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2262 struct dpni_tx_shaping_cfg tx_cr_shaper = { 0 };
2263 struct dpni_tx_shaping_cfg tx_er_shaper = { 0 };
2264 int err;
2265
2266 if (p->command == TC_TBF_STATS)
2267 return -EOPNOTSUPP;
2268
2269 /* Only per port Tx shaping */
2270 if (p->parent != TC_H_ROOT)
2271 return -EOPNOTSUPP;
2272
2273 if (p->command == TC_TBF_REPLACE) {
2274 if (cfg->max_size > DPAA2_ETH_MAX_BURST_SIZE) {
2275 netdev_err(net_dev, "burst size cannot be greater than %d\n",
2276 DPAA2_ETH_MAX_BURST_SIZE);
2277 return -EINVAL;
2278 }
2279
2280 tx_cr_shaper.max_burst_size = cfg->max_size;
2281 /* The TBF interface is in bytes/s, whereas DPAA2 expects the
2282 * rate in Mbits/s
2283 */
2284 tx_cr_shaper.rate_limit = bps_to_mbits(cfg->rate.rate_bytes_ps);
2285 }
2286
2287 err = dpni_set_tx_shaping(priv->mc_io, 0, priv->mc_token, &tx_cr_shaper,
2288 &tx_er_shaper, 0);
2289 if (err) {
2290 netdev_err(net_dev, "dpni_set_tx_shaping() = %d\n", err);
2291 return err;
2292 }
2293
2294 return 0;
2295}
2296
Ioana Ciorneie3ec13b2020-07-21 19:38:23 +03002297static int dpaa2_eth_setup_tc(struct net_device *net_dev,
2298 enum tc_setup_type type, void *type_data)
2299{
2300 switch (type) {
2301 case TC_SETUP_QDISC_MQPRIO:
2302 return dpaa2_eth_setup_mqprio(net_dev, type_data);
Ioana Ciornei3657cda2020-07-21 19:38:25 +03002303 case TC_SETUP_QDISC_TBF:
2304 return dpaa2_eth_setup_tbf(net_dev, type_data);
Ioana Ciorneie3ec13b2020-07-21 19:38:23 +03002305 default:
2306 return -EOPNOTSUPP;
2307 }
2308}
2309
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002310static const struct net_device_ops dpaa2_eth_ops = {
2311 .ndo_open = dpaa2_eth_open,
2312 .ndo_start_xmit = dpaa2_eth_tx,
2313 .ndo_stop = dpaa2_eth_stop,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002314 .ndo_set_mac_address = dpaa2_eth_set_addr,
2315 .ndo_get_stats64 = dpaa2_eth_get_stats,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002316 .ndo_set_rx_mode = dpaa2_eth_set_rx_mode,
2317 .ndo_set_features = dpaa2_eth_set_features,
Ioana Radulescu859f9982018-04-26 18:23:47 +08002318 .ndo_do_ioctl = dpaa2_eth_ioctl,
Ioana Ciocoi Radulescu7e273a82018-11-26 16:27:29 +00002319 .ndo_change_mtu = dpaa2_eth_change_mtu,
2320 .ndo_bpf = dpaa2_eth_xdp,
Ioana Radulescud678be12019-03-01 17:47:24 +00002321 .ndo_xdp_xmit = dpaa2_eth_xdp_xmit,
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03002322 .ndo_setup_tc = dpaa2_eth_setup_tc,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002323};
2324
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002325static void dpaa2_eth_cdan_cb(struct dpaa2_io_notification_ctx *ctx)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002326{
2327 struct dpaa2_eth_channel *ch;
2328
2329 ch = container_of(ctx, struct dpaa2_eth_channel, nctx);
Ioana Radulescu85047ab2017-04-28 04:50:31 -05002330
2331 /* Update NAPI statistics */
2332 ch->stats.cdan++;
2333
Jiafei Pan6c33ae12020-08-03 23:10:08 +03002334 napi_schedule(&ch->napi);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002335}
2336
2337/* Allocate and configure a DPCON object */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002338static struct fsl_mc_device *dpaa2_eth_setup_dpcon(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002339{
2340 struct fsl_mc_device *dpcon;
2341 struct device *dev = priv->net_dev->dev.parent;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002342 int err;
2343
2344 err = fsl_mc_object_allocate(to_fsl_mc_device(dev),
2345 FSL_MC_POOL_DPCON, &dpcon);
2346 if (err) {
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002347 if (err == -ENXIO)
2348 err = -EPROBE_DEFER;
2349 else
2350 dev_info(dev, "Not enough DPCONs, will go on as-is\n");
2351 return ERR_PTR(err);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002352 }
2353
2354 err = dpcon_open(priv->mc_io, 0, dpcon->obj_desc.id, &dpcon->mc_handle);
2355 if (err) {
2356 dev_err(dev, "dpcon_open() failed\n");
Ioana Radulescuf6dda802017-10-29 08:20:39 +00002357 goto free;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002358 }
2359
2360 err = dpcon_reset(priv->mc_io, 0, dpcon->mc_handle);
2361 if (err) {
2362 dev_err(dev, "dpcon_reset() failed\n");
Ioana Radulescuf6dda802017-10-29 08:20:39 +00002363 goto close;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002364 }
2365
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002366 err = dpcon_enable(priv->mc_io, 0, dpcon->mc_handle);
2367 if (err) {
2368 dev_err(dev, "dpcon_enable() failed\n");
Ioana Radulescuf6dda802017-10-29 08:20:39 +00002369 goto close;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002370 }
2371
2372 return dpcon;
2373
Ioana Radulescuf6dda802017-10-29 08:20:39 +00002374close:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002375 dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
Ioana Radulescuf6dda802017-10-29 08:20:39 +00002376free:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002377 fsl_mc_object_free(dpcon);
2378
YueHaibing02afa9c2020-08-04 21:26:43 +08002379 return ERR_PTR(err);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002380}
2381
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002382static void dpaa2_eth_free_dpcon(struct dpaa2_eth_priv *priv,
2383 struct fsl_mc_device *dpcon)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002384{
2385 dpcon_disable(priv->mc_io, 0, dpcon->mc_handle);
2386 dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
2387 fsl_mc_object_free(dpcon);
2388}
2389
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002390static struct dpaa2_eth_channel *dpaa2_eth_alloc_channel(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002391{
2392 struct dpaa2_eth_channel *channel;
2393 struct dpcon_attr attr;
2394 struct device *dev = priv->net_dev->dev.parent;
2395 int err;
2396
2397 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
2398 if (!channel)
2399 return NULL;
2400
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002401 channel->dpcon = dpaa2_eth_setup_dpcon(priv);
YueHaibing02afa9c2020-08-04 21:26:43 +08002402 if (IS_ERR(channel->dpcon)) {
2403 err = PTR_ERR(channel->dpcon);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002404 goto err_setup;
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002405 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002406
2407 err = dpcon_get_attributes(priv->mc_io, 0, channel->dpcon->mc_handle,
2408 &attr);
2409 if (err) {
2410 dev_err(dev, "dpcon_get_attributes() failed\n");
2411 goto err_get_attr;
2412 }
2413
2414 channel->dpcon_id = attr.id;
2415 channel->ch_id = attr.qbman_ch_id;
2416 channel->priv = priv;
2417
2418 return channel;
2419
2420err_get_attr:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002421 dpaa2_eth_free_dpcon(priv, channel->dpcon);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002422err_setup:
2423 kfree(channel);
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002424 return ERR_PTR(err);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002425}
2426
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002427static void dpaa2_eth_free_channel(struct dpaa2_eth_priv *priv,
2428 struct dpaa2_eth_channel *channel)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002429{
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002430 dpaa2_eth_free_dpcon(priv, channel->dpcon);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002431 kfree(channel);
2432}
2433
2434/* DPIO setup: allocate and configure QBMan channels, setup core affinity
2435 * and register data availability notifications
2436 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002437static int dpaa2_eth_setup_dpio(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002438{
2439 struct dpaa2_io_notification_ctx *nctx;
2440 struct dpaa2_eth_channel *channel;
2441 struct dpcon_notification_cfg dpcon_notif_cfg;
2442 struct device *dev = priv->net_dev->dev.parent;
2443 int i, err;
2444
2445 /* We want the ability to spread ingress traffic (RX, TX conf) to as
2446 * many cores as possible, so we need one channel for each core
2447 * (unless there's fewer queues than cores, in which case the extra
2448 * channels would be wasted).
2449 * Allocate one channel per core and register it to the core's
2450 * affine DPIO. If not enough channels are available for all cores
2451 * or if some cores don't have an affine DPIO, there will be no
2452 * ingress frame processing on those cores.
2453 */
2454 cpumask_clear(&priv->dpio_cpumask);
2455 for_each_online_cpu(i) {
2456 /* Try to allocate a channel */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002457 channel = dpaa2_eth_alloc_channel(priv);
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002458 if (IS_ERR_OR_NULL(channel)) {
Ioana Radulescubd8460f2019-05-24 18:15:16 +03002459 err = PTR_ERR_OR_ZERO(channel);
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002460 if (err != -EPROBE_DEFER)
2461 dev_info(dev,
2462 "No affine channel for cpu %d and above\n", i);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002463 goto err_alloc_ch;
2464 }
2465
2466 priv->channel[priv->num_channels] = channel;
2467
2468 nctx = &channel->nctx;
2469 nctx->is_cdan = 1;
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002470 nctx->cb = dpaa2_eth_cdan_cb;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002471 nctx->id = channel->ch_id;
2472 nctx->desired_cpu = i;
2473
2474 /* Register the new context */
Ioana Radulescu7ec05962018-01-05 05:04:32 -06002475 channel->dpio = dpaa2_io_service_select(i);
Ioana Ciornei47441f72018-12-10 16:50:19 +00002476 err = dpaa2_io_service_register(channel->dpio, nctx, dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002477 if (err) {
Ioana Radulescu5206d8d2017-06-06 10:00:33 -05002478 dev_dbg(dev, "No affine DPIO for cpu %d\n", i);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002479 /* If no affine DPIO for this core, there's probably
Ioana Radulescu5206d8d2017-06-06 10:00:33 -05002480 * none available for next cores either. Signal we want
2481 * to retry later, in case the DPIO devices weren't
2482 * probed yet.
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002483 */
Ioana Radulescu5206d8d2017-06-06 10:00:33 -05002484 err = -EPROBE_DEFER;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002485 goto err_service_reg;
2486 }
2487
2488 /* Register DPCON notification with MC */
2489 dpcon_notif_cfg.dpio_id = nctx->dpio_id;
2490 dpcon_notif_cfg.priority = 0;
2491 dpcon_notif_cfg.user_ctx = nctx->qman64;
2492 err = dpcon_set_notification(priv->mc_io, 0,
2493 channel->dpcon->mc_handle,
2494 &dpcon_notif_cfg);
2495 if (err) {
2496 dev_err(dev, "dpcon_set_notification failed()\n");
2497 goto err_set_cdan;
2498 }
2499
2500 /* If we managed to allocate a channel and also found an affine
2501 * DPIO for this core, add it to the final mask
2502 */
2503 cpumask_set_cpu(i, &priv->dpio_cpumask);
2504 priv->num_channels++;
2505
2506 /* Stop if we already have enough channels to accommodate all
2507 * RX and TX conf queues
2508 */
Ioana Ciocoi Radulescub0e4f372018-11-14 11:48:35 +00002509 if (priv->num_channels == priv->dpni_attrs.num_queues)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002510 break;
2511 }
2512
2513 return 0;
2514
2515err_set_cdan:
Ioana Ciornei47441f72018-12-10 16:50:19 +00002516 dpaa2_io_service_deregister(channel->dpio, nctx, dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002517err_service_reg:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002518 dpaa2_eth_free_channel(priv, channel);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002519err_alloc_ch:
Ioana Ciornei5aa42772019-11-12 18:21:52 +02002520 if (err == -EPROBE_DEFER) {
2521 for (i = 0; i < priv->num_channels; i++) {
2522 channel = priv->channel[i];
2523 nctx = &channel->nctx;
2524 dpaa2_io_service_deregister(channel->dpio, nctx, dev);
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002525 dpaa2_eth_free_channel(priv, channel);
Ioana Ciornei5aa42772019-11-12 18:21:52 +02002526 }
2527 priv->num_channels = 0;
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002528 return err;
Ioana Ciornei5aa42772019-11-12 18:21:52 +02002529 }
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002530
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002531 if (cpumask_empty(&priv->dpio_cpumask)) {
2532 dev_err(dev, "No cpu with an affine DPIO/DPCON\n");
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002533 return -ENODEV;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002534 }
2535
2536 dev_info(dev, "Cores %*pbl available for processing ingress traffic\n",
2537 cpumask_pr_args(&priv->dpio_cpumask));
2538
2539 return 0;
2540}
2541
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002542static void dpaa2_eth_free_dpio(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002543{
Ioana Ciornei47441f72018-12-10 16:50:19 +00002544 struct device *dev = priv->net_dev->dev.parent;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002545 struct dpaa2_eth_channel *ch;
Ioana Ciornei47441f72018-12-10 16:50:19 +00002546 int i;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002547
2548 /* deregister CDAN notifications and free channels */
2549 for (i = 0; i < priv->num_channels; i++) {
2550 ch = priv->channel[i];
Ioana Ciornei47441f72018-12-10 16:50:19 +00002551 dpaa2_io_service_deregister(ch->dpio, &ch->nctx, dev);
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002552 dpaa2_eth_free_channel(priv, ch);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002553 }
2554}
2555
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002556static struct dpaa2_eth_channel *dpaa2_eth_get_affine_channel(struct dpaa2_eth_priv *priv,
2557 int cpu)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002558{
2559 struct device *dev = priv->net_dev->dev.parent;
2560 int i;
2561
2562 for (i = 0; i < priv->num_channels; i++)
2563 if (priv->channel[i]->nctx.desired_cpu == cpu)
2564 return priv->channel[i];
2565
2566 /* We should never get here. Issue a warning and return
2567 * the first channel, because it's still better than nothing
2568 */
2569 dev_warn(dev, "No affine channel found for cpu %d\n", cpu);
2570
2571 return priv->channel[0];
2572}
2573
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002574static void dpaa2_eth_set_fq_affinity(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002575{
2576 struct device *dev = priv->net_dev->dev.parent;
2577 struct dpaa2_eth_fq *fq;
2578 int rx_cpu, txc_cpu;
Ioana Radulescu06d5b172019-06-11 14:50:01 +03002579 int i;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002580
2581 /* For each FQ, pick one channel/CPU to deliver frames to.
2582 * This may well change at runtime, either through irqbalance or
2583 * through direct user intervention.
2584 */
2585 rx_cpu = txc_cpu = cpumask_first(&priv->dpio_cpumask);
2586
2587 for (i = 0; i < priv->num_fqs; i++) {
2588 fq = &priv->fq[i];
2589 switch (fq->type) {
2590 case DPAA2_RX_FQ:
2591 fq->target_cpu = rx_cpu;
2592 rx_cpu = cpumask_next(rx_cpu, &priv->dpio_cpumask);
2593 if (rx_cpu >= nr_cpu_ids)
2594 rx_cpu = cpumask_first(&priv->dpio_cpumask);
2595 break;
2596 case DPAA2_TX_CONF_FQ:
2597 fq->target_cpu = txc_cpu;
2598 txc_cpu = cpumask_next(txc_cpu, &priv->dpio_cpumask);
2599 if (txc_cpu >= nr_cpu_ids)
2600 txc_cpu = cpumask_first(&priv->dpio_cpumask);
2601 break;
2602 default:
2603 dev_err(dev, "Unknown FQ type: %d\n", fq->type);
2604 }
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002605 fq->channel = dpaa2_eth_get_affine_channel(priv, fq->target_cpu);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002606 }
Ioana Radulescu06d5b172019-06-11 14:50:01 +03002607
2608 update_xps(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002609}
2610
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002611static void dpaa2_eth_setup_fqs(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002612{
Ioana Radulescu685e39e2020-05-31 00:08:08 +03002613 int i, j;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002614
2615 /* We have one TxConf FQ per Tx flow.
2616 * The number of Tx and Rx queues is the same.
2617 * Tx queues come first in the fq array.
2618 */
2619 for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
2620 priv->fq[priv->num_fqs].type = DPAA2_TX_CONF_FQ;
2621 priv->fq[priv->num_fqs].consume = dpaa2_eth_tx_conf;
2622 priv->fq[priv->num_fqs++].flowid = (u16)i;
2623 }
2624
Ioana Radulescu685e39e2020-05-31 00:08:08 +03002625 for (j = 0; j < dpaa2_eth_tc_count(priv); j++) {
2626 for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
2627 priv->fq[priv->num_fqs].type = DPAA2_RX_FQ;
2628 priv->fq[priv->num_fqs].consume = dpaa2_eth_rx;
2629 priv->fq[priv->num_fqs].tc = (u8)j;
2630 priv->fq[priv->num_fqs++].flowid = (u16)i;
2631 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002632 }
2633
2634 /* For each FQ, decide on which core to process incoming frames */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002635 dpaa2_eth_set_fq_affinity(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002636}
2637
2638/* Allocate and configure one buffer pool for each interface */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002639static int dpaa2_eth_setup_dpbp(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002640{
2641 int err;
2642 struct fsl_mc_device *dpbp_dev;
2643 struct device *dev = priv->net_dev->dev.parent;
Ioana Radulescu05fa39c2017-06-06 10:00:37 -05002644 struct dpbp_attr dpbp_attrs;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002645
2646 err = fsl_mc_object_allocate(to_fsl_mc_device(dev), FSL_MC_POOL_DPBP,
2647 &dpbp_dev);
2648 if (err) {
Ioana Ciorneid7f5a9d2018-11-09 15:26:45 +00002649 if (err == -ENXIO)
2650 err = -EPROBE_DEFER;
2651 else
2652 dev_err(dev, "DPBP device allocation failed\n");
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002653 return err;
2654 }
2655
2656 priv->dpbp_dev = dpbp_dev;
2657
2658 err = dpbp_open(priv->mc_io, 0, priv->dpbp_dev->obj_desc.id,
2659 &dpbp_dev->mc_handle);
2660 if (err) {
2661 dev_err(dev, "dpbp_open() failed\n");
2662 goto err_open;
2663 }
2664
Ioana Radulescud00defe2017-06-06 10:00:32 -05002665 err = dpbp_reset(priv->mc_io, 0, dpbp_dev->mc_handle);
2666 if (err) {
2667 dev_err(dev, "dpbp_reset() failed\n");
2668 goto err_reset;
2669 }
2670
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002671 err = dpbp_enable(priv->mc_io, 0, dpbp_dev->mc_handle);
2672 if (err) {
2673 dev_err(dev, "dpbp_enable() failed\n");
2674 goto err_enable;
2675 }
2676
2677 err = dpbp_get_attributes(priv->mc_io, 0, dpbp_dev->mc_handle,
Ioana Radulescu05fa39c2017-06-06 10:00:37 -05002678 &dpbp_attrs);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002679 if (err) {
2680 dev_err(dev, "dpbp_get_attributes() failed\n");
2681 goto err_get_attr;
2682 }
Ioana Radulescu05fa39c2017-06-06 10:00:37 -05002683 priv->bpid = dpbp_attrs.bpid;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002684
2685 return 0;
2686
2687err_get_attr:
2688 dpbp_disable(priv->mc_io, 0, dpbp_dev->mc_handle);
2689err_enable:
Ioana Radulescud00defe2017-06-06 10:00:32 -05002690err_reset:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002691 dpbp_close(priv->mc_io, 0, dpbp_dev->mc_handle);
2692err_open:
2693 fsl_mc_object_free(dpbp_dev);
2694
2695 return err;
2696}
2697
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002698static void dpaa2_eth_free_dpbp(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002699{
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002700 dpaa2_eth_drain_pool(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05002701 dpbp_disable(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
2702 dpbp_close(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
2703 fsl_mc_object_free(priv->dpbp_dev);
2704}
2705
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002706static int dpaa2_eth_set_buffer_layout(struct dpaa2_eth_priv *priv)
Ioana Radulescu308f64e2017-10-29 08:20:40 +00002707{
2708 struct device *dev = priv->net_dev->dev.parent;
2709 struct dpni_buffer_layout buf_layout = {0};
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00002710 u16 rx_buf_align;
Ioana Radulescu308f64e2017-10-29 08:20:40 +00002711 int err;
2712
Bogdan Purcareata8a4fd872017-10-29 08:20:42 +00002713 /* We need to check for WRIOP version 1.0.0, but depending on the MC
2714 * version, this number is not always provided correctly on rev1.
2715 * We need to check for both alternatives in this situation.
2716 */
2717 if (priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(0, 0, 0) ||
2718 priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(1, 0, 0))
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00002719 rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN_REV1;
Bogdan Purcareata8a4fd872017-10-29 08:20:42 +00002720 else
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00002721 rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN;
Bogdan Purcareata8a4fd872017-10-29 08:20:42 +00002722
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +03002723 /* We need to ensure that the buffer size seen by WRIOP is a multiple
2724 * of 64 or 256 bytes depending on the WRIOP version.
2725 */
2726 priv->rx_buf_size = ALIGN_DOWN(DPAA2_ETH_RX_BUF_SIZE, rx_buf_align);
2727
Bogdan Purcareata4b2d9fe2017-10-29 08:20:43 +00002728 /* tx buffer */
Ioana Radulescu308f64e2017-10-29 08:20:40 +00002729 buf_layout.private_data_size = DPAA2_ETH_SWA_SIZE;
Ioana Radulescu859f9982018-04-26 18:23:47 +08002730 buf_layout.pass_timestamp = true;
2731 buf_layout.options = DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE |
2732 DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
Ioana Radulescu308f64e2017-10-29 08:20:40 +00002733 err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2734 DPNI_QUEUE_TX, &buf_layout);
2735 if (err) {
2736 dev_err(dev, "dpni_set_buffer_layout(TX) failed\n");
2737 return err;
2738 }
2739
2740 /* tx-confirm buffer */
Ioana Radulescu859f9982018-04-26 18:23:47 +08002741 buf_layout.options = DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
Ioana Radulescu308f64e2017-10-29 08:20:40 +00002742 err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2743 DPNI_QUEUE_TX_CONFIRM, &buf_layout);
2744 if (err) {
2745 dev_err(dev, "dpni_set_buffer_layout(TX_CONF) failed\n");
2746 return err;
2747 }
2748
Bogdan Purcareata4b2d9fe2017-10-29 08:20:43 +00002749 /* Now that we've set our tx buffer layout, retrieve the minimum
2750 * required tx data offset.
2751 */
2752 err = dpni_get_tx_data_offset(priv->mc_io, 0, priv->mc_token,
2753 &priv->tx_data_offset);
2754 if (err) {
2755 dev_err(dev, "dpni_get_tx_data_offset() failed\n");
2756 return err;
2757 }
2758
2759 if ((priv->tx_data_offset % 64) != 0)
2760 dev_warn(dev, "Tx data offset (%d) not a multiple of 64B\n",
2761 priv->tx_data_offset);
2762
2763 /* rx buffer */
Ioana Radulescu2b7c86e2017-12-08 06:47:56 -06002764 buf_layout.pass_frame_status = true;
Bogdan Purcareata4b2d9fe2017-10-29 08:20:43 +00002765 buf_layout.pass_parser_result = true;
Ioana Ciocoi Radulescu27c87482019-02-04 17:00:35 +00002766 buf_layout.data_align = rx_buf_align;
Bogdan Purcareata4b2d9fe2017-10-29 08:20:43 +00002767 buf_layout.data_head_room = dpaa2_eth_rx_head_room(priv);
2768 buf_layout.private_data_size = 0;
2769 buf_layout.options = DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
2770 DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2771 DPNI_BUF_LAYOUT_OPT_DATA_ALIGN |
Ioana Radulescu859f9982018-04-26 18:23:47 +08002772 DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
2773 DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
Bogdan Purcareata4b2d9fe2017-10-29 08:20:43 +00002774 err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2775 DPNI_QUEUE_RX, &buf_layout);
2776 if (err) {
2777 dev_err(dev, "dpni_set_buffer_layout(RX) failed\n");
2778 return err;
2779 }
2780
Ioana Radulescu308f64e2017-10-29 08:20:40 +00002781 return 0;
2782}
2783
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00002784#define DPNI_ENQUEUE_FQID_VER_MAJOR 7
2785#define DPNI_ENQUEUE_FQID_VER_MINOR 9
2786
2787static inline int dpaa2_eth_enqueue_qd(struct dpaa2_eth_priv *priv,
2788 struct dpaa2_eth_fq *fq,
Ioana Ciornei48c04812020-04-22 15:05:10 +03002789 struct dpaa2_fd *fd, u8 prio,
Ioana Ciornei6ff80442020-04-22 15:05:11 +03002790 u32 num_frames __always_unused,
Ioana Ciornei48c04812020-04-22 15:05:10 +03002791 int *frames_enqueued)
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00002792{
Ioana Ciornei48c04812020-04-22 15:05:10 +03002793 int err;
2794
2795 err = dpaa2_io_service_enqueue_qd(fq->channel->dpio,
2796 priv->tx_qdid, prio,
2797 fq->tx_qdbin, fd);
2798 if (!err && frames_enqueued)
2799 *frames_enqueued = 1;
2800 return err;
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00002801}
2802
Ioana Ciornei6ff80442020-04-22 15:05:11 +03002803static inline int dpaa2_eth_enqueue_fq_multiple(struct dpaa2_eth_priv *priv,
2804 struct dpaa2_eth_fq *fq,
2805 struct dpaa2_fd *fd,
2806 u8 prio, u32 num_frames,
2807 int *frames_enqueued)
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00002808{
Ioana Ciornei48c04812020-04-22 15:05:10 +03002809 int err;
2810
Ioana Ciornei6ff80442020-04-22 15:05:11 +03002811 err = dpaa2_io_service_enqueue_multiple_fq(fq->channel->dpio,
2812 fq->tx_fqid[prio],
2813 fd, num_frames);
2814
2815 if (err == 0)
2816 return -EBUSY;
2817
2818 if (frames_enqueued)
2819 *frames_enqueued = err;
2820 return 0;
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00002821}
2822
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002823static void dpaa2_eth_set_enqueue_mode(struct dpaa2_eth_priv *priv)
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00002824{
2825 if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_ENQUEUE_FQID_VER_MAJOR,
2826 DPNI_ENQUEUE_FQID_VER_MINOR) < 0)
2827 priv->enqueue = dpaa2_eth_enqueue_qd;
2828 else
Ioana Ciornei6ff80442020-04-22 15:05:11 +03002829 priv->enqueue = dpaa2_eth_enqueue_fq_multiple;
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00002830}
2831
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002832static int dpaa2_eth_set_pause(struct dpaa2_eth_priv *priv)
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03002833{
2834 struct device *dev = priv->net_dev->dev.parent;
2835 struct dpni_link_cfg link_cfg = {0};
2836 int err;
2837
2838 /* Get the default link options so we don't override other flags */
2839 err = dpni_get_link_cfg(priv->mc_io, 0, priv->mc_token, &link_cfg);
2840 if (err) {
2841 dev_err(dev, "dpni_get_link_cfg() failed\n");
2842 return err;
2843 }
2844
2845 /* By default, enable both Rx and Tx pause frames */
2846 link_cfg.options |= DPNI_LINK_OPT_PAUSE;
2847 link_cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
2848 err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &link_cfg);
2849 if (err) {
2850 dev_err(dev, "dpni_set_link_cfg() failed\n");
2851 return err;
2852 }
2853
2854 priv->link_state.options = link_cfg.options;
2855
2856 return 0;
2857}
2858
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002859static void dpaa2_eth_update_tx_fqids(struct dpaa2_eth_priv *priv)
Ioana Radulescua690af4f2019-10-16 10:36:23 +03002860{
2861 struct dpni_queue_id qid = {0};
2862 struct dpaa2_eth_fq *fq;
2863 struct dpni_queue queue;
2864 int i, j, err;
2865
2866 /* We only use Tx FQIDs for FQID-based enqueue, so check
2867 * if DPNI version supports it before updating FQIDs
2868 */
2869 if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_ENQUEUE_FQID_VER_MAJOR,
2870 DPNI_ENQUEUE_FQID_VER_MINOR) < 0)
2871 return;
2872
2873 for (i = 0; i < priv->num_fqs; i++) {
2874 fq = &priv->fq[i];
2875 if (fq->type != DPAA2_TX_CONF_FQ)
2876 continue;
2877 for (j = 0; j < dpaa2_eth_tc_count(priv); j++) {
2878 err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2879 DPNI_QUEUE_TX, j, fq->flowid,
2880 &queue, &qid);
2881 if (err)
2882 goto out_err;
2883
2884 fq->tx_fqid[j] = qid.fqid;
2885 if (fq->tx_fqid[j] == 0)
2886 goto out_err;
2887 }
2888 }
2889
Ioana Ciornei6ff80442020-04-22 15:05:11 +03002890 priv->enqueue = dpaa2_eth_enqueue_fq_multiple;
Ioana Radulescua690af4f2019-10-16 10:36:23 +03002891
2892 return;
2893
2894out_err:
2895 netdev_info(priv->net_dev,
2896 "Error reading Tx FQID, fallback to QDID-based enqueue\n");
2897 priv->enqueue = dpaa2_eth_enqueue_qd;
2898}
2899
Ioana Radulescu6aa90fe2020-05-31 00:08:09 +03002900/* Configure ingress classification based on VLAN PCP */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03002901static int dpaa2_eth_set_vlan_qos(struct dpaa2_eth_priv *priv)
Ioana Radulescu6aa90fe2020-05-31 00:08:09 +03002902{
2903 struct device *dev = priv->net_dev->dev.parent;
2904 struct dpkg_profile_cfg kg_cfg = {0};
2905 struct dpni_qos_tbl_cfg qos_cfg = {0};
2906 struct dpni_rule_cfg key_params;
2907 void *dma_mem, *key, *mask;
2908 u8 key_size = 2; /* VLAN TCI field */
2909 int i, pcp, err;
2910
2911 /* VLAN-based classification only makes sense if we have multiple
2912 * traffic classes.
2913 * Also, we need to extract just the 3-bit PCP field from the VLAN
2914 * header and we can only do that by using a mask
2915 */
2916 if (dpaa2_eth_tc_count(priv) == 1 || !dpaa2_eth_fs_mask_enabled(priv)) {
2917 dev_dbg(dev, "VLAN-based QoS classification not supported\n");
2918 return -EOPNOTSUPP;
2919 }
2920
2921 dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL);
2922 if (!dma_mem)
2923 return -ENOMEM;
2924
2925 kg_cfg.num_extracts = 1;
2926 kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
2927 kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_VLAN;
2928 kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
2929 kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_VLAN_TCI;
2930
2931 err = dpni_prepare_key_cfg(&kg_cfg, dma_mem);
2932 if (err) {
2933 dev_err(dev, "dpni_prepare_key_cfg failed\n");
2934 goto out_free_tbl;
2935 }
2936
2937 /* set QoS table */
2938 qos_cfg.default_tc = 0;
2939 qos_cfg.discard_on_miss = 0;
2940 qos_cfg.key_cfg_iova = dma_map_single(dev, dma_mem,
2941 DPAA2_CLASSIFIER_DMA_SIZE,
2942 DMA_TO_DEVICE);
2943 if (dma_mapping_error(dev, qos_cfg.key_cfg_iova)) {
2944 dev_err(dev, "QoS table DMA mapping failed\n");
2945 err = -ENOMEM;
2946 goto out_free_tbl;
2947 }
2948
2949 err = dpni_set_qos_table(priv->mc_io, 0, priv->mc_token, &qos_cfg);
2950 if (err) {
2951 dev_err(dev, "dpni_set_qos_table failed\n");
2952 goto out_unmap_tbl;
2953 }
2954
2955 /* Add QoS table entries */
2956 key = kzalloc(key_size * 2, GFP_KERNEL);
2957 if (!key) {
2958 err = -ENOMEM;
2959 goto out_unmap_tbl;
2960 }
2961 mask = key + key_size;
2962 *(__be16 *)mask = cpu_to_be16(VLAN_PRIO_MASK);
2963
2964 key_params.key_iova = dma_map_single(dev, key, key_size * 2,
2965 DMA_TO_DEVICE);
2966 if (dma_mapping_error(dev, key_params.key_iova)) {
2967 dev_err(dev, "Qos table entry DMA mapping failed\n");
2968 err = -ENOMEM;
2969 goto out_free_key;
2970 }
2971
2972 key_params.mask_iova = key_params.key_iova + key_size;
2973 key_params.key_size = key_size;
2974
2975 /* We add rules for PCP-based distribution starting with highest
2976 * priority (VLAN PCP = 7). If this DPNI doesn't have enough traffic
2977 * classes to accommodate all priority levels, the lowest ones end up
2978 * on TC 0 which was configured as default
2979 */
2980 for (i = dpaa2_eth_tc_count(priv) - 1, pcp = 7; i >= 0; i--, pcp--) {
2981 *(__be16 *)key = cpu_to_be16(pcp << VLAN_PRIO_SHIFT);
2982 dma_sync_single_for_device(dev, key_params.key_iova,
2983 key_size * 2, DMA_TO_DEVICE);
2984
2985 err = dpni_add_qos_entry(priv->mc_io, 0, priv->mc_token,
2986 &key_params, i, i);
2987 if (err) {
2988 dev_err(dev, "dpni_add_qos_entry failed\n");
2989 dpni_clear_qos_table(priv->mc_io, 0, priv->mc_token);
2990 goto out_unmap_key;
2991 }
2992 }
2993
2994 priv->vlan_cls_enabled = true;
2995
2996 /* Table and key memory is not persistent, clean everything up after
2997 * configuration is finished
2998 */
2999out_unmap_key:
3000 dma_unmap_single(dev, key_params.key_iova, key_size * 2, DMA_TO_DEVICE);
3001out_free_key:
3002 kfree(key);
3003out_unmap_tbl:
3004 dma_unmap_single(dev, qos_cfg.key_cfg_iova, DPAA2_CLASSIFIER_DMA_SIZE,
3005 DMA_TO_DEVICE);
3006out_free_tbl:
3007 kfree(dma_mem);
3008
3009 return err;
3010}
3011
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003012/* Configure the DPNI object this interface is associated with */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003013static int dpaa2_eth_setup_dpni(struct fsl_mc_device *ls_dev)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003014{
3015 struct device *dev = &ls_dev->dev;
3016 struct dpaa2_eth_priv *priv;
3017 struct net_device *net_dev;
3018 int err;
3019
3020 net_dev = dev_get_drvdata(dev);
3021 priv = netdev_priv(net_dev);
3022
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003023 /* get a handle for the DPNI object */
Ioana Radulescu50eacbc2017-06-06 10:00:36 -05003024 err = dpni_open(priv->mc_io, 0, ls_dev->obj_desc.id, &priv->mc_token);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003025 if (err) {
3026 dev_err(dev, "dpni_open() failed\n");
Ioana Radulescuf6dda802017-10-29 08:20:39 +00003027 return err;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003028 }
3029
Ioana Radulescu311cffa2018-03-23 08:44:09 -05003030 /* Check if we can work with this DPNI object */
3031 err = dpni_get_api_version(priv->mc_io, 0, &priv->dpni_ver_major,
3032 &priv->dpni_ver_minor);
3033 if (err) {
3034 dev_err(dev, "dpni_get_api_version() failed\n");
3035 goto close;
3036 }
3037 if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_VER_MAJOR, DPNI_VER_MINOR) < 0) {
3038 dev_err(dev, "DPNI version %u.%u not supported, need >= %u.%u\n",
3039 priv->dpni_ver_major, priv->dpni_ver_minor,
3040 DPNI_VER_MAJOR, DPNI_VER_MINOR);
3041 err = -ENOTSUPP;
3042 goto close;
3043 }
3044
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003045 ls_dev->mc_io = priv->mc_io;
3046 ls_dev->mc_handle = priv->mc_token;
3047
3048 err = dpni_reset(priv->mc_io, 0, priv->mc_token);
3049 if (err) {
3050 dev_err(dev, "dpni_reset() failed\n");
Ioana Radulescuf6dda802017-10-29 08:20:39 +00003051 goto close;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003052 }
3053
3054 err = dpni_get_attributes(priv->mc_io, 0, priv->mc_token,
3055 &priv->dpni_attrs);
3056 if (err) {
3057 dev_err(dev, "dpni_get_attributes() failed (err=%d)\n", err);
Ioana Radulescuf6dda802017-10-29 08:20:39 +00003058 goto close;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003059 }
3060
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003061 err = dpaa2_eth_set_buffer_layout(priv);
Ioana Radulescu308f64e2017-10-29 08:20:40 +00003062 if (err)
Ioana Radulescuf6dda802017-10-29 08:20:39 +00003063 goto close;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003064
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003065 dpaa2_eth_set_enqueue_mode(priv);
Ioana Ciocoi Radulescu1fa0f682019-02-04 17:00:36 +00003066
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03003067 /* Enable pause frame support */
3068 if (dpaa2_eth_has_pause_support(priv)) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003069 err = dpaa2_eth_set_pause(priv);
Ioana Radulescu8eb3cef2019-08-28 17:08:15 +03003070 if (err)
3071 goto close;
3072 }
3073
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003074 err = dpaa2_eth_set_vlan_qos(priv);
Ioana Radulescu6aa90fe2020-05-31 00:08:09 +03003075 if (err && err != -EOPNOTSUPP)
3076 goto close;
3077
Xu Wang9334d5b2020-06-11 02:45:20 +00003078 priv->cls_rules = devm_kcalloc(dev, dpaa2_eth_fs_count(priv),
3079 sizeof(struct dpaa2_eth_cls_rule),
3080 GFP_KERNEL);
Wei Yongjun97fff7c2020-04-27 10:43:22 +00003081 if (!priv->cls_rules) {
3082 err = -ENOMEM;
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003083 goto close;
Wei Yongjun97fff7c2020-04-27 10:43:22 +00003084 }
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003085
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003086 return 0;
3087
Ioana Radulescuf6dda802017-10-29 08:20:39 +00003088close:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003089 dpni_close(priv->mc_io, 0, priv->mc_token);
Ioana Radulescuf6dda802017-10-29 08:20:39 +00003090
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003091 return err;
3092}
3093
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003094static void dpaa2_eth_free_dpni(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003095{
3096 int err;
3097
3098 err = dpni_reset(priv->mc_io, 0, priv->mc_token);
3099 if (err)
3100 netdev_warn(priv->net_dev, "dpni_reset() failed (err %d)\n",
3101 err);
3102
3103 dpni_close(priv->mc_io, 0, priv->mc_token);
3104}
3105
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003106static int dpaa2_eth_setup_rx_flow(struct dpaa2_eth_priv *priv,
3107 struct dpaa2_eth_fq *fq)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003108{
3109 struct device *dev = priv->net_dev->dev.parent;
3110 struct dpni_queue queue;
3111 struct dpni_queue_id qid;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003112 int err;
3113
3114 err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003115 DPNI_QUEUE_RX, fq->tc, fq->flowid, &queue, &qid);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003116 if (err) {
3117 dev_err(dev, "dpni_get_queue(RX) failed\n");
3118 return err;
3119 }
3120
3121 fq->fqid = qid.fqid;
3122
3123 queue.destination.id = fq->channel->dpcon_id;
3124 queue.destination.type = DPNI_DEST_DPCON;
3125 queue.destination.priority = 1;
Ioana Radulescu75c583a2018-02-26 10:28:06 -06003126 queue.user_context = (u64)(uintptr_t)fq;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003127 err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003128 DPNI_QUEUE_RX, fq->tc, fq->flowid,
Ioana Radulescu16fa1cf2019-05-23 17:38:22 +03003129 DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003130 &queue);
3131 if (err) {
3132 dev_err(dev, "dpni_set_queue(RX) failed\n");
3133 return err;
3134 }
3135
Ioana Radulescud678be12019-03-01 17:47:24 +00003136 /* xdp_rxq setup */
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003137 /* only once for each channel */
3138 if (fq->tc > 0)
3139 return 0;
3140
Ioana Radulescud678be12019-03-01 17:47:24 +00003141 err = xdp_rxq_info_reg(&fq->channel->xdp_rxq, priv->net_dev,
3142 fq->flowid);
3143 if (err) {
3144 dev_err(dev, "xdp_rxq_info_reg failed\n");
3145 return err;
3146 }
3147
3148 err = xdp_rxq_info_reg_mem_model(&fq->channel->xdp_rxq,
3149 MEM_TYPE_PAGE_ORDER0, NULL);
3150 if (err) {
3151 dev_err(dev, "xdp_rxq_info_reg_mem_model failed\n");
3152 return err;
3153 }
3154
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003155 return 0;
3156}
3157
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003158static int dpaa2_eth_setup_tx_flow(struct dpaa2_eth_priv *priv,
3159 struct dpaa2_eth_fq *fq)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003160{
3161 struct device *dev = priv->net_dev->dev.parent;
3162 struct dpni_queue queue;
3163 struct dpni_queue_id qid;
Ioana Radulescu15c87f62019-06-11 14:50:02 +03003164 int i, err;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003165
Ioana Radulescu15c87f62019-06-11 14:50:02 +03003166 for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
3167 err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
3168 DPNI_QUEUE_TX, i, fq->flowid,
3169 &queue, &qid);
3170 if (err) {
3171 dev_err(dev, "dpni_get_queue(TX) failed\n");
3172 return err;
3173 }
3174 fq->tx_fqid[i] = qid.fqid;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003175 }
3176
Ioana Radulescu15c87f62019-06-11 14:50:02 +03003177 /* All Tx queues belonging to the same flowid have the same qdbin */
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003178 fq->tx_qdbin = qid.qdbin;
3179
3180 err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
3181 DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
3182 &queue, &qid);
3183 if (err) {
3184 dev_err(dev, "dpni_get_queue(TX_CONF) failed\n");
3185 return err;
3186 }
3187
3188 fq->fqid = qid.fqid;
3189
3190 queue.destination.id = fq->channel->dpcon_id;
3191 queue.destination.type = DPNI_DEST_DPCON;
3192 queue.destination.priority = 0;
Ioana Radulescu75c583a2018-02-26 10:28:06 -06003193 queue.user_context = (u64)(uintptr_t)fq;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003194 err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
3195 DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
3196 DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
3197 &queue);
3198 if (err) {
3199 dev_err(dev, "dpni_set_queue(TX_CONF) failed\n");
3200 return err;
3201 }
3202
3203 return 0;
3204}
3205
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003206/* Supported header fields for Rx hash distribution key */
Ioana Radulescuf76c4832018-10-01 13:44:56 +03003207static const struct dpaa2_eth_dist_fields dist_fields[] = {
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003208 {
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003209 /* L2 header */
3210 .rxnfc_field = RXH_L2DA,
3211 .cls_prot = NET_PROT_ETH,
3212 .cls_field = NH_FLD_ETH_DA,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003213 .id = DPAA2_ETH_DIST_ETHDST,
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003214 .size = 6,
3215 }, {
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003216 .cls_prot = NET_PROT_ETH,
3217 .cls_field = NH_FLD_ETH_SA,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003218 .id = DPAA2_ETH_DIST_ETHSRC,
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003219 .size = 6,
3220 }, {
3221 /* This is the last ethertype field parsed:
3222 * depending on frame format, it can be the MAC ethertype
3223 * or the VLAN etype.
3224 */
3225 .cls_prot = NET_PROT_ETH,
3226 .cls_field = NH_FLD_ETH_TYPE,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003227 .id = DPAA2_ETH_DIST_ETHTYPE,
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003228 .size = 2,
3229 }, {
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003230 /* VLAN header */
3231 .rxnfc_field = RXH_VLAN,
3232 .cls_prot = NET_PROT_VLAN,
3233 .cls_field = NH_FLD_VLAN_TCI,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003234 .id = DPAA2_ETH_DIST_VLAN,
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003235 .size = 2,
3236 }, {
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003237 /* IP header */
3238 .rxnfc_field = RXH_IP_SRC,
3239 .cls_prot = NET_PROT_IP,
3240 .cls_field = NH_FLD_IP_SRC,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003241 .id = DPAA2_ETH_DIST_IPSRC,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003242 .size = 4,
3243 }, {
3244 .rxnfc_field = RXH_IP_DST,
3245 .cls_prot = NET_PROT_IP,
3246 .cls_field = NH_FLD_IP_DST,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003247 .id = DPAA2_ETH_DIST_IPDST,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003248 .size = 4,
3249 }, {
3250 .rxnfc_field = RXH_L3_PROTO,
3251 .cls_prot = NET_PROT_IP,
3252 .cls_field = NH_FLD_IP_PROTO,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003253 .id = DPAA2_ETH_DIST_IPPROTO,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003254 .size = 1,
3255 }, {
3256 /* Using UDP ports, this is functionally equivalent to raw
3257 * byte pairs from L4 header.
3258 */
3259 .rxnfc_field = RXH_L4_B_0_1,
3260 .cls_prot = NET_PROT_UDP,
3261 .cls_field = NH_FLD_UDP_PORT_SRC,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003262 .id = DPAA2_ETH_DIST_L4SRC,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003263 .size = 2,
3264 }, {
3265 .rxnfc_field = RXH_L4_B_2_3,
3266 .cls_prot = NET_PROT_UDP,
3267 .cls_field = NH_FLD_UDP_PORT_DST,
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003268 .id = DPAA2_ETH_DIST_L4DST,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003269 .size = 2,
3270 },
3271};
3272
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003273/* Configure the Rx hash key using the legacy API */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003274static int dpaa2_eth_config_legacy_hash_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003275{
3276 struct device *dev = priv->net_dev->dev.parent;
3277 struct dpni_rx_tc_dist_cfg dist_cfg;
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003278 int i, err = 0;
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003279
3280 memset(&dist_cfg, 0, sizeof(dist_cfg));
3281
3282 dist_cfg.key_cfg_iova = key;
3283 dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
3284 dist_cfg.dist_mode = DPNI_DIST_MODE_HASH;
3285
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003286 for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
3287 err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token,
3288 i, &dist_cfg);
3289 if (err) {
3290 dev_err(dev, "dpni_set_rx_tc_dist failed\n");
3291 break;
3292 }
3293 }
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003294
3295 return err;
3296}
3297
3298/* Configure the Rx hash key using the new API */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003299static int dpaa2_eth_config_hash_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003300{
3301 struct device *dev = priv->net_dev->dev.parent;
3302 struct dpni_rx_dist_cfg dist_cfg;
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003303 int i, err = 0;
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003304
3305 memset(&dist_cfg, 0, sizeof(dist_cfg));
3306
3307 dist_cfg.key_cfg_iova = key;
3308 dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
3309 dist_cfg.enable = 1;
3310
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003311 for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
3312 dist_cfg.tc = i;
3313 err = dpni_set_rx_hash_dist(priv->mc_io, 0, priv->mc_token,
3314 &dist_cfg);
3315 if (err) {
3316 dev_err(dev, "dpni_set_rx_hash_dist failed\n");
3317 break;
3318 }
3319 }
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003320
3321 return err;
3322}
3323
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003324/* Configure the Rx flow classification key */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003325static int dpaa2_eth_config_cls_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003326{
3327 struct device *dev = priv->net_dev->dev.parent;
3328 struct dpni_rx_dist_cfg dist_cfg;
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003329 int i, err = 0;
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003330
3331 memset(&dist_cfg, 0, sizeof(dist_cfg));
3332
3333 dist_cfg.key_cfg_iova = key;
3334 dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
3335 dist_cfg.enable = 1;
3336
Ioana Radulescu685e39e2020-05-31 00:08:08 +03003337 for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
3338 dist_cfg.tc = i;
3339 err = dpni_set_rx_fs_dist(priv->mc_io, 0, priv->mc_token,
3340 &dist_cfg);
3341 if (err) {
3342 dev_err(dev, "dpni_set_rx_fs_dist failed\n");
3343 break;
3344 }
3345 }
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003346
3347 return err;
3348}
3349
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003350/* Size of the Rx flow classification key */
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003351int dpaa2_eth_cls_key_size(u64 fields)
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003352{
3353 int i, size = 0;
3354
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003355 for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
3356 if (!(fields & dist_fields[i].id))
3357 continue;
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003358 size += dist_fields[i].size;
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003359 }
Ioana Radulescuafb90db2018-10-01 13:44:58 +03003360
3361 return size;
3362}
3363
3364/* Offset of header field in Rx classification key */
3365int dpaa2_eth_cls_fld_off(int prot, int field)
3366{
3367 int i, off = 0;
3368
3369 for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
3370 if (dist_fields[i].cls_prot == prot &&
3371 dist_fields[i].cls_field == field)
3372 return off;
3373 off += dist_fields[i].size;
3374 }
3375
3376 WARN_ONCE(1, "Unsupported header field used for Rx flow cls\n");
3377 return 0;
3378}
3379
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003380/* Prune unused fields from the classification rule.
3381 * Used when masking is not supported
3382 */
3383void dpaa2_eth_cls_trim_rule(void *key_mem, u64 fields)
3384{
3385 int off = 0, new_off = 0;
3386 int i, size;
3387
3388 for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
3389 size = dist_fields[i].size;
3390 if (dist_fields[i].id & fields) {
3391 memcpy(key_mem + new_off, key_mem + off, size);
3392 new_off += size;
3393 }
3394 off += size;
3395 }
3396}
3397
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003398/* Set Rx distribution (hash or flow classification) key
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003399 * flags is a combination of RXH_ bits
3400 */
Ioana Ciornei3233c152018-10-12 16:27:29 +00003401static int dpaa2_eth_set_dist_key(struct net_device *net_dev,
3402 enum dpaa2_eth_rx_dist type, u64 flags)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003403{
3404 struct device *dev = net_dev->dev.parent;
3405 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
3406 struct dpkg_profile_cfg cls_cfg;
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003407 u32 rx_hash_fields = 0;
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003408 dma_addr_t key_iova;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003409 u8 *dma_mem;
3410 int i;
3411 int err = 0;
3412
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003413 memset(&cls_cfg, 0, sizeof(cls_cfg));
3414
Ioana Radulescuf76c4832018-10-01 13:44:56 +03003415 for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003416 struct dpkg_extract *key =
3417 &cls_cfg.extracts[cls_cfg.num_extracts];
3418
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003419 /* For both Rx hashing and classification keys
3420 * we set only the selected fields.
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003421 */
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003422 if (!(flags & dist_fields[i].id))
3423 continue;
3424 if (type == DPAA2_ETH_RX_DIST_HASH)
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003425 rx_hash_fields |= dist_fields[i].rxnfc_field;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003426
3427 if (cls_cfg.num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS) {
3428 dev_err(dev, "error adding key extraction rule, too many rules?\n");
3429 return -E2BIG;
3430 }
3431
3432 key->type = DPKG_EXTRACT_FROM_HDR;
Ioana Radulescuf76c4832018-10-01 13:44:56 +03003433 key->extract.from_hdr.prot = dist_fields[i].cls_prot;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003434 key->extract.from_hdr.type = DPKG_FULL_FIELD;
Ioana Radulescuf76c4832018-10-01 13:44:56 +03003435 key->extract.from_hdr.field = dist_fields[i].cls_field;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003436 cls_cfg.num_extracts++;
3437 }
3438
Ioana Radulescue40ef9e2017-06-06 10:00:30 -05003439 dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003440 if (!dma_mem)
3441 return -ENOMEM;
3442
3443 err = dpni_prepare_key_cfg(&cls_cfg, dma_mem);
3444 if (err) {
Ioana Radulescu77160af2017-06-06 10:00:28 -05003445 dev_err(dev, "dpni_prepare_key_cfg error %d\n", err);
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003446 goto free_key;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003447 }
3448
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003449 /* Prepare for setting the rx dist */
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003450 key_iova = dma_map_single(dev, dma_mem, DPAA2_CLASSIFIER_DMA_SIZE,
3451 DMA_TO_DEVICE);
3452 if (dma_mapping_error(dev, key_iova)) {
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003453 dev_err(dev, "DMA mapping failed\n");
3454 err = -ENOMEM;
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003455 goto free_key;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003456 }
3457
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003458 if (type == DPAA2_ETH_RX_DIST_HASH) {
3459 if (dpaa2_eth_has_legacy_dist(priv))
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003460 err = dpaa2_eth_config_legacy_hash_key(priv, key_iova);
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003461 else
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003462 err = dpaa2_eth_config_hash_key(priv, key_iova);
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003463 } else {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003464 err = dpaa2_eth_config_cls_key(priv, key_iova);
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003465 }
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003466
3467 dma_unmap_single(dev, key_iova, DPAA2_CLASSIFIER_DMA_SIZE,
3468 DMA_TO_DEVICE);
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003469 if (!err && type == DPAA2_ETH_RX_DIST_HASH)
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003470 priv->rx_hash_fields = rx_hash_fields;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003471
Ioana Radulescudf85aeb2018-10-01 13:44:55 +03003472free_key:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003473 kfree(dma_mem);
3474 return err;
3475}
3476
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003477int dpaa2_eth_set_hash(struct net_device *net_dev, u64 flags)
3478{
3479 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003480 u64 key = 0;
3481 int i;
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003482
3483 if (!dpaa2_eth_hash_enabled(priv))
3484 return -EOPNOTSUPP;
3485
Ioana Ciocoi Radulescu3a1e6b82019-04-16 17:13:29 +00003486 for (i = 0; i < ARRAY_SIZE(dist_fields); i++)
3487 if (dist_fields[i].rxnfc_field & flags)
3488 key |= dist_fields[i].id;
3489
3490 return dpaa2_eth_set_dist_key(net_dev, DPAA2_ETH_RX_DIST_HASH, key);
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003491}
3492
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003493int dpaa2_eth_set_cls(struct net_device *net_dev, u64 flags)
3494{
3495 return dpaa2_eth_set_dist_key(net_dev, DPAA2_ETH_RX_DIST_CLS, flags);
3496}
3497
3498static int dpaa2_eth_set_default_cls(struct dpaa2_eth_priv *priv)
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003499{
3500 struct device *dev = priv->net_dev->dev.parent;
Ioana Ciocoi Radulescudf8e2492019-04-16 17:13:28 +00003501 int err;
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003502
3503 /* Check if we actually support Rx flow classification */
3504 if (dpaa2_eth_has_legacy_dist(priv)) {
3505 dev_dbg(dev, "Rx cls not supported by current MC version\n");
3506 return -EOPNOTSUPP;
3507 }
3508
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003509 if (!dpaa2_eth_fs_enabled(priv)) {
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003510 dev_dbg(dev, "Rx cls disabled in DPNI options\n");
3511 return -EOPNOTSUPP;
3512 }
3513
3514 if (!dpaa2_eth_hash_enabled(priv)) {
3515 dev_dbg(dev, "Rx cls disabled for single queue DPNIs\n");
3516 return -EOPNOTSUPP;
3517 }
3518
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003519 /* If there is no support for masking in the classification table,
3520 * we don't set a default key, as it will depend on the rules
3521 * added by the user at runtime.
3522 */
3523 if (!dpaa2_eth_fs_mask_enabled(priv))
3524 goto out;
3525
3526 err = dpaa2_eth_set_cls(priv->net_dev, DPAA2_ETH_DIST_ALL);
Ioana Ciocoi Radulescudf8e2492019-04-16 17:13:28 +00003527 if (err)
3528 return err;
3529
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003530out:
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003531 priv->rx_cls_enabled = 1;
3532
Ioana Ciocoi Radulescudf8e2492019-04-16 17:13:28 +00003533 return 0;
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003534}
3535
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003536/* Bind the DPNI to its needed objects and resources: buffer pool, DPIOs,
3537 * frame queues and channels
3538 */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003539static int dpaa2_eth_bind_dpni(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003540{
3541 struct net_device *net_dev = priv->net_dev;
3542 struct device *dev = net_dev->dev.parent;
3543 struct dpni_pools_cfg pools_params;
3544 struct dpni_error_cfg err_cfg;
3545 int err = 0;
3546 int i;
3547
3548 pools_params.num_dpbp = 1;
3549 pools_params.pools[0].dpbp_id = priv->dpbp_dev->obj_desc.id;
3550 pools_params.pools[0].backup_pool = 0;
Ioana Ciorneiefa6a7d2020-05-15 15:30:22 +03003551 pools_params.pools[0].buffer_size = priv->rx_buf_size;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003552 err = dpni_set_pools(priv->mc_io, 0, priv->mc_token, &pools_params);
3553 if (err) {
3554 dev_err(dev, "dpni_set_pools() failed\n");
3555 return err;
3556 }
3557
Ioana Radulescu227686b2018-07-27 09:12:59 -05003558 /* have the interface implicitly distribute traffic based on
3559 * the default hash key
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003560 */
Ioana Radulescu227686b2018-07-27 09:12:59 -05003561 err = dpaa2_eth_set_hash(net_dev, DPAA2_RXH_DEFAULT);
Ioana Ciocoi Radulescuedad8d22018-09-24 15:36:21 +00003562 if (err && err != -EOPNOTSUPP)
Ioana Radulescu0f4c2952017-10-11 08:29:50 -05003563 dev_err(dev, "Failed to configure hashing\n");
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003564
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003565 /* Configure the flow classification key; it includes all
3566 * supported header fields and cannot be modified at runtime
3567 */
Ioana Ciocoi Radulescu2d680232019-04-16 17:13:30 +00003568 err = dpaa2_eth_set_default_cls(priv);
Ioana Radulescu4aaaf9b2018-10-01 13:44:57 +03003569 if (err && err != -EOPNOTSUPP)
3570 dev_err(dev, "Failed to configure Rx classification key\n");
3571
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003572 /* Configure handling of error frames */
Ioana Radulescu39163c02017-06-06 10:00:39 -05003573 err_cfg.errors = DPAA2_FAS_RX_ERR_MASK;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003574 err_cfg.set_frame_annotation = 1;
3575 err_cfg.error_action = DPNI_ERROR_ACTION_DISCARD;
3576 err = dpni_set_errors_behavior(priv->mc_io, 0, priv->mc_token,
3577 &err_cfg);
3578 if (err) {
3579 dev_err(dev, "dpni_set_errors_behavior failed\n");
3580 return err;
3581 }
3582
3583 /* Configure Rx and Tx conf queues to generate CDANs */
3584 for (i = 0; i < priv->num_fqs; i++) {
3585 switch (priv->fq[i].type) {
3586 case DPAA2_RX_FQ:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003587 err = dpaa2_eth_setup_rx_flow(priv, &priv->fq[i]);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003588 break;
3589 case DPAA2_TX_CONF_FQ:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003590 err = dpaa2_eth_setup_tx_flow(priv, &priv->fq[i]);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003591 break;
3592 default:
3593 dev_err(dev, "Invalid FQ type %d\n", priv->fq[i].type);
3594 return -EINVAL;
3595 }
3596 if (err)
3597 return err;
3598 }
3599
3600 err = dpni_get_qdid(priv->mc_io, 0, priv->mc_token,
3601 DPNI_QUEUE_TX, &priv->tx_qdid);
3602 if (err) {
3603 dev_err(dev, "dpni_get_qdid() failed\n");
3604 return err;
3605 }
3606
3607 return 0;
3608}
3609
3610/* Allocate rings for storing incoming frame descriptors */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003611static int dpaa2_eth_alloc_rings(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003612{
3613 struct net_device *net_dev = priv->net_dev;
3614 struct device *dev = net_dev->dev.parent;
3615 int i;
3616
3617 for (i = 0; i < priv->num_channels; i++) {
3618 priv->channel[i]->store =
3619 dpaa2_io_store_create(DPAA2_ETH_STORE_SIZE, dev);
3620 if (!priv->channel[i]->store) {
3621 netdev_err(net_dev, "dpaa2_io_store_create() failed\n");
3622 goto err_ring;
3623 }
3624 }
3625
3626 return 0;
3627
3628err_ring:
3629 for (i = 0; i < priv->num_channels; i++) {
3630 if (!priv->channel[i]->store)
3631 break;
3632 dpaa2_io_store_destroy(priv->channel[i]->store);
3633 }
3634
3635 return -ENOMEM;
3636}
3637
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003638static void dpaa2_eth_free_rings(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003639{
3640 int i;
3641
3642 for (i = 0; i < priv->num_channels; i++)
3643 dpaa2_io_store_destroy(priv->channel[i]->store);
3644}
3645
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003646static int dpaa2_eth_set_mac_addr(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003647{
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003648 struct net_device *net_dev = priv->net_dev;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003649 struct device *dev = net_dev->dev.parent;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003650 u8 mac_addr[ETH_ALEN], dpni_mac_addr[ETH_ALEN];
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003651 int err;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003652
3653 /* Get firmware address, if any */
3654 err = dpni_get_port_mac_addr(priv->mc_io, 0, priv->mc_token, mac_addr);
3655 if (err) {
3656 dev_err(dev, "dpni_get_port_mac_addr() failed\n");
3657 return err;
3658 }
3659
3660 /* Get DPNI attributes address, if any */
3661 err = dpni_get_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
3662 dpni_mac_addr);
3663 if (err) {
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003664 dev_err(dev, "dpni_get_primary_mac_addr() failed\n");
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003665 return err;
3666 }
3667
3668 /* First check if firmware has any address configured by bootloader */
3669 if (!is_zero_ether_addr(mac_addr)) {
3670 /* If the DPMAC addr != DPNI addr, update it */
3671 if (!ether_addr_equal(mac_addr, dpni_mac_addr)) {
3672 err = dpni_set_primary_mac_addr(priv->mc_io, 0,
3673 priv->mc_token,
3674 mac_addr);
3675 if (err) {
3676 dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
3677 return err;
3678 }
3679 }
3680 memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
3681 } else if (is_zero_ether_addr(dpni_mac_addr)) {
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003682 /* No MAC address configured, fill in net_dev->dev_addr
3683 * with a random one
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003684 */
3685 eth_hw_addr_random(net_dev);
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003686 dev_dbg_once(dev, "device(s) have all-zero hwaddr, replaced with random\n");
3687
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003688 err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
3689 net_dev->dev_addr);
3690 if (err) {
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003691 dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003692 return err;
3693 }
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003694
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003695 /* Override NET_ADDR_RANDOM set by eth_hw_addr_random(); for all
3696 * practical purposes, this will be our "permanent" mac address,
3697 * at least until the next reboot. This move will also permit
3698 * register_netdevice() to properly fill up net_dev->perm_addr.
3699 */
3700 net_dev->addr_assign_type = NET_ADDR_PERM;
3701 } else {
3702 /* NET_ADDR_PERM is default, all we have to do is
3703 * fill in the device addr.
3704 */
3705 memcpy(net_dev->dev_addr, dpni_mac_addr, net_dev->addr_len);
3706 }
3707
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003708 return 0;
3709}
3710
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003711static int dpaa2_eth_netdev_init(struct net_device *net_dev)
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003712{
3713 struct device *dev = net_dev->dev.parent;
3714 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05003715 u32 options = priv->dpni_attrs.options;
3716 u64 supported = 0, not_supported = 0;
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003717 u8 bcast_addr[ETH_ALEN];
Ioana Radulescubb5b42c2017-06-06 10:00:41 -05003718 u8 num_queues;
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003719 int err;
3720
3721 net_dev->netdev_ops = &dpaa2_eth_ops;
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05003722 net_dev->ethtool_ops = &dpaa2_ethtool_ops;
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003723
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003724 err = dpaa2_eth_set_mac_addr(priv);
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003725 if (err)
3726 return err;
3727
3728 /* Explicitly add the broadcast address to the MAC filtering table */
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003729 eth_broadcast_addr(bcast_addr);
3730 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token, bcast_addr);
3731 if (err) {
Ioana Radulescu6ab00862017-06-06 10:00:40 -05003732 dev_err(dev, "dpni_add_mac_addr() failed\n");
3733 return err;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003734 }
3735
Ioana Radulescu3ccc8d42018-07-09 10:01:10 -05003736 /* Set MTU upper limit; lower limit is 68B (default value) */
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003737 net_dev->max_mtu = DPAA2_ETH_MAX_MTU;
Ioana Radulescu00fee002018-07-09 10:01:11 -05003738 err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token,
Ioana Radulescu81f34e92018-07-12 12:12:29 -05003739 DPAA2_ETH_MFL);
Ioana Radulescu00fee002018-07-09 10:01:11 -05003740 if (err) {
3741 dev_err(dev, "dpni_set_max_frame_length() failed\n");
3742 return err;
3743 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003744
Ioana Radulescubb5b42c2017-06-06 10:00:41 -05003745 /* Set actual number of queues in the net device */
3746 num_queues = dpaa2_eth_queue_count(priv);
3747 err = netif_set_real_num_tx_queues(net_dev, num_queues);
3748 if (err) {
3749 dev_err(dev, "netif_set_real_num_tx_queues() failed\n");
3750 return err;
3751 }
3752 err = netif_set_real_num_rx_queues(net_dev, num_queues);
3753 if (err) {
3754 dev_err(dev, "netif_set_real_num_rx_queues() failed\n");
3755 return err;
3756 }
3757
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05003758 /* Capabilities listing */
3759 supported |= IFF_LIVE_ADDR_CHANGE;
3760
3761 if (options & DPNI_OPT_NO_MAC_FILTER)
3762 not_supported |= IFF_UNICAST_FLT;
3763 else
3764 supported |= IFF_UNICAST_FLT;
3765
3766 net_dev->priv_flags |= supported;
3767 net_dev->priv_flags &= ~not_supported;
3768
3769 /* Features */
3770 net_dev->features = NETIF_F_RXCSUM |
3771 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3772 NETIF_F_SG | NETIF_F_HIGHDMA |
Ioana Ciornei3657cda2020-07-21 19:38:25 +03003773 NETIF_F_LLTX | NETIF_F_HW_TC;
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05003774 net_dev->hw_features = net_dev->features;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003775
3776 return 0;
3777}
3778
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003779static int dpaa2_eth_poll_link_state(void *arg)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003780{
3781 struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)arg;
3782 int err;
3783
3784 while (!kthread_should_stop()) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003785 err = dpaa2_eth_link_state_update(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003786 if (unlikely(err))
3787 return err;
3788
3789 msleep(DPAA2_ETH_LINK_STATE_REFRESH);
3790 }
3791
3792 return 0;
3793}
3794
Ioana Ciornei71947922019-10-31 01:18:31 +02003795static int dpaa2_eth_connect_mac(struct dpaa2_eth_priv *priv)
3796{
3797 struct fsl_mc_device *dpni_dev, *dpmac_dev;
3798 struct dpaa2_mac *mac;
3799 int err;
3800
3801 dpni_dev = to_fsl_mc_device(priv->net_dev->dev.parent);
3802 dpmac_dev = fsl_mc_get_endpoint(dpni_dev);
Ioana Ciornei841eb402020-07-14 15:08:16 +03003803 if (IS_ERR_OR_NULL(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)
Ioana Ciornei71947922019-10-31 01:18:31 +02003804 return 0;
3805
3806 if (dpaa2_mac_is_type_fixed(dpmac_dev, priv->mc_io))
3807 return 0;
3808
3809 mac = kzalloc(sizeof(struct dpaa2_mac), GFP_KERNEL);
3810 if (!mac)
3811 return -ENOMEM;
3812
3813 mac->mc_dev = dpmac_dev;
3814 mac->mc_io = priv->mc_io;
3815 mac->net_dev = priv->net_dev;
3816
3817 err = dpaa2_mac_connect(mac);
3818 if (err) {
3819 netdev_err(priv->net_dev, "Error connecting to the MAC endpoint\n");
3820 kfree(mac);
3821 return err;
3822 }
3823 priv->mac = mac;
3824
3825 return 0;
3826}
3827
3828static void dpaa2_eth_disconnect_mac(struct dpaa2_eth_priv *priv)
3829{
3830 if (!priv->mac)
3831 return;
3832
3833 dpaa2_mac_disconnect(priv->mac);
3834 kfree(priv->mac);
3835 priv->mac = NULL;
3836}
3837
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003838static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg)
3839{
Ioana Radulescu112197d2017-10-11 08:29:49 -05003840 u32 status = ~0;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003841 struct device *dev = (struct device *)arg;
3842 struct fsl_mc_device *dpni_dev = to_fsl_mc_device(dev);
3843 struct net_device *net_dev = dev_get_drvdata(dev);
Ioana Ciornei71947922019-10-31 01:18:31 +02003844 struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003845 int err;
3846
3847 err = dpni_get_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
3848 DPNI_IRQ_INDEX, &status);
3849 if (unlikely(err)) {
Ioana Radulescu77160af2017-06-06 10:00:28 -05003850 netdev_err(net_dev, "Can't get irq status (err %d)\n", err);
Ioana Radulescu112197d2017-10-11 08:29:49 -05003851 return IRQ_HANDLED;
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003852 }
3853
Ioana Radulescu112197d2017-10-11 08:29:49 -05003854 if (status & DPNI_IRQ_EVENT_LINK_CHANGED)
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003855 dpaa2_eth_link_state_update(netdev_priv(net_dev));
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003856
Ioana Ciorneif5c3fff2019-10-31 01:18:30 +02003857 if (status & DPNI_IRQ_EVENT_ENDPOINT_CHANGED) {
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003858 dpaa2_eth_set_mac_addr(netdev_priv(net_dev));
3859 dpaa2_eth_update_tx_fqids(priv);
Ioana Ciornei71947922019-10-31 01:18:31 +02003860
3861 rtnl_lock();
3862 if (priv->mac)
3863 dpaa2_eth_disconnect_mac(priv);
3864 else
3865 dpaa2_eth_connect_mac(priv);
3866 rtnl_unlock();
Ioana Ciorneif5c3fff2019-10-31 01:18:30 +02003867 }
Florin Chiculita8398b372019-10-16 10:36:22 +03003868
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003869 return IRQ_HANDLED;
3870}
3871
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003872static int dpaa2_eth_setup_irqs(struct fsl_mc_device *ls_dev)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003873{
3874 int err = 0;
3875 struct fsl_mc_device_irq *irq;
3876
3877 err = fsl_mc_allocate_irqs(ls_dev);
3878 if (err) {
3879 dev_err(&ls_dev->dev, "MC irqs allocation failed\n");
3880 return err;
3881 }
3882
3883 irq = ls_dev->irqs[0];
3884 err = devm_request_threaded_irq(&ls_dev->dev, irq->msi_desc->irq,
Ioana Radulescufdc9b532018-03-23 08:44:05 -05003885 NULL, dpni_irq0_handler_thread,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003886 IRQF_NO_SUSPEND | IRQF_ONESHOT,
3887 dev_name(&ls_dev->dev), &ls_dev->dev);
3888 if (err < 0) {
Ioana Radulescu77160af2017-06-06 10:00:28 -05003889 dev_err(&ls_dev->dev, "devm_request_threaded_irq(): %d\n", err);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003890 goto free_mc_irq;
3891 }
3892
3893 err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,
Florin Chiculita8398b372019-10-16 10:36:22 +03003894 DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED |
3895 DPNI_IRQ_EVENT_ENDPOINT_CHANGED);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003896 if (err < 0) {
Ioana Radulescu77160af2017-06-06 10:00:28 -05003897 dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003898 goto free_irq;
3899 }
3900
3901 err = dpni_set_irq_enable(ls_dev->mc_io, 0, ls_dev->mc_handle,
3902 DPNI_IRQ_INDEX, 1);
3903 if (err < 0) {
Ioana Radulescu77160af2017-06-06 10:00:28 -05003904 dev_err(&ls_dev->dev, "dpni_set_irq_enable(): %d\n", err);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003905 goto free_irq;
3906 }
3907
3908 return 0;
3909
3910free_irq:
3911 devm_free_irq(&ls_dev->dev, irq->msi_desc->irq, &ls_dev->dev);
3912free_mc_irq:
3913 fsl_mc_free_irqs(ls_dev);
3914
3915 return err;
3916}
3917
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003918static void dpaa2_eth_add_ch_napi(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003919{
3920 int i;
3921 struct dpaa2_eth_channel *ch;
3922
3923 for (i = 0; i < priv->num_channels; i++) {
3924 ch = priv->channel[i];
3925 /* NAPI weight *MUST* be a multiple of DPAA2_ETH_STORE_SIZE */
3926 netif_napi_add(priv->net_dev, &ch->napi, dpaa2_eth_poll,
3927 NAPI_POLL_WEIGHT);
3928 }
3929}
3930
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003931static void dpaa2_eth_del_ch_napi(struct dpaa2_eth_priv *priv)
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003932{
3933 int i;
3934 struct dpaa2_eth_channel *ch;
3935
3936 for (i = 0; i < priv->num_channels; i++) {
3937 ch = priv->channel[i];
3938 netif_napi_del(&ch->napi);
3939 }
3940}
3941
3942static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
3943{
3944 struct device *dev;
3945 struct net_device *net_dev = NULL;
3946 struct dpaa2_eth_priv *priv = NULL;
3947 int err = 0;
3948
3949 dev = &dpni_dev->dev;
3950
3951 /* Net device */
Ioana Radulescuab1e6de2019-06-11 14:50:03 +03003952 net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA2_ETH_MAX_NETDEV_QUEUES);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003953 if (!net_dev) {
3954 dev_err(dev, "alloc_etherdev_mq() failed\n");
3955 return -ENOMEM;
3956 }
3957
3958 SET_NETDEV_DEV(net_dev, dev);
3959 dev_set_drvdata(dev, net_dev);
3960
3961 priv = netdev_priv(net_dev);
3962 priv->net_dev = net_dev;
3963
Ioana Radulescu08eb2392017-05-24 07:13:27 -05003964 priv->iommu_domain = iommu_get_domain_for_dev(dev);
3965
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003966 /* Obtain a MC portal */
3967 err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL,
3968 &priv->mc_io);
3969 if (err) {
Ioana Radulescu8c369612018-03-20 07:04:46 -05003970 if (err == -ENXIO)
3971 err = -EPROBE_DEFER;
3972 else
3973 dev_err(dev, "MC portal allocation failed\n");
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003974 goto err_portal_alloc;
3975 }
3976
3977 /* MC objects initialization and configuration */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003978 err = dpaa2_eth_setup_dpni(dpni_dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003979 if (err)
3980 goto err_dpni_setup;
3981
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003982 err = dpaa2_eth_setup_dpio(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003983 if (err)
3984 goto err_dpio_setup;
3985
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003986 dpaa2_eth_setup_fqs(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003987
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003988 err = dpaa2_eth_setup_dpbp(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003989 if (err)
3990 goto err_dpbp_setup;
3991
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003992 err = dpaa2_eth_bind_dpni(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003993 if (err)
3994 goto err_bind;
3995
3996 /* Add a NAPI context for each channel */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03003997 dpaa2_eth_add_ch_napi(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05003998
3999 /* Percpu statistics */
4000 priv->percpu_stats = alloc_percpu(*priv->percpu_stats);
4001 if (!priv->percpu_stats) {
4002 dev_err(dev, "alloc_percpu(percpu_stats) failed\n");
4003 err = -ENOMEM;
4004 goto err_alloc_percpu_stats;
4005 }
Ioana Radulescu85047ab2017-04-28 04:50:31 -05004006 priv->percpu_extras = alloc_percpu(*priv->percpu_extras);
4007 if (!priv->percpu_extras) {
4008 dev_err(dev, "alloc_percpu(percpu_extras) failed\n");
4009 err = -ENOMEM;
4010 goto err_alloc_percpu_extras;
4011 }
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004012
Ioana Ciorneid70446e2020-06-29 21:47:11 +03004013 priv->sgt_cache = alloc_percpu(*priv->sgt_cache);
4014 if (!priv->sgt_cache) {
4015 dev_err(dev, "alloc_percpu(sgt_cache) failed\n");
4016 err = -ENOMEM;
4017 goto err_alloc_sgt_cache;
4018 }
4019
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004020 err = dpaa2_eth_netdev_init(net_dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004021 if (err)
4022 goto err_netdev_init;
4023
4024 /* Configure checksum offload based on current interface flags */
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004025 err = dpaa2_eth_set_rx_csum(priv, !!(net_dev->features & NETIF_F_RXCSUM));
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004026 if (err)
4027 goto err_csum;
4028
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004029 err = dpaa2_eth_set_tx_csum(priv,
4030 !!(net_dev->features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)));
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004031 if (err)
4032 goto err_csum;
4033
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004034 err = dpaa2_eth_alloc_rings(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004035 if (err)
4036 goto err_alloc_rings;
4037
Ioana Ciorneif395b692020-05-31 00:08:13 +03004038#ifdef CONFIG_FSL_DPAA2_ETH_DCB
4039 if (dpaa2_eth_has_pause_support(priv) && priv->vlan_cls_enabled) {
4040 priv->dcbx_mode = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
4041 net_dev->dcbnl_ops = &dpaa2_eth_dcbnl_ops;
4042 } else {
4043 dev_dbg(dev, "PFC not supported\n");
4044 }
4045#endif
4046
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004047 err = dpaa2_eth_setup_irqs(dpni_dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004048 if (err) {
4049 netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004050 priv->poll_thread = kthread_run(dpaa2_eth_poll_link_state, priv,
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004051 "%s_poll_link", net_dev->name);
4052 if (IS_ERR(priv->poll_thread)) {
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05004053 dev_err(dev, "Error starting polling thread\n");
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004054 goto err_poll_thread;
4055 }
4056 priv->do_link_poll = true;
4057 }
4058
Ioana Ciornei71947922019-10-31 01:18:31 +02004059 err = dpaa2_eth_connect_mac(priv);
4060 if (err)
4061 goto err_connect_mac;
4062
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05004063 err = register_netdev(net_dev);
4064 if (err < 0) {
4065 dev_err(dev, "register_netdev() failed\n");
4066 goto err_netdev_reg;
4067 }
4068
Ioana Radulescu091a19e2019-01-18 16:16:00 +00004069#ifdef CONFIG_DEBUG_FS
4070 dpaa2_dbg_add(priv);
4071#endif
4072
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004073 dev_info(dev, "Probed interface %s\n", net_dev->name);
4074 return 0;
4075
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05004076err_netdev_reg:
Ioana Ciornei71947922019-10-31 01:18:31 +02004077 dpaa2_eth_disconnect_mac(priv);
4078err_connect_mac:
Ioana Radulescu7f12c8a32018-08-29 04:42:39 -05004079 if (priv->do_link_poll)
4080 kthread_stop(priv->poll_thread);
4081 else
4082 fsl_mc_free_irqs(dpni_dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004083err_poll_thread:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004084 dpaa2_eth_free_rings(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004085err_alloc_rings:
4086err_csum:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004087err_netdev_init:
Ioana Ciorneid70446e2020-06-29 21:47:11 +03004088 free_percpu(priv->sgt_cache);
4089err_alloc_sgt_cache:
Ioana Radulescu85047ab2017-04-28 04:50:31 -05004090 free_percpu(priv->percpu_extras);
4091err_alloc_percpu_extras:
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004092 free_percpu(priv->percpu_stats);
4093err_alloc_percpu_stats:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004094 dpaa2_eth_del_ch_napi(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004095err_bind:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004096 dpaa2_eth_free_dpbp(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004097err_dpbp_setup:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004098 dpaa2_eth_free_dpio(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004099err_dpio_setup:
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004100 dpaa2_eth_free_dpni(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004101err_dpni_setup:
4102 fsl_mc_portal_free(priv->mc_io);
4103err_portal_alloc:
4104 dev_set_drvdata(dev, NULL);
4105 free_netdev(net_dev);
4106
4107 return err;
4108}
4109
4110static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
4111{
4112 struct device *dev;
4113 struct net_device *net_dev;
4114 struct dpaa2_eth_priv *priv;
4115
4116 dev = &ls_dev->dev;
4117 net_dev = dev_get_drvdata(dev);
4118 priv = netdev_priv(net_dev);
4119
Ioana Radulescu091a19e2019-01-18 16:16:00 +00004120#ifdef CONFIG_DEBUG_FS
4121 dpaa2_dbg_remove(priv);
4122#endif
Ioana Ciornei71947922019-10-31 01:18:31 +02004123 rtnl_lock();
4124 dpaa2_eth_disconnect_mac(priv);
4125 rtnl_unlock();
4126
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004127 unregister_netdev(net_dev);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004128
4129 if (priv->do_link_poll)
4130 kthread_stop(priv->poll_thread);
4131 else
4132 fsl_mc_free_irqs(ls_dev);
4133
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004134 dpaa2_eth_free_rings(priv);
Ioana Ciorneid70446e2020-06-29 21:47:11 +03004135 free_percpu(priv->sgt_cache);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004136 free_percpu(priv->percpu_stats);
Ioana Radulescu85047ab2017-04-28 04:50:31 -05004137 free_percpu(priv->percpu_extras);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004138
Ioana Ciornei5d8dccf2020-08-31 21:12:39 +03004139 dpaa2_eth_del_ch_napi(priv);
4140 dpaa2_eth_free_dpbp(priv);
4141 dpaa2_eth_free_dpio(priv);
4142 dpaa2_eth_free_dpni(priv);
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004143
4144 fsl_mc_portal_free(priv->mc_io);
4145
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004146 free_netdev(net_dev);
4147
Ioana Radulescu4bc07aa2018-03-23 10:23:36 -05004148 dev_dbg(net_dev->dev.parent, "Removed interface %s\n", net_dev->name);
Ioana Radulescu7472dd92018-03-23 08:44:06 -05004149
Ioana Radulescu6e2387e2017-04-28 04:50:29 -05004150 return 0;
4151}
4152
4153static const struct fsl_mc_device_id dpaa2_eth_match_id_table[] = {
4154 {
4155 .vendor = FSL_MC_VENDOR_FREESCALE,
4156 .obj_type = "dpni",
4157 },
4158 { .vendor = 0x0 }
4159};
4160MODULE_DEVICE_TABLE(fslmc, dpaa2_eth_match_id_table);
4161
4162static struct fsl_mc_driver dpaa2_eth_driver = {
4163 .driver = {
4164 .name = KBUILD_MODNAME,
4165 .owner = THIS_MODULE,
4166 },
4167 .probe = dpaa2_eth_probe,
4168 .remove = dpaa2_eth_remove,
4169 .match_id_table = dpaa2_eth_match_id_table
4170};
4171
Ioana Radulescu091a19e2019-01-18 16:16:00 +00004172static int __init dpaa2_eth_driver_init(void)
4173{
4174 int err;
4175
4176 dpaa2_eth_dbg_init();
4177 err = fsl_mc_driver_register(&dpaa2_eth_driver);
4178 if (err) {
4179 dpaa2_eth_dbg_exit();
4180 return err;
4181 }
4182
4183 return 0;
4184}
4185
4186static void __exit dpaa2_eth_driver_exit(void)
4187{
4188 dpaa2_eth_dbg_exit();
4189 fsl_mc_driver_unregister(&dpaa2_eth_driver);
4190}
4191
4192module_init(dpaa2_eth_driver_init);
4193module_exit(dpaa2_eth_driver_exit);