blob: 72942002a54abe7605ba3aca9a5177dd643bd607 [file] [log] [blame]
Sven Peterf89f9c52021-10-25 08:22:04 +02001// SPDX-License-Identifier: GPL-2.0-only OR MIT
2/*
3 * Apple mailbox driver
4 *
5 * Copyright (C) 2021 The Asahi Linux Contributors
6 *
7 * This driver adds support for two mailbox variants (called ASC and M3 by
8 * Apple) found in Apple SoCs such as the M1. It consists of two FIFOs used to
9 * exchange 64+32 bit messages between the main CPU and a co-processor.
10 * Various coprocessors implement different IPC protocols based on these simple
11 * messages and shared memory buffers.
12 *
13 * Both the main CPU and the co-processor see the same set of registers but
14 * the first FIFO (A2I) is always used to transfer messages from the application
15 * processor (us) to the I/O processor and the second one (I2A) for the
16 * other direction.
17 */
18
19#include <linux/apple-mailbox.h>
20#include <linux/device.h>
21#include <linux/gfp.h>
22#include <linux/interrupt.h>
23#include <linux/io.h>
24#include <linux/mailbox_controller.h>
25#include <linux/module.h>
26#include <linux/of.h>
27#include <linux/platform_device.h>
28#include <linux/types.h>
29
30#define APPLE_ASC_MBOX_CONTROL_FULL BIT(16)
31#define APPLE_ASC_MBOX_CONTROL_EMPTY BIT(17)
32
33#define APPLE_ASC_MBOX_A2I_CONTROL 0x110
34#define APPLE_ASC_MBOX_A2I_SEND0 0x800
35#define APPLE_ASC_MBOX_A2I_SEND1 0x808
36#define APPLE_ASC_MBOX_A2I_RECV0 0x810
37#define APPLE_ASC_MBOX_A2I_RECV1 0x818
38
39#define APPLE_ASC_MBOX_I2A_CONTROL 0x114
40#define APPLE_ASC_MBOX_I2A_SEND0 0x820
41#define APPLE_ASC_MBOX_I2A_SEND1 0x828
42#define APPLE_ASC_MBOX_I2A_RECV0 0x830
43#define APPLE_ASC_MBOX_I2A_RECV1 0x838
44
45#define APPLE_M3_MBOX_CONTROL_FULL BIT(16)
46#define APPLE_M3_MBOX_CONTROL_EMPTY BIT(17)
47
48#define APPLE_M3_MBOX_A2I_CONTROL 0x50
49#define APPLE_M3_MBOX_A2I_SEND0 0x60
50#define APPLE_M3_MBOX_A2I_SEND1 0x68
51#define APPLE_M3_MBOX_A2I_RECV0 0x70
52#define APPLE_M3_MBOX_A2I_RECV1 0x78
53
54#define APPLE_M3_MBOX_I2A_CONTROL 0x80
55#define APPLE_M3_MBOX_I2A_SEND0 0x90
56#define APPLE_M3_MBOX_I2A_SEND1 0x98
57#define APPLE_M3_MBOX_I2A_RECV0 0xa0
58#define APPLE_M3_MBOX_I2A_RECV1 0xa8
59
60#define APPLE_M3_MBOX_IRQ_ENABLE 0x48
61#define APPLE_M3_MBOX_IRQ_ACK 0x4c
62#define APPLE_M3_MBOX_IRQ_A2I_EMPTY BIT(0)
63#define APPLE_M3_MBOX_IRQ_A2I_NOT_EMPTY BIT(1)
64#define APPLE_M3_MBOX_IRQ_I2A_EMPTY BIT(2)
65#define APPLE_M3_MBOX_IRQ_I2A_NOT_EMPTY BIT(3)
66
67#define APPLE_MBOX_MSG1_OUTCNT GENMASK(56, 52)
68#define APPLE_MBOX_MSG1_INCNT GENMASK(51, 48)
69#define APPLE_MBOX_MSG1_OUTPTR GENMASK(47, 44)
70#define APPLE_MBOX_MSG1_INPTR GENMASK(43, 40)
71#define APPLE_MBOX_MSG1_MSG GENMASK(31, 0)
72
73struct apple_mbox_hw {
74 unsigned int control_full;
75 unsigned int control_empty;
76
77 unsigned int a2i_control;
78 unsigned int a2i_send0;
79 unsigned int a2i_send1;
80
81 unsigned int i2a_control;
82 unsigned int i2a_recv0;
83 unsigned int i2a_recv1;
84
85 bool has_irq_controls;
86 unsigned int irq_enable;
87 unsigned int irq_ack;
88 unsigned int irq_bit_recv_not_empty;
89 unsigned int irq_bit_send_empty;
90};
91
92struct apple_mbox {
93 void __iomem *regs;
94 const struct apple_mbox_hw *hw;
95
96 int irq_recv_not_empty;
97 int irq_send_empty;
98
99 struct mbox_chan chan;
100
101 struct device *dev;
102 struct mbox_controller controller;
103};
104
105static const struct of_device_id apple_mbox_of_match[];
106
107static bool apple_mbox_hw_can_send(struct apple_mbox *apple_mbox)
108{
109 u32 mbox_ctrl =
110 readl_relaxed(apple_mbox->regs + apple_mbox->hw->a2i_control);
111
112 return !(mbox_ctrl & apple_mbox->hw->control_full);
113}
114
115static int apple_mbox_hw_send(struct apple_mbox *apple_mbox,
116 struct apple_mbox_msg *msg)
117{
118 if (!apple_mbox_hw_can_send(apple_mbox))
119 return -EBUSY;
120
121 dev_dbg(apple_mbox->dev, "> TX %016llx %08x\n", msg->msg0, msg->msg1);
122
123 writeq_relaxed(msg->msg0, apple_mbox->regs + apple_mbox->hw->a2i_send0);
124 writeq_relaxed(FIELD_PREP(APPLE_MBOX_MSG1_MSG, msg->msg1),
125 apple_mbox->regs + apple_mbox->hw->a2i_send1);
126
127 return 0;
128}
129
130static bool apple_mbox_hw_can_recv(struct apple_mbox *apple_mbox)
131{
132 u32 mbox_ctrl =
133 readl_relaxed(apple_mbox->regs + apple_mbox->hw->i2a_control);
134
135 return !(mbox_ctrl & apple_mbox->hw->control_empty);
136}
137
138static int apple_mbox_hw_recv(struct apple_mbox *apple_mbox,
139 struct apple_mbox_msg *msg)
140{
141 if (!apple_mbox_hw_can_recv(apple_mbox))
142 return -ENOMSG;
143
144 msg->msg0 = readq_relaxed(apple_mbox->regs + apple_mbox->hw->i2a_recv0);
145 msg->msg1 = FIELD_GET(
146 APPLE_MBOX_MSG1_MSG,
147 readq_relaxed(apple_mbox->regs + apple_mbox->hw->i2a_recv1));
148
149 dev_dbg(apple_mbox->dev, "< RX %016llx %08x\n", msg->msg0, msg->msg1);
150
151 return 0;
152}
153
154static int apple_mbox_chan_send_data(struct mbox_chan *chan, void *data)
155{
156 struct apple_mbox *apple_mbox = chan->con_priv;
157 struct apple_mbox_msg *msg = data;
158 int ret;
159
160 ret = apple_mbox_hw_send(apple_mbox, msg);
161 if (ret)
162 return ret;
163
164 /*
165 * The interrupt is level triggered and will keep firing as long as the
166 * FIFO is empty. It will also keep firing if the FIFO was empty
167 * at any point in the past until it has been acknowledged at the
168 * mailbox level. By acknowledging it here we can ensure that we will
169 * only get the interrupt once the FIFO has been cleared again.
170 * If the FIFO is already empty before the ack it will fire again
171 * immediately after the ack.
172 */
173 if (apple_mbox->hw->has_irq_controls) {
174 writel_relaxed(apple_mbox->hw->irq_bit_send_empty,
175 apple_mbox->regs + apple_mbox->hw->irq_ack);
176 }
177 enable_irq(apple_mbox->irq_send_empty);
178
179 return 0;
180}
181
182static irqreturn_t apple_mbox_send_empty_irq(int irq, void *data)
183{
184 struct apple_mbox *apple_mbox = data;
185
186 /*
187 * We don't need to acknowledge the interrupt at the mailbox level
188 * here even if supported by the hardware. It will keep firing but that
189 * doesn't matter since it's disabled at the main interrupt controller.
190 * apple_mbox_chan_send_data will acknowledge it before enabling
191 * it at the main controller again.
192 */
193 disable_irq_nosync(apple_mbox->irq_send_empty);
194 mbox_chan_txdone(&apple_mbox->chan, 0);
195 return IRQ_HANDLED;
196}
197
198static irqreturn_t apple_mbox_recv_irq(int irq, void *data)
199{
200 struct apple_mbox *apple_mbox = data;
201 struct apple_mbox_msg msg;
202
203 while (apple_mbox_hw_recv(apple_mbox, &msg) == 0)
204 mbox_chan_received_data(&apple_mbox->chan, (void *)&msg);
205
206 /*
207 * The interrupt will keep firing even if there are no more messages
208 * unless we also acknowledge it at the mailbox level here.
209 * There's no race if a message comes in between the check in the while
210 * loop above and the ack below: If a new messages arrives inbetween
211 * those two the interrupt will just fire again immediately after the
212 * ack since it's level triggered.
213 */
214 if (apple_mbox->hw->has_irq_controls) {
215 writel_relaxed(apple_mbox->hw->irq_bit_recv_not_empty,
216 apple_mbox->regs + apple_mbox->hw->irq_ack);
217 }
218
219 return IRQ_HANDLED;
220}
221
222static int apple_mbox_chan_startup(struct mbox_chan *chan)
223{
224 struct apple_mbox *apple_mbox = chan->con_priv;
225
226 /*
227 * Only some variants of this mailbox HW provide interrupt control
228 * at the mailbox level. We therefore need to handle enabling/disabling
229 * interrupts at the main interrupt controller anyway for hardware that
230 * doesn't. Just always keep the interrupts we care about enabled at
231 * the mailbox level so that both hardware revisions behave almost
232 * the same.
233 */
234 if (apple_mbox->hw->has_irq_controls) {
235 writel_relaxed(apple_mbox->hw->irq_bit_recv_not_empty |
236 apple_mbox->hw->irq_bit_send_empty,
237 apple_mbox->regs + apple_mbox->hw->irq_enable);
238 }
239
240 enable_irq(apple_mbox->irq_recv_not_empty);
241 return 0;
242}
243
244static void apple_mbox_chan_shutdown(struct mbox_chan *chan)
245{
246 struct apple_mbox *apple_mbox = chan->con_priv;
247
248 disable_irq(apple_mbox->irq_recv_not_empty);
249}
250
251static const struct mbox_chan_ops apple_mbox_ops = {
252 .send_data = apple_mbox_chan_send_data,
253 .startup = apple_mbox_chan_startup,
254 .shutdown = apple_mbox_chan_shutdown,
255};
256
257static struct mbox_chan *apple_mbox_of_xlate(struct mbox_controller *mbox,
258 const struct of_phandle_args *args)
259{
260 if (args->args_count != 0)
261 return ERR_PTR(-EINVAL);
262
263 return &mbox->chans[0];
264}
265
266static int apple_mbox_probe(struct platform_device *pdev)
267{
268 int ret;
269 const struct of_device_id *match;
270 char *irqname;
271 struct apple_mbox *mbox;
272 struct device *dev = &pdev->dev;
273
274 match = of_match_node(apple_mbox_of_match, pdev->dev.of_node);
275 if (!match)
276 return -EINVAL;
277 if (!match->data)
278 return -EINVAL;
279
280 mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
281 if (!mbox)
282 return -ENOMEM;
283 platform_set_drvdata(pdev, mbox);
284
285 mbox->dev = dev;
286 mbox->regs = devm_platform_ioremap_resource(pdev, 0);
287 if (IS_ERR(mbox->regs))
288 return PTR_ERR(mbox->regs);
289
290 mbox->hw = match->data;
291 mbox->irq_recv_not_empty =
292 platform_get_irq_byname(pdev, "recv-not-empty");
293 if (mbox->irq_recv_not_empty < 0)
294 return -ENODEV;
295
296 mbox->irq_send_empty = platform_get_irq_byname(pdev, "send-empty");
297 if (mbox->irq_send_empty < 0)
298 return -ENODEV;
299
300 mbox->controller.dev = mbox->dev;
301 mbox->controller.num_chans = 1;
302 mbox->controller.chans = &mbox->chan;
303 mbox->controller.ops = &apple_mbox_ops;
304 mbox->controller.txdone_irq = true;
305 mbox->controller.of_xlate = apple_mbox_of_xlate;
306 mbox->chan.con_priv = mbox;
307
308 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s-recv", dev_name(dev));
309 if (!irqname)
310 return -ENOMEM;
311
312 ret = devm_request_threaded_irq(dev, mbox->irq_recv_not_empty, NULL,
313 apple_mbox_recv_irq,
314 IRQF_NO_AUTOEN | IRQF_ONESHOT, irqname,
315 mbox);
316 if (ret)
317 return ret;
318
319 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s-send", dev_name(dev));
320 if (!irqname)
321 return -ENOMEM;
322
323 ret = devm_request_irq(dev, mbox->irq_send_empty,
324 apple_mbox_send_empty_irq, IRQF_NO_AUTOEN,
325 irqname, mbox);
326 if (ret)
327 return ret;
328
329 return devm_mbox_controller_register(dev, &mbox->controller);
330}
331
332static const struct apple_mbox_hw apple_mbox_asc_hw = {
333 .control_full = APPLE_ASC_MBOX_CONTROL_FULL,
334 .control_empty = APPLE_ASC_MBOX_CONTROL_EMPTY,
335
336 .a2i_control = APPLE_ASC_MBOX_A2I_CONTROL,
337 .a2i_send0 = APPLE_ASC_MBOX_A2I_SEND0,
338 .a2i_send1 = APPLE_ASC_MBOX_A2I_SEND1,
339
340 .i2a_control = APPLE_ASC_MBOX_I2A_CONTROL,
341 .i2a_recv0 = APPLE_ASC_MBOX_I2A_RECV0,
342 .i2a_recv1 = APPLE_ASC_MBOX_I2A_RECV1,
343
344 .has_irq_controls = false,
345};
346
347static const struct apple_mbox_hw apple_mbox_m3_hw = {
348 .control_full = APPLE_M3_MBOX_CONTROL_FULL,
349 .control_empty = APPLE_M3_MBOX_CONTROL_EMPTY,
350
351 .a2i_control = APPLE_M3_MBOX_A2I_CONTROL,
352 .a2i_send0 = APPLE_M3_MBOX_A2I_SEND0,
353 .a2i_send1 = APPLE_M3_MBOX_A2I_SEND1,
354
355 .i2a_control = APPLE_M3_MBOX_I2A_CONTROL,
356 .i2a_recv0 = APPLE_M3_MBOX_I2A_RECV0,
357 .i2a_recv1 = APPLE_M3_MBOX_I2A_RECV1,
358
359 .has_irq_controls = true,
360 .irq_enable = APPLE_M3_MBOX_IRQ_ENABLE,
361 .irq_ack = APPLE_M3_MBOX_IRQ_ACK,
362 .irq_bit_recv_not_empty = APPLE_M3_MBOX_IRQ_I2A_NOT_EMPTY,
363 .irq_bit_send_empty = APPLE_M3_MBOX_IRQ_A2I_EMPTY,
364};
365
366static const struct of_device_id apple_mbox_of_match[] = {
367 { .compatible = "apple,t8103-asc-mailbox", .data = &apple_mbox_asc_hw },
368 { .compatible = "apple,t8103-m3-mailbox", .data = &apple_mbox_m3_hw },
369 {}
370};
371MODULE_DEVICE_TABLE(of, apple_mbox_of_match);
372
373static struct platform_driver apple_mbox_driver = {
374 .driver = {
375 .name = "apple-mailbox",
376 .of_match_table = apple_mbox_of_match,
377 },
378 .probe = apple_mbox_probe,
379};
380module_platform_driver(apple_mbox_driver);
381
382MODULE_LICENSE("Dual MIT/GPL");
383MODULE_AUTHOR("Sven Peter <sven@svenpeter.dev>");
384MODULE_DESCRIPTION("Apple Mailbox driver");