Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 1 | /* |
Tatyana Nikolova | c5488c5 | 2011-11-28 14:22:29 -0600 | [diff] [blame] | 2 | * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved. |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | * |
| 32 | */ |
| 33 | |
| 34 | #include <linux/module.h> |
| 35 | #include <linux/moduleparam.h> |
| 36 | #include <linux/netdevice.h> |
| 37 | #include <linux/etherdevice.h> |
| 38 | #include <linux/ethtool.h> |
| 39 | #include <linux/mii.h> |
| 40 | #include <linux/if_vlan.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 41 | #include <linux/slab.h> |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 42 | #include <linux/crc32.h> |
| 43 | #include <linux/in.h> |
| 44 | #include <linux/ip.h> |
| 45 | #include <linux/tcp.h> |
| 46 | #include <linux/init.h> |
| 47 | |
| 48 | #include <asm/io.h> |
| 49 | #include <asm/irq.h> |
| 50 | #include <asm/byteorder.h> |
| 51 | |
| 52 | #include "nes.h" |
| 53 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 54 | static u16 nes_read16_eeprom(void __iomem *addr, u16 offset); |
| 55 | |
| 56 | u32 mh_detected; |
| 57 | u32 mh_pauses_sent; |
| 58 | |
Tatyana Nikolova | b0fda90 | 2011-12-07 16:04:27 -0600 | [diff] [blame] | 59 | static u32 nes_set_pau(struct nes_device *nesdev) |
Faisal Latif | 0f0bee8 | 2011-09-25 20:34:00 -0500 | [diff] [blame] | 60 | { |
| 61 | u32 ret = 0; |
| 62 | u32 counter; |
| 63 | |
| 64 | nes_write_indexed(nesdev, NES_IDX_GPR2, NES_ENABLE_PAU); |
| 65 | nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1); |
| 66 | |
| 67 | for (counter = 0; counter < NES_PAU_COUNTER; counter++) { |
| 68 | udelay(30); |
| 69 | if (!nes_read_indexed(nesdev, NES_IDX_GPR2)) { |
| 70 | printk(KERN_INFO PFX "PAU is supported.\n"); |
| 71 | break; |
| 72 | } |
| 73 | nes_write_indexed(nesdev, NES_IDX_GPR_TRIGGER, 1); |
| 74 | } |
| 75 | if (counter == NES_PAU_COUNTER) { |
| 76 | printk(KERN_INFO PFX "PAU is not supported.\n"); |
| 77 | return -EPERM; |
| 78 | } |
| 79 | return ret; |
| 80 | } |
| 81 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 82 | /** |
| 83 | * nes_read_eeprom_values - |
| 84 | */ |
| 85 | int nes_read_eeprom_values(struct nes_device *nesdev, struct nes_adapter *nesadapter) |
| 86 | { |
| 87 | u32 mac_addr_low; |
| 88 | u16 mac_addr_high; |
| 89 | u16 eeprom_data; |
| 90 | u16 eeprom_offset; |
| 91 | u16 next_section_address; |
| 92 | u16 sw_section_ver; |
| 93 | u8 major_ver = 0; |
| 94 | u8 minor_ver = 0; |
| 95 | |
| 96 | /* TODO: deal with EEPROM endian issues */ |
| 97 | if (nesadapter->firmware_eeprom_offset == 0) { |
| 98 | /* Read the EEPROM Parameters */ |
| 99 | eeprom_data = nes_read16_eeprom(nesdev->regs, 0); |
| 100 | nes_debug(NES_DBG_HW, "EEPROM Offset 0 = 0x%04X\n", eeprom_data); |
| 101 | eeprom_offset = 2 + (((eeprom_data & 0x007f) << 3) << |
| 102 | ((eeprom_data & 0x0080) >> 7)); |
| 103 | nes_debug(NES_DBG_HW, "Firmware Offset = 0x%04X\n", eeprom_offset); |
| 104 | nesadapter->firmware_eeprom_offset = eeprom_offset; |
| 105 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4); |
| 106 | if (eeprom_data != 0x5746) { |
| 107 | nes_debug(NES_DBG_HW, "Not a valid Firmware Image = 0x%04X\n", eeprom_data); |
| 108 | return -1; |
| 109 | } |
| 110 | |
| 111 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); |
| 112 | nes_debug(NES_DBG_HW, "EEPROM Offset %u = 0x%04X\n", |
| 113 | eeprom_offset + 2, eeprom_data); |
| 114 | eeprom_offset += ((eeprom_data & 0x00ff) << 3) << ((eeprom_data & 0x0100) >> 8); |
| 115 | nes_debug(NES_DBG_HW, "Software Offset = 0x%04X\n", eeprom_offset); |
| 116 | nesadapter->software_eeprom_offset = eeprom_offset; |
| 117 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 4); |
| 118 | if (eeprom_data != 0x5753) { |
| 119 | printk("Not a valid Software Image = 0x%04X\n", eeprom_data); |
| 120 | return -1; |
| 121 | } |
| 122 | sw_section_ver = nes_read16_eeprom(nesdev->regs, nesadapter->software_eeprom_offset + 6); |
| 123 | nes_debug(NES_DBG_HW, "Software section version number = 0x%04X\n", |
| 124 | sw_section_ver); |
| 125 | |
| 126 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); |
| 127 | nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", |
| 128 | eeprom_offset + 2, eeprom_data); |
| 129 | next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) << |
| 130 | ((eeprom_data & 0x0100) >> 8)); |
| 131 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); |
| 132 | if (eeprom_data != 0x414d) { |
| 133 | nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n", |
| 134 | eeprom_data); |
| 135 | goto no_fw_rev; |
| 136 | } |
| 137 | eeprom_offset = next_section_address; |
| 138 | |
| 139 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); |
| 140 | nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", |
| 141 | eeprom_offset + 2, eeprom_data); |
| 142 | next_section_address = eeprom_offset + (((eeprom_data & 0x00ff) << 3) << |
| 143 | ((eeprom_data & 0x0100) >> 8)); |
| 144 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); |
| 145 | if (eeprom_data != 0x4f52) { |
| 146 | nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x4f52 but was 0x%04X\n", |
| 147 | eeprom_data); |
| 148 | goto no_fw_rev; |
| 149 | } |
| 150 | eeprom_offset = next_section_address; |
| 151 | |
| 152 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); |
| 153 | nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", |
| 154 | eeprom_offset + 2, eeprom_data); |
| 155 | next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); |
| 156 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); |
| 157 | if (eeprom_data != 0x5746) { |
| 158 | nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5746 but was 0x%04X\n", |
| 159 | eeprom_data); |
| 160 | goto no_fw_rev; |
| 161 | } |
| 162 | eeprom_offset = next_section_address; |
| 163 | |
| 164 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); |
| 165 | nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", |
| 166 | eeprom_offset + 2, eeprom_data); |
| 167 | next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); |
| 168 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); |
| 169 | if (eeprom_data != 0x5753) { |
| 170 | nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x5753 but was 0x%04X\n", |
| 171 | eeprom_data); |
| 172 | goto no_fw_rev; |
| 173 | } |
| 174 | eeprom_offset = next_section_address; |
| 175 | |
| 176 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); |
| 177 | nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", |
| 178 | eeprom_offset + 2, eeprom_data); |
| 179 | next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); |
| 180 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); |
| 181 | if (eeprom_data != 0x414d) { |
| 182 | nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x414d but was 0x%04X\n", |
| 183 | eeprom_data); |
| 184 | goto no_fw_rev; |
| 185 | } |
| 186 | eeprom_offset = next_section_address; |
| 187 | |
| 188 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset + 2); |
| 189 | nes_debug(NES_DBG_HW, "EEPROM Offset %u (next section) = 0x%04X\n", |
| 190 | eeprom_offset + 2, eeprom_data); |
| 191 | next_section_address = eeprom_offset + ((eeprom_data & 0x00ff) << 3); |
| 192 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 4); |
| 193 | if (eeprom_data != 0x464e) { |
| 194 | nes_debug(NES_DBG_HW, "EEPROM Changed offset should be 0x464e but was 0x%04X\n", |
| 195 | eeprom_data); |
| 196 | goto no_fw_rev; |
| 197 | } |
| 198 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 8); |
| 199 | printk(PFX "Firmware version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data); |
| 200 | major_ver = (u8)(eeprom_data >> 8); |
| 201 | minor_ver = (u8)(eeprom_data); |
| 202 | |
| 203 | if (nes_drv_opt & NES_DRV_OPT_DISABLE_VIRT_WQ) { |
| 204 | nes_debug(NES_DBG_HW, "Virtual WQs have been disabled\n"); |
| 205 | } else if (((major_ver == 2) && (minor_ver > 21)) || ((major_ver > 2) && (major_ver != 255))) { |
| 206 | nesadapter->virtwq = 1; |
| 207 | } |
Don Wood | 8b1c9dc | 2009-09-05 20:36:38 -0700 | [diff] [blame] | 208 | if (((major_ver == 3) && (minor_ver >= 16)) || (major_ver > 3)) |
| 209 | nesadapter->send_term_ok = 1; |
| 210 | |
Faisal Latif | 0f0bee8 | 2011-09-25 20:34:00 -0500 | [diff] [blame] | 211 | if (nes_drv_opt & NES_DRV_OPT_ENABLE_PAU) { |
| 212 | if (!nes_set_pau(nesdev)) |
| 213 | nesadapter->allow_unaligned_fpdus = 1; |
| 214 | } |
| 215 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 216 | nesadapter->firmware_version = (((u32)(u8)(eeprom_data>>8)) << 16) + |
| 217 | (u32)((u8)eeprom_data); |
| 218 | |
Chien Tung | 0eec495e | 2010-06-09 20:19:53 +0000 | [diff] [blame] | 219 | eeprom_data = nes_read16_eeprom(nesdev->regs, next_section_address + 10); |
| 220 | printk(PFX "EEPROM version %u.%u\n", (u8)(eeprom_data>>8), (u8)eeprom_data); |
| 221 | nesadapter->eeprom_version = (((u32)(u8)(eeprom_data>>8)) << 16) + |
| 222 | (u32)((u8)eeprom_data); |
| 223 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 224 | no_fw_rev: |
| 225 | /* eeprom is valid */ |
| 226 | eeprom_offset = nesadapter->software_eeprom_offset; |
| 227 | eeprom_offset += 8; |
| 228 | nesadapter->netdev_max = (u8)nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 229 | eeprom_offset += 2; |
| 230 | mac_addr_high = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 231 | eeprom_offset += 2; |
| 232 | mac_addr_low = (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 233 | eeprom_offset += 2; |
| 234 | mac_addr_low <<= 16; |
| 235 | mac_addr_low += (u32)nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 236 | nes_debug(NES_DBG_HW, "Base MAC Address = 0x%04X%08X\n", |
| 237 | mac_addr_high, mac_addr_low); |
| 238 | nes_debug(NES_DBG_HW, "MAC Address count = %u\n", nesadapter->netdev_max); |
| 239 | |
| 240 | nesadapter->mac_addr_low = mac_addr_low; |
| 241 | nesadapter->mac_addr_high = mac_addr_high; |
| 242 | |
| 243 | /* Read the Phy Type array */ |
| 244 | eeprom_offset += 10; |
| 245 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 246 | nesadapter->phy_type[0] = (u8)(eeprom_data >> 8); |
| 247 | nesadapter->phy_type[1] = (u8)eeprom_data; |
| 248 | |
| 249 | /* Read the port array */ |
| 250 | eeprom_offset += 2; |
| 251 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 252 | nesadapter->phy_type[2] = (u8)(eeprom_data >> 8); |
| 253 | nesadapter->phy_type[3] = (u8)eeprom_data; |
| 254 | /* port_count is set by soft reset reg */ |
| 255 | nes_debug(NES_DBG_HW, "port_count = %u, port 0 -> %u, port 1 -> %u," |
| 256 | " port 2 -> %u, port 3 -> %u\n", |
| 257 | nesadapter->port_count, |
| 258 | nesadapter->phy_type[0], nesadapter->phy_type[1], |
| 259 | nesadapter->phy_type[2], nesadapter->phy_type[3]); |
| 260 | |
| 261 | /* Read PD config array */ |
| 262 | eeprom_offset += 10; |
| 263 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 264 | nesadapter->pd_config_size[0] = eeprom_data; |
| 265 | eeprom_offset += 2; |
| 266 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 267 | nesadapter->pd_config_base[0] = eeprom_data; |
| 268 | nes_debug(NES_DBG_HW, "PD0 config, size=0x%04x, base=0x%04x\n", |
| 269 | nesadapter->pd_config_size[0], nesadapter->pd_config_base[0]); |
| 270 | |
| 271 | eeprom_offset += 2; |
| 272 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 273 | nesadapter->pd_config_size[1] = eeprom_data; |
| 274 | eeprom_offset += 2; |
| 275 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 276 | nesadapter->pd_config_base[1] = eeprom_data; |
| 277 | nes_debug(NES_DBG_HW, "PD1 config, size=0x%04x, base=0x%04x\n", |
| 278 | nesadapter->pd_config_size[1], nesadapter->pd_config_base[1]); |
| 279 | |
| 280 | eeprom_offset += 2; |
| 281 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 282 | nesadapter->pd_config_size[2] = eeprom_data; |
| 283 | eeprom_offset += 2; |
| 284 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 285 | nesadapter->pd_config_base[2] = eeprom_data; |
| 286 | nes_debug(NES_DBG_HW, "PD2 config, size=0x%04x, base=0x%04x\n", |
| 287 | nesadapter->pd_config_size[2], nesadapter->pd_config_base[2]); |
| 288 | |
| 289 | eeprom_offset += 2; |
| 290 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 291 | nesadapter->pd_config_size[3] = eeprom_data; |
| 292 | eeprom_offset += 2; |
| 293 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 294 | nesadapter->pd_config_base[3] = eeprom_data; |
| 295 | nes_debug(NES_DBG_HW, "PD3 config, size=0x%04x, base=0x%04x\n", |
| 296 | nesadapter->pd_config_size[3], nesadapter->pd_config_base[3]); |
| 297 | |
| 298 | /* Read Rx Pool Size */ |
| 299 | eeprom_offset += 22; /* 46 */ |
| 300 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 301 | eeprom_offset += 2; |
| 302 | nesadapter->rx_pool_size = (((u32)eeprom_data) << 16) + |
| 303 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 304 | nes_debug(NES_DBG_HW, "rx_pool_size = 0x%08X\n", nesadapter->rx_pool_size); |
| 305 | |
| 306 | eeprom_offset += 2; |
| 307 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 308 | eeprom_offset += 2; |
| 309 | nesadapter->tx_pool_size = (((u32)eeprom_data) << 16) + |
| 310 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 311 | nes_debug(NES_DBG_HW, "tx_pool_size = 0x%08X\n", nesadapter->tx_pool_size); |
| 312 | |
| 313 | eeprom_offset += 2; |
| 314 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 315 | eeprom_offset += 2; |
| 316 | nesadapter->rx_threshold = (((u32)eeprom_data) << 16) + |
| 317 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 318 | nes_debug(NES_DBG_HW, "rx_threshold = 0x%08X\n", nesadapter->rx_threshold); |
| 319 | |
| 320 | eeprom_offset += 2; |
| 321 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 322 | eeprom_offset += 2; |
| 323 | nesadapter->tcp_timer_core_clk_divisor = (((u32)eeprom_data) << 16) + |
| 324 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 325 | nes_debug(NES_DBG_HW, "tcp_timer_core_clk_divisor = 0x%08X\n", |
| 326 | nesadapter->tcp_timer_core_clk_divisor); |
| 327 | |
| 328 | eeprom_offset += 2; |
| 329 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 330 | eeprom_offset += 2; |
| 331 | nesadapter->iwarp_config = (((u32)eeprom_data) << 16) + |
| 332 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 333 | nes_debug(NES_DBG_HW, "iwarp_config = 0x%08X\n", nesadapter->iwarp_config); |
| 334 | |
| 335 | eeprom_offset += 2; |
| 336 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 337 | eeprom_offset += 2; |
| 338 | nesadapter->cm_config = (((u32)eeprom_data) << 16) + |
| 339 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 340 | nes_debug(NES_DBG_HW, "cm_config = 0x%08X\n", nesadapter->cm_config); |
| 341 | |
| 342 | eeprom_offset += 2; |
| 343 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 344 | eeprom_offset += 2; |
| 345 | nesadapter->sws_timer_config = (((u32)eeprom_data) << 16) + |
| 346 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 347 | nes_debug(NES_DBG_HW, "sws_timer_config = 0x%08X\n", nesadapter->sws_timer_config); |
| 348 | |
| 349 | eeprom_offset += 2; |
| 350 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 351 | eeprom_offset += 2; |
| 352 | nesadapter->tcp_config1 = (((u32)eeprom_data) << 16) + |
| 353 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 354 | nes_debug(NES_DBG_HW, "tcp_config1 = 0x%08X\n", nesadapter->tcp_config1); |
| 355 | |
| 356 | eeprom_offset += 2; |
| 357 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 358 | eeprom_offset += 2; |
| 359 | nesadapter->wqm_wat = (((u32)eeprom_data) << 16) + |
| 360 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 361 | nes_debug(NES_DBG_HW, "wqm_wat = 0x%08X\n", nesadapter->wqm_wat); |
| 362 | |
| 363 | eeprom_offset += 2; |
| 364 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 365 | eeprom_offset += 2; |
| 366 | nesadapter->core_clock = (((u32)eeprom_data) << 16) + |
| 367 | nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 368 | nes_debug(NES_DBG_HW, "core_clock = 0x%08X\n", nesadapter->core_clock); |
| 369 | |
| 370 | if ((sw_section_ver) && (nesadapter->hw_rev != NE020_REV)) { |
| 371 | eeprom_offset += 2; |
| 372 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 373 | nesadapter->phy_index[0] = (eeprom_data & 0xff00)>>8; |
| 374 | nesadapter->phy_index[1] = eeprom_data & 0x00ff; |
| 375 | eeprom_offset += 2; |
| 376 | eeprom_data = nes_read16_eeprom(nesdev->regs, eeprom_offset); |
| 377 | nesadapter->phy_index[2] = (eeprom_data & 0xff00)>>8; |
| 378 | nesadapter->phy_index[3] = eeprom_data & 0x00ff; |
| 379 | } else { |
| 380 | nesadapter->phy_index[0] = 4; |
| 381 | nesadapter->phy_index[1] = 5; |
| 382 | nesadapter->phy_index[2] = 6; |
| 383 | nesadapter->phy_index[3] = 7; |
| 384 | } |
| 385 | nes_debug(NES_DBG_HW, "Phy address map = 0 > %u, 1 > %u, 2 > %u, 3 > %u\n", |
| 386 | nesadapter->phy_index[0],nesadapter->phy_index[1], |
| 387 | nesadapter->phy_index[2],nesadapter->phy_index[3]); |
| 388 | } |
| 389 | |
| 390 | return 0; |
| 391 | } |
| 392 | |
| 393 | |
| 394 | /** |
| 395 | * nes_read16_eeprom |
| 396 | */ |
| 397 | static u16 nes_read16_eeprom(void __iomem *addr, u16 offset) |
| 398 | { |
| 399 | writel(NES_EEPROM_READ_REQUEST + (offset >> 1), |
| 400 | (void __iomem *)addr + NES_EEPROM_COMMAND); |
| 401 | |
| 402 | do { |
| 403 | } while (readl((void __iomem *)addr + NES_EEPROM_COMMAND) & |
| 404 | NES_EEPROM_READ_REQUEST); |
| 405 | |
| 406 | return readw((void __iomem *)addr + NES_EEPROM_DATA); |
| 407 | } |
| 408 | |
| 409 | |
| 410 | /** |
| 411 | * nes_write_1G_phy_reg |
| 412 | */ |
| 413 | void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data) |
| 414 | { |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 415 | u32 u32temp; |
| 416 | u32 counter; |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 417 | |
| 418 | nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, |
| 419 | 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23)); |
| 420 | for (counter = 0; counter < 100 ; counter++) { |
| 421 | udelay(30); |
| 422 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); |
| 423 | if (u32temp & 1) { |
| 424 | /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */ |
| 425 | nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); |
| 426 | break; |
| 427 | } |
| 428 | } |
| 429 | if (!(u32temp & 1)) |
| 430 | nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", |
| 431 | u32temp); |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 432 | } |
| 433 | |
| 434 | |
| 435 | /** |
| 436 | * nes_read_1G_phy_reg |
| 437 | * This routine only issues the read, the data must be read |
| 438 | * separately. |
| 439 | */ |
| 440 | void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data) |
| 441 | { |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 442 | u32 u32temp; |
| 443 | u32 counter; |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 444 | |
| 445 | /* nes_debug(NES_DBG_PHY, "phy addr = %d, mac_index = %d\n", |
| 446 | phy_addr, nesdev->mac_index); */ |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 447 | |
| 448 | nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, |
| 449 | 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23)); |
| 450 | for (counter = 0; counter < 100 ; counter++) { |
| 451 | udelay(30); |
| 452 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); |
| 453 | if (u32temp & 1) { |
| 454 | /* nes_debug(NES_DBG_PHY, "Phy interrupt status = 0x%X.\n", u32temp); */ |
| 455 | nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); |
| 456 | break; |
| 457 | } |
| 458 | } |
| 459 | if (!(u32temp & 1)) { |
| 460 | nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", |
| 461 | u32temp); |
| 462 | *data = 0xffff; |
| 463 | } else { |
| 464 | *data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); |
| 465 | } |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 466 | } |
| 467 | |
| 468 | |
| 469 | /** |
| 470 | * nes_write_10G_phy_reg |
| 471 | */ |
Eric Schneider | 0e1de5d | 2008-04-29 13:46:54 -0700 | [diff] [blame] | 472 | void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg, |
| 473 | u16 data) |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 474 | { |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 475 | u32 port_addr; |
| 476 | u32 u32temp; |
| 477 | u32 counter; |
| 478 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 479 | port_addr = phy_addr; |
| 480 | |
| 481 | /* set address */ |
| 482 | nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, |
| 483 | 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); |
| 484 | for (counter = 0; counter < 100 ; counter++) { |
| 485 | udelay(30); |
| 486 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); |
| 487 | if (u32temp & 1) { |
| 488 | nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); |
| 489 | break; |
| 490 | } |
| 491 | } |
| 492 | if (!(u32temp & 1)) |
| 493 | nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", |
| 494 | u32temp); |
| 495 | |
| 496 | /* set data */ |
| 497 | nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, |
| 498 | 0x10020000 | (u32)data | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); |
| 499 | for (counter = 0; counter < 100 ; counter++) { |
| 500 | udelay(30); |
| 501 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); |
| 502 | if (u32temp & 1) { |
| 503 | nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); |
| 504 | break; |
| 505 | } |
| 506 | } |
| 507 | if (!(u32temp & 1)) |
| 508 | nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", |
| 509 | u32temp); |
| 510 | } |
| 511 | |
| 512 | |
| 513 | /** |
| 514 | * nes_read_10G_phy_reg |
| 515 | * This routine only issues the read, the data must be read |
| 516 | * separately. |
| 517 | */ |
Eric Schneider | 0e1de5d | 2008-04-29 13:46:54 -0700 | [diff] [blame] | 518 | void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg) |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 519 | { |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 520 | u32 port_addr; |
| 521 | u32 u32temp; |
| 522 | u32 counter; |
| 523 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 524 | port_addr = phy_addr; |
| 525 | |
| 526 | /* set address */ |
| 527 | nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, |
| 528 | 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); |
| 529 | for (counter = 0; counter < 100 ; counter++) { |
| 530 | udelay(30); |
| 531 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); |
| 532 | if (u32temp & 1) { |
| 533 | nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); |
| 534 | break; |
| 535 | } |
| 536 | } |
| 537 | if (!(u32temp & 1)) |
| 538 | nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", |
| 539 | u32temp); |
| 540 | |
| 541 | /* issue read */ |
| 542 | nes_write_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL, |
| 543 | 0x30020000 | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23)); |
| 544 | for (counter = 0; counter < 100 ; counter++) { |
| 545 | udelay(30); |
| 546 | u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS); |
| 547 | if (u32temp & 1) { |
| 548 | nes_write_indexed(nesdev, NES_IDX_MAC_INT_STATUS, 1); |
| 549 | break; |
| 550 | } |
| 551 | } |
| 552 | if (!(u32temp & 1)) |
| 553 | nes_debug(NES_DBG_PHY, "Phy is not responding. interrupt status = 0x%X.\n", |
| 554 | u32temp); |
| 555 | } |
| 556 | |
| 557 | |
| 558 | /** |
| 559 | * nes_get_cqp_request |
| 560 | */ |
| 561 | struct nes_cqp_request *nes_get_cqp_request(struct nes_device *nesdev) |
| 562 | { |
| 563 | unsigned long flags; |
| 564 | struct nes_cqp_request *cqp_request = NULL; |
| 565 | |
| 566 | if (!list_empty(&nesdev->cqp_avail_reqs)) { |
| 567 | spin_lock_irqsave(&nesdev->cqp.lock, flags); |
Faisal Latif | f3181a1 | 2008-11-21 20:50:55 -0600 | [diff] [blame] | 568 | if (!list_empty(&nesdev->cqp_avail_reqs)) { |
| 569 | cqp_request = list_entry(nesdev->cqp_avail_reqs.next, |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 570 | struct nes_cqp_request, list); |
Faisal Latif | f3181a1 | 2008-11-21 20:50:55 -0600 | [diff] [blame] | 571 | list_del_init(&cqp_request->list); |
| 572 | } |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 573 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); |
Faisal Latif | f3181a1 | 2008-11-21 20:50:55 -0600 | [diff] [blame] | 574 | } |
| 575 | if (cqp_request == NULL) { |
Don Wood | ba0c5d9 | 2009-09-05 20:36:37 -0700 | [diff] [blame] | 576 | cqp_request = kzalloc(sizeof(struct nes_cqp_request), GFP_ATOMIC); |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 577 | if (cqp_request) { |
| 578 | cqp_request->dynamic = 1; |
| 579 | INIT_LIST_HEAD(&cqp_request->list); |
| 580 | } |
| 581 | } |
| 582 | |
| 583 | if (cqp_request) { |
| 584 | init_waitqueue_head(&cqp_request->waitq); |
| 585 | cqp_request->waiting = 0; |
| 586 | cqp_request->request_done = 0; |
| 587 | cqp_request->callback = 0; |
| 588 | init_waitqueue_head(&cqp_request->waitq); |
| 589 | nes_debug(NES_DBG_CQP, "Got cqp request %p from the available list \n", |
| 590 | cqp_request); |
| 591 | } else |
| 592 | printk(KERN_ERR PFX "%s: Could not allocated a CQP request.\n", |
Harvey Harrison | 3371836 | 2008-04-16 21:01:10 -0700 | [diff] [blame] | 593 | __func__); |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 594 | |
| 595 | return cqp_request; |
| 596 | } |
| 597 | |
Roland Dreier | 1ff66e8 | 2008-07-14 23:48:49 -0700 | [diff] [blame] | 598 | void nes_free_cqp_request(struct nes_device *nesdev, |
| 599 | struct nes_cqp_request *cqp_request) |
| 600 | { |
| 601 | unsigned long flags; |
| 602 | |
| 603 | nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X) freed.\n", |
| 604 | cqp_request, |
| 605 | le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX]) & 0x3f); |
| 606 | |
| 607 | if (cqp_request->dynamic) { |
| 608 | kfree(cqp_request); |
| 609 | } else { |
| 610 | spin_lock_irqsave(&nesdev->cqp.lock, flags); |
| 611 | list_add_tail(&cqp_request->list, &nesdev->cqp_avail_reqs); |
| 612 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); |
| 613 | } |
| 614 | } |
| 615 | |
| 616 | void nes_put_cqp_request(struct nes_device *nesdev, |
| 617 | struct nes_cqp_request *cqp_request) |
| 618 | { |
| 619 | if (atomic_dec_and_test(&cqp_request->refcount)) |
| 620 | nes_free_cqp_request(nesdev, cqp_request); |
| 621 | } |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 622 | |
Faisal Latif | 0f0bee8 | 2011-09-25 20:34:00 -0500 | [diff] [blame] | 623 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 624 | /** |
| 625 | * nes_post_cqp_request |
| 626 | */ |
| 627 | void nes_post_cqp_request(struct nes_device *nesdev, |
Roland Dreier | 8294f29 | 2008-07-14 23:48:49 -0700 | [diff] [blame] | 628 | struct nes_cqp_request *cqp_request) |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 629 | { |
| 630 | struct nes_hw_cqp_wqe *cqp_wqe; |
| 631 | unsigned long flags; |
| 632 | u32 cqp_head; |
| 633 | u64 u64temp; |
Faisal Latif | 0f0bee8 | 2011-09-25 20:34:00 -0500 | [diff] [blame] | 634 | u32 opcode; |
| 635 | int ctx_index = NES_CQP_WQE_COMP_CTX_LOW_IDX; |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 636 | |
| 637 | spin_lock_irqsave(&nesdev->cqp.lock, flags); |
| 638 | |
| 639 | if (((((nesdev->cqp.sq_tail+(nesdev->cqp.sq_size*2))-nesdev->cqp.sq_head) & |
| 640 | (nesdev->cqp.sq_size - 1)) != 1) |
| 641 | && (list_empty(&nesdev->cqp_pending_reqs))) { |
| 642 | cqp_head = nesdev->cqp.sq_head++; |
| 643 | nesdev->cqp.sq_head &= nesdev->cqp.sq_size-1; |
| 644 | cqp_wqe = &nesdev->cqp.sq_vbase[cqp_head]; |
| 645 | memcpy(cqp_wqe, &cqp_request->cqp_wqe, sizeof(*cqp_wqe)); |
Faisal Latif | 0f0bee8 | 2011-09-25 20:34:00 -0500 | [diff] [blame] | 646 | opcode = le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]); |
| 647 | if ((opcode & NES_CQP_OPCODE_MASK) == NES_CQP_DOWNLOAD_SEGMENT) |
| 648 | ctx_index = NES_CQP_WQE_DL_COMP_CTX_LOW_IDX; |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 649 | barrier(); |
| 650 | u64temp = (unsigned long)cqp_request; |
Faisal Latif | 0f0bee8 | 2011-09-25 20:34:00 -0500 | [diff] [blame] | 651 | set_wqe_64bit_value(cqp_wqe->wqe_words, ctx_index, u64temp); |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 652 | nes_debug(NES_DBG_CQP, "CQP request (opcode 0x%02X), line 1 = 0x%08X put on CQPs SQ," |
Faisal Latif | 0f0bee8 | 2011-09-25 20:34:00 -0500 | [diff] [blame] | 653 | " request = %p, cqp_head = %u, cqp_tail = %u, cqp_size = %u," |
| 654 | " waiting = %d, refcount = %d.\n", |
| 655 | opcode & NES_CQP_OPCODE_MASK, |
| 656 | le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_ID_IDX]), cqp_request, |
| 657 | nesdev->cqp.sq_head, nesdev->cqp.sq_tail, nesdev->cqp.sq_size, |
| 658 | cqp_request->waiting, atomic_read(&cqp_request->refcount)); |
| 659 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 660 | barrier(); |
Roland Dreier | 8294f29 | 2008-07-14 23:48:49 -0700 | [diff] [blame] | 661 | |
| 662 | /* Ring doorbell (1 WQEs) */ |
| 663 | nes_write32(nesdev->regs+NES_WQE_ALLOC, 0x01800000 | nesdev->cqp.qp_id); |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 664 | |
| 665 | barrier(); |
| 666 | } else { |
| 667 | nes_debug(NES_DBG_CQP, "CQP request %p (opcode 0x%02X), line 1 = 0x%08X" |
| 668 | " put on the pending queue.\n", |
| 669 | cqp_request, |
| 670 | le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_OPCODE_IDX])&0x3f, |
| 671 | le32_to_cpu(cqp_request->cqp_wqe.wqe_words[NES_CQP_WQE_ID_IDX])); |
| 672 | list_add_tail(&cqp_request->list, &nesdev->cqp_pending_reqs); |
| 673 | } |
| 674 | |
| 675 | spin_unlock_irqrestore(&nesdev->cqp.lock, flags); |
| 676 | |
| 677 | return; |
| 678 | } |
| 679 | |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 680 | /** |
| 681 | * nes_arp_table |
| 682 | */ |
| 683 | int nes_arp_table(struct nes_device *nesdev, u32 ip_addr, u8 *mac_addr, u32 action) |
| 684 | { |
| 685 | struct nes_adapter *nesadapter = nesdev->nesadapter; |
| 686 | int arp_index; |
| 687 | int err = 0; |
Harvey Harrison | 03080e5c | 2009-01-10 21:45:42 -0800 | [diff] [blame] | 688 | __be32 tmp_addr; |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 689 | |
| 690 | for (arp_index = 0; (u32) arp_index < nesadapter->arp_table_size; arp_index++) { |
| 691 | if (nesadapter->arp_table[arp_index].ip_addr == ip_addr) |
| 692 | break; |
| 693 | } |
| 694 | |
| 695 | if (action == NES_ARP_ADD) { |
| 696 | if (arp_index != nesadapter->arp_table_size) { |
| 697 | return -1; |
| 698 | } |
| 699 | |
| 700 | arp_index = 0; |
| 701 | err = nes_alloc_resource(nesadapter, nesadapter->allocated_arps, |
Tatyana Nikolova | 8182164 | 2012-09-20 21:08:04 +0000 | [diff] [blame] | 702 | nesadapter->arp_table_size, (u32 *)&arp_index, &nesadapter->next_arp_index, NES_RESOURCE_ARP); |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 703 | if (err) { |
| 704 | nes_debug(NES_DBG_NETDEV, "nes_alloc_resource returned error = %u\n", err); |
| 705 | return err; |
| 706 | } |
| 707 | nes_debug(NES_DBG_NETDEV, "ADD, arp_index=%d\n", arp_index); |
| 708 | |
| 709 | nesadapter->arp_table[arp_index].ip_addr = ip_addr; |
| 710 | memcpy(nesadapter->arp_table[arp_index].mac_addr, mac_addr, ETH_ALEN); |
| 711 | return arp_index; |
| 712 | } |
| 713 | |
| 714 | /* DELETE or RESOLVE */ |
| 715 | if (arp_index == nesadapter->arp_table_size) { |
Harvey Harrison | 03080e5c | 2009-01-10 21:45:42 -0800 | [diff] [blame] | 716 | tmp_addr = cpu_to_be32(ip_addr); |
Harvey Harrison | 6377943 | 2008-10-31 00:56:00 -0700 | [diff] [blame] | 717 | nes_debug(NES_DBG_NETDEV, "MAC for %pI4 not in ARP table - cannot %s\n", |
Harvey Harrison | 03080e5c | 2009-01-10 21:45:42 -0800 | [diff] [blame] | 718 | &tmp_addr, action == NES_ARP_RESOLVE ? "resolve" : "delete"); |
Glenn Streiff | 3c2d774 | 2008-02-04 20:20:45 -0800 | [diff] [blame] | 719 | return -1; |
| 720 | } |
| 721 | |
| 722 | if (action == NES_ARP_RESOLVE) { |
| 723 | nes_debug(NES_DBG_NETDEV, "RESOLVE, arp_index=%d\n", arp_index); |
| 724 | return arp_index; |
| 725 | } |
| 726 | |
| 727 | if (action == NES_ARP_DELETE) { |
| 728 | nes_debug(NES_DBG_NETDEV, "DELETE, arp_index=%d\n", arp_index); |
| 729 | nesadapter->arp_table[arp_index].ip_addr = 0; |
| 730 | memset(nesadapter->arp_table[arp_index].mac_addr, 0x00, ETH_ALEN); |
| 731 | nes_free_resource(nesadapter, nesadapter->allocated_arps, arp_index); |
| 732 | return arp_index; |
| 733 | } |
| 734 | |
| 735 | return -1; |
| 736 | } |
| 737 | |
| 738 | |
| 739 | /** |
| 740 | * nes_mh_fix |
| 741 | */ |
| 742 | void nes_mh_fix(unsigned long parm) |
| 743 | { |
| 744 | unsigned long flags; |
| 745 | struct nes_device *nesdev = (struct nes_device *)parm; |
| 746 | struct nes_adapter *nesadapter = nesdev->nesadapter; |
| 747 | struct nes_vnic *nesvnic; |
| 748 | u32 used_chunks_tx; |
| 749 | u32 temp_used_chunks_tx; |
| 750 | u32 temp_last_used_chunks_tx; |
| 751 | u32 used_chunks_mask; |
| 752 | u32 mac_tx_frames_low; |
| 753 | u32 mac_tx_frames_high; |
| 754 | u32 mac_tx_pauses; |
| 755 | u32 serdes_status; |
| 756 | u32 reset_value; |
| 757 | u32 tx_control; |
| 758 | u32 tx_config; |
| 759 | u32 tx_pause_quanta; |
| 760 | u32 rx_control; |
| 761 | u32 rx_config; |
| 762 | u32 mac_exact_match; |
| 763 | u32 mpp_debug; |
| 764 | u32 i=0; |
| 765 | u32 chunks_tx_progress = 0; |
| 766 | |
| 767 | spin_lock_irqsave(&nesadapter->phy_lock, flags); |
| 768 | if ((nesadapter->mac_sw_state[0] != NES_MAC_SW_IDLE) || (nesadapter->mac_link_down[0])) { |
| 769 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); |
| 770 | goto no_mh_work; |
| 771 | } |
| 772 | nesadapter->mac_sw_state[0] = NES_MAC_SW_MH; |
| 773 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); |
| 774 | do { |
| 775 | mac_tx_frames_low = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_LOW); |
| 776 | mac_tx_frames_high = nes_read_indexed(nesdev, NES_IDX_MAC_TX_FRAMES_HIGH); |
| 777 | mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES); |
| 778 | used_chunks_tx = nes_read_indexed(nesdev, NES_IDX_USED_CHUNKS_TX); |
| 779 | nesdev->mac_pause_frames_sent += mac_tx_pauses; |
| 780 | used_chunks_mask = 0; |
| 781 | temp_used_chunks_tx = used_chunks_tx; |
| 782 | temp_last_used_chunks_tx = nesdev->last_used_chunks_tx; |
| 783 | |
| 784 | if (nesdev->netdev[0]) { |
| 785 | nesvnic = netdev_priv(nesdev->netdev[0]); |
| 786 | } else { |
| 787 | break; |
| 788 | } |
| 789 | |
| 790 | for (i=0; i<4; i++) { |
| 791 | used_chunks_mask <<= 8; |
| 792 | if (nesvnic->qp_nic_index[i] != 0xff) { |
| 793 | used_chunks_mask |= 0xff; |
| 794 | if ((temp_used_chunks_tx&0xff)<(temp_last_used_chunks_tx&0xff)) { |
| 795 | chunks_tx_progress = 1; |
| 796 | } |
| 797 | } |
| 798 | temp_used_chunks_tx >>= 8; |
| 799 | temp_last_used_chunks_tx >>= 8; |
| 800 | } |
| 801 | if ((mac_tx_frames_low) || (mac_tx_frames_high) || |
| 802 | (!(used_chunks_tx&used_chunks_mask)) || |
| 803 | (!(nesdev->last_used_chunks_tx&used_chunks_mask)) || |
| 804 | (chunks_tx_progress) ) { |
| 805 | nesdev->last_used_chunks_tx = used_chunks_tx; |
| 806 | break; |
| 807 | } |
| 808 | nesdev->last_used_chunks_tx = used_chunks_tx; |
| 809 | barrier(); |
| 810 | |
| 811 | nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000005); |
| 812 | mh_pauses_sent++; |
| 813 | mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES); |
| 814 | if (mac_tx_pauses) { |
| 815 | nesdev->mac_pause_frames_sent += mac_tx_pauses; |
| 816 | break; |
| 817 | } |
| 818 | |
| 819 | tx_control = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONTROL); |
| 820 | tx_config = nes_read_indexed(nesdev, NES_IDX_MAC_TX_CONFIG); |
| 821 | tx_pause_quanta = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA); |
| 822 | rx_control = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONTROL); |
| 823 | rx_config = nes_read_indexed(nesdev, NES_IDX_MAC_RX_CONFIG); |
| 824 | mac_exact_match = nes_read_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM); |
| 825 | mpp_debug = nes_read_indexed(nesdev, NES_IDX_MPP_DEBUG); |
| 826 | |
| 827 | /* one last ditch effort to avoid a false positive */ |
| 828 | mac_tx_pauses = nes_read_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_FRAMES); |
| 829 | if (mac_tx_pauses) { |
| 830 | nesdev->last_mac_tx_pauses = nesdev->mac_pause_frames_sent; |
| 831 | nes_debug(NES_DBG_HW, "failsafe caught slow outbound pause\n"); |
| 832 | break; |
| 833 | } |
| 834 | mh_detected++; |
| 835 | |
| 836 | nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, 0x00000000); |
| 837 | nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, 0x00000000); |
| 838 | reset_value = nes_read32(nesdev->regs+NES_SOFTWARE_RESET); |
| 839 | |
| 840 | nes_write32(nesdev->regs+NES_SOFTWARE_RESET, reset_value | 0x0000001d); |
| 841 | |
| 842 | while (((nes_read32(nesdev->regs+NES_SOFTWARE_RESET) |
| 843 | & 0x00000040) != 0x00000040) && (i++ < 5000)) { |
| 844 | /* mdelay(1); */ |
| 845 | } |
| 846 | |
| 847 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_CONTROL0, 0x00000008); |
| 848 | serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_COMMON_STATUS0); |
| 849 | |
| 850 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_EMP0, 0x000bdef7); |
| 851 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_TX_DRIVE0, 0x9ce73000); |
| 852 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_MODE0, 0x0ff00000); |
| 853 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_SIGDET0, 0x00000000); |
| 854 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_BYPASS0, 0x00000000); |
| 855 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_LOOPBACK_CONTROL0, 0x00000000); |
| 856 | if (nesadapter->OneG_Mode) { |
| 857 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0182222); |
| 858 | } else { |
| 859 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_CONTROL0, 0xf0042222); |
| 860 | } |
| 861 | serdes_status = nes_read_indexed(nesdev, NES_IDX_ETH_SERDES_RX_EQ_STATUS0); |
| 862 | nes_write_indexed(nesdev, NES_IDX_ETH_SERDES_CDR_CONTROL0, 0x000000ff); |
| 863 | |
| 864 | nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONTROL, tx_control); |
| 865 | nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config); |
| 866 | nes_write_indexed(nesdev, NES_IDX_MAC_TX_PAUSE_QUANTA, tx_pause_quanta); |
| 867 | nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONTROL, rx_control); |
| 868 | nes_write_indexed(nesdev, NES_IDX_MAC_RX_CONFIG, rx_config); |
| 869 | nes_write_indexed(nesdev, NES_IDX_MAC_EXACT_MATCH_BOTTOM, mac_exact_match); |
| 870 | nes_write_indexed(nesdev, NES_IDX_MPP_DEBUG, mpp_debug); |
| 871 | |
| 872 | } while (0); |
| 873 | |
| 874 | nesadapter->mac_sw_state[0] = NES_MAC_SW_IDLE; |
| 875 | no_mh_work: |
| 876 | nesdev->nesadapter->mh_timer.expires = jiffies + (HZ/5); |
| 877 | add_timer(&nesdev->nesadapter->mh_timer); |
| 878 | } |
| 879 | |
| 880 | /** |
| 881 | * nes_clc |
| 882 | */ |
| 883 | void nes_clc(unsigned long parm) |
| 884 | { |
| 885 | unsigned long flags; |
| 886 | struct nes_device *nesdev = (struct nes_device *)parm; |
| 887 | struct nes_adapter *nesadapter = nesdev->nesadapter; |
| 888 | |
| 889 | spin_lock_irqsave(&nesadapter->phy_lock, flags); |
| 890 | nesadapter->link_interrupt_count[0] = 0; |
| 891 | nesadapter->link_interrupt_count[1] = 0; |
| 892 | nesadapter->link_interrupt_count[2] = 0; |
| 893 | nesadapter->link_interrupt_count[3] = 0; |
| 894 | spin_unlock_irqrestore(&nesadapter->phy_lock, flags); |
| 895 | |
| 896 | nesadapter->lc_timer.expires = jiffies + 3600 * HZ; /* 1 hour */ |
| 897 | add_timer(&nesadapter->lc_timer); |
| 898 | } |
| 899 | |
| 900 | |
| 901 | /** |
| 902 | * nes_dump_mem |
| 903 | */ |
| 904 | void nes_dump_mem(unsigned int dump_debug_level, void *addr, int length) |
| 905 | { |
| 906 | char xlate[] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', |
| 907 | 'a', 'b', 'c', 'd', 'e', 'f'}; |
| 908 | char *ptr; |
| 909 | char hex_buf[80]; |
| 910 | char ascii_buf[20]; |
| 911 | int num_char; |
| 912 | int num_ascii; |
| 913 | int num_hex; |
| 914 | |
| 915 | if (!(nes_debug_level & dump_debug_level)) { |
| 916 | return; |
| 917 | } |
| 918 | |
| 919 | ptr = addr; |
| 920 | if (length > 0x100) { |
| 921 | nes_debug(dump_debug_level, "Length truncated from %x to %x\n", length, 0x100); |
| 922 | length = 0x100; |
| 923 | } |
| 924 | nes_debug(dump_debug_level, "Address=0x%p, length=0x%x (%d)\n", ptr, length, length); |
| 925 | |
| 926 | memset(ascii_buf, 0, 20); |
| 927 | memset(hex_buf, 0, 80); |
| 928 | |
| 929 | num_ascii = 0; |
| 930 | num_hex = 0; |
| 931 | for (num_char = 0; num_char < length; num_char++) { |
| 932 | if (num_ascii == 8) { |
| 933 | ascii_buf[num_ascii++] = ' '; |
| 934 | hex_buf[num_hex++] = '-'; |
| 935 | hex_buf[num_hex++] = ' '; |
| 936 | } |
| 937 | |
| 938 | if (*ptr < 0x20 || *ptr > 0x7e) |
| 939 | ascii_buf[num_ascii++] = '.'; |
| 940 | else |
| 941 | ascii_buf[num_ascii++] = *ptr; |
| 942 | hex_buf[num_hex++] = xlate[((*ptr & 0xf0) >> 4)]; |
| 943 | hex_buf[num_hex++] = xlate[*ptr & 0x0f]; |
| 944 | hex_buf[num_hex++] = ' '; |
| 945 | ptr++; |
| 946 | |
| 947 | if (num_ascii >= 17) { |
| 948 | /* output line and reset */ |
| 949 | nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf); |
| 950 | memset(ascii_buf, 0, 20); |
| 951 | memset(hex_buf, 0, 80); |
| 952 | num_ascii = 0; |
| 953 | num_hex = 0; |
| 954 | } |
| 955 | } |
| 956 | |
| 957 | /* output the rest */ |
| 958 | if (num_ascii) { |
| 959 | while (num_ascii < 17) { |
| 960 | if (num_ascii == 8) { |
| 961 | hex_buf[num_hex++] = ' '; |
| 962 | hex_buf[num_hex++] = ' '; |
| 963 | } |
| 964 | hex_buf[num_hex++] = ' '; |
| 965 | hex_buf[num_hex++] = ' '; |
| 966 | hex_buf[num_hex++] = ' '; |
| 967 | num_ascii++; |
| 968 | } |
| 969 | |
| 970 | nes_debug(dump_debug_level, " %s | %s\n", hex_buf, ascii_buf); |
| 971 | } |
| 972 | } |