Alexandre Belloni | 43216d0 | 2019-04-03 22:52:18 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 2 | /* |
| 3 | * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board |
| 4 | * |
| 5 | * Copyright (C) 2015 Atmel, |
| 6 | * 2015 Nicolas Ferre <nicolas.ferre@atmel.com> |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 7 | */ |
| 8 | /dts-v1/; |
| 9 | #include "sama5d2.dtsi" |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 10 | #include "sama5d2-pinfunc.h" |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 11 | #include <dt-bindings/mfd/atmel-flexcom.h> |
Cyrille Pitchen | ff96496 | 2015-06-23 17:51:45 +0200 | [diff] [blame] | 12 | #include <dt-bindings/gpio/gpio.h> |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 13 | #include <dt-bindings/regulator/active-semi,8945a-regulator.h> |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 14 | |
| 15 | / { |
| 16 | model = "Atmel SAMA5D2 Xplained"; |
| 17 | compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; |
| 18 | |
| 19 | chosen { |
| 20 | stdout-path = "serial0:115200n8"; |
| 21 | }; |
| 22 | |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 23 | clocks { |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 24 | slow_xtal { |
| 25 | clock-frequency = <32768>; |
| 26 | }; |
| 27 | |
| 28 | main_xtal { |
| 29 | clock-frequency = <12000000>; |
| 30 | }; |
| 31 | }; |
| 32 | |
| 33 | ahb { |
Rob Herring | 8dccafa | 2017-10-13 12:54:51 -0500 | [diff] [blame] | 34 | usb0: gadget@300000 { |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 35 | atmel,vbus-gpio = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>; |
Cyrille Pitchen | ff96496 | 2015-06-23 17:51:45 +0200 | [diff] [blame] | 36 | pinctrl-names = "default"; |
| 37 | pinctrl-0 = <&pinctrl_usba_vbus>; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 38 | status = "okay"; |
| 39 | }; |
| 40 | |
Rob Herring | 8dccafa | 2017-10-13 12:54:51 -0500 | [diff] [blame] | 41 | usb1: ohci@400000 { |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 42 | num-ports = <3>; |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 43 | atmel,vbus-gpio = <0 /* &pioA PIN_PB9 GPIO_ACTIVE_HIGH */ |
| 44 | &pioA PIN_PB10 GPIO_ACTIVE_HIGH |
Cyrille Pitchen | ff96496 | 2015-06-23 17:51:45 +0200 | [diff] [blame] | 45 | 0 |
| 46 | >; |
| 47 | pinctrl-names = "default"; |
| 48 | pinctrl-0 = <&pinctrl_usb_default>; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 49 | status = "okay"; |
| 50 | }; |
| 51 | |
Rob Herring | 8dccafa | 2017-10-13 12:54:51 -0500 | [diff] [blame] | 52 | usb2: ehci@500000 { |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 53 | status = "okay"; |
| 54 | }; |
| 55 | |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 56 | sdmmc0: sdio-host@a0000000 { |
| 57 | bus-width = <8>; |
| 58 | pinctrl-names = "default"; |
| 59 | pinctrl-0 = <&pinctrl_sdmmc0_default>; |
| 60 | non-removable; |
| 61 | mmc-ddr-1_8v; |
| 62 | status = "okay"; |
| 63 | }; |
| 64 | |
| 65 | sdmmc1: sdio-host@b0000000 { |
| 66 | bus-width = <4>; |
| 67 | pinctrl-names = "default"; |
| 68 | pinctrl-0 = <&pinctrl_sdmmc1_default>; |
| 69 | status = "okay"; /* conflict with qspi0 */ |
Romain Izard | 9b50e1a | 2017-09-05 12:18:05 +0200 | [diff] [blame] | 70 | vqmmc-supply = <&vdd_3v3_reg>; |
| 71 | vmmc-supply = <&vdd_3v3_reg>; |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 72 | }; |
| 73 | |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 74 | apb { |
| 75 | spi0: spi@f8000000 { |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 76 | pinctrl-names = "default"; |
| 77 | pinctrl-0 = <&pinctrl_spi0_default>; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 78 | status = "okay"; |
| 79 | |
| 80 | m25p80@0 { |
| 81 | compatible = "atmel,at25df321a"; |
| 82 | reg = <0>; |
| 83 | spi-max-frequency = <50000000>; |
| 84 | }; |
| 85 | }; |
| 86 | |
| 87 | macb0: ethernet@f8008000 { |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 88 | pinctrl-names = "default"; |
Nicolas Ferre | 6c482fd | 2016-01-12 15:55:12 +0100 | [diff] [blame] | 89 | pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 90 | phy-mode = "rmii"; |
| 91 | status = "okay"; |
Nicolas Ferre | 6c482fd | 2016-01-12 15:55:12 +0100 | [diff] [blame] | 92 | |
| 93 | ethernet-phy@1 { |
| 94 | reg = <0x1>; |
| 95 | interrupt-parent = <&pioA>; |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 96 | interrupts = <PIN_PC9 IRQ_TYPE_LEVEL_LOW>; |
Nicolas Ferre | 6c482fd | 2016-01-12 15:55:12 +0100 | [diff] [blame] | 97 | }; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 98 | }; |
| 99 | |
Alexandre Belloni | 0ff4104 | 2016-06-08 01:39:32 +0200 | [diff] [blame] | 100 | tcb0: timer@f800c000 { |
| 101 | timer0: timer@0 { |
| 102 | compatible = "atmel,tcb-timer"; |
| 103 | reg = <0>; |
| 104 | }; |
| 105 | |
| 106 | timer1: timer@1 { |
| 107 | compatible = "atmel,tcb-timer"; |
| 108 | reg = <1>; |
| 109 | }; |
| 110 | }; |
| 111 | |
Songjun Wu | ca6349a | 2015-12-22 17:26:05 +0800 | [diff] [blame] | 112 | pdmic@f8018000 { |
| 113 | pinctrl-names = "default"; |
| 114 | pinctrl-0 = <&pinctrl_pdmic_default>; |
| 115 | atmel,model = "PDMIC @ sama5d2_xplained"; |
| 116 | atmel,mic-min-freq = <1000000>; |
| 117 | atmel,mic-max-freq = <3246000>; |
| 118 | atmel,mic-offset = <0x0>; |
| 119 | status = "okay"; |
| 120 | }; |
| 121 | |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 122 | uart1: serial@f8020000 { |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 123 | pinctrl-names = "default"; |
| 124 | pinctrl-0 = <&pinctrl_uart1_default>; |
Alexandre Belloni | 78162d48 | 2017-01-19 23:05:39 +0100 | [diff] [blame] | 125 | atmel,use-dma-rx; |
| 126 | atmel,use-dma-tx; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 127 | status = "okay"; |
| 128 | }; |
| 129 | |
| 130 | i2c0: i2c@f8028000 { |
| 131 | dmas = <0>, <0>; |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 132 | pinctrl-names = "default"; |
| 133 | pinctrl-0 = <&pinctrl_i2c0_default>; |
Ludovic Desroches | 0a804b5 | 2015-12-03 10:53:54 +0100 | [diff] [blame] | 134 | i2c-sda-hold-time-ns = <350>; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 135 | status = "okay"; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 136 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 137 | pmic@5b { |
| 138 | compatible = "active-semi,act8945a"; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 139 | reg = <0x5b>; |
| 140 | active-semi,vsel-high; |
| 141 | status = "okay"; |
| 142 | |
| 143 | regulators { |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 144 | vdd_1v35_reg: REG_DCDC1 { |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 145 | regulator-name = "VDD_1V35"; |
| 146 | regulator-min-microvolt = <1350000>; |
| 147 | regulator-max-microvolt = <1350000>; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 148 | regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>, |
| 149 | <ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 150 | regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 151 | regulator-always-on; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 152 | |
| 153 | regulator-state-mem { |
| 154 | regulator-on-in-suspend; |
| 155 | regulator-suspend-min-microvolt=<1400000>; |
| 156 | regulator-suspend-max-microvolt=<1400000>; |
| 157 | regulator-changeable-in-suspend; |
| 158 | regulator-mode=<ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 159 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 160 | }; |
| 161 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 162 | vdd_1v2_reg: REG_DCDC2 { |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 163 | regulator-name = "VDD_1V2"; |
| 164 | regulator-min-microvolt = <1100000>; |
| 165 | regulator-max-microvolt = <1300000>; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 166 | regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>, |
| 167 | <ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 168 | regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 169 | regulator-always-on; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 170 | |
| 171 | regulator-state-mem { |
| 172 | regulator-off-in-suspend; |
| 173 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 174 | }; |
| 175 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 176 | vdd_3v3_reg: REG_DCDC3 { |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 177 | regulator-name = "VDD_3V3"; |
| 178 | regulator-min-microvolt = <3300000>; |
| 179 | regulator-max-microvolt = <3300000>; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 180 | regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>, |
| 181 | <ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 182 | regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 183 | regulator-always-on; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 184 | |
| 185 | regulator-state-mem { |
| 186 | regulator-off-in-suspend; |
| 187 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 188 | }; |
| 189 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 190 | vdd_fuse_reg: REG_LDO1 { |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 191 | regulator-name = "VDD_FUSE"; |
| 192 | regulator-min-microvolt = <2500000>; |
| 193 | regulator-max-microvolt = <2500000>; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 194 | regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>, |
| 195 | <ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 196 | regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 197 | regulator-always-on; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 198 | |
| 199 | regulator-state-mem { |
| 200 | regulator-off-in-suspend; |
| 201 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 202 | }; |
| 203 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 204 | vdd_3v3_lp_reg: REG_LDO2 { |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 205 | regulator-name = "VDD_3V3_LP"; |
| 206 | regulator-min-microvolt = <3300000>; |
| 207 | regulator-max-microvolt = <3300000>; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 208 | regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>, |
| 209 | <ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 210 | regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 211 | regulator-always-on; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 212 | |
| 213 | regulator-state-mem { |
| 214 | regulator-off-in-suspend; |
| 215 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 216 | }; |
| 217 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 218 | vdd_led_reg: REG_LDO3 { |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 219 | regulator-name = "VDD_LED"; |
| 220 | regulator-min-microvolt = <3300000>; |
| 221 | regulator-max-microvolt = <3300000>; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 222 | regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>, |
| 223 | <ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 224 | regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 225 | regulator-always-on; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 226 | |
| 227 | regulator-state-mem { |
| 228 | regulator-off-in-suspend; |
| 229 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 230 | }; |
| 231 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 232 | vdd_sdhc_1v8_reg: REG_LDO4 { |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 233 | regulator-name = "VDD_SDHC_1V8"; |
| 234 | regulator-min-microvolt = <1800000>; |
| 235 | regulator-max-microvolt = <1800000>; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 236 | regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>, |
| 237 | <ACT8945A_REGULATOR_MODE_LOWPOWER>; |
| 238 | regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>; |
Nicolas Ferre | 863c1ca | 2015-11-17 16:25:45 +0100 | [diff] [blame] | 239 | regulator-always-on; |
Boris Brezillon | 7784a6e | 2018-12-13 12:50:06 +0000 | [diff] [blame] | 240 | |
| 241 | regulator-state-mem { |
| 242 | regulator-off-in-suspend; |
| 243 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 244 | }; |
| 245 | }; |
Wenyou Yang | ff7b582 | 2017-08-15 14:24:20 +0800 | [diff] [blame] | 246 | |
| 247 | charger { |
| 248 | compatible = "active-semi,act8945a-charger"; |
| 249 | pinctrl-names = "default"; |
| 250 | pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; |
| 251 | interrupt-parent = <&pioA>; |
Hernán Gonzalez | a642693 | 2018-05-13 20:22:04 -0300 | [diff] [blame] | 252 | interrupts = <PIN_PB13 IRQ_TYPE_EDGE_RISING>; |
Wenyou Yang | ff7b582 | 2017-08-15 14:24:20 +0800 | [diff] [blame] | 253 | |
| 254 | active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>; |
| 255 | active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>; |
| 256 | active-semi,input-voltage-threshold-microvolt = <6600>; |
| 257 | active-semi,precondition-timeout = <40>; |
| 258 | active-semi,total-timeout = <3>; |
| 259 | status = "okay"; |
| 260 | }; |
Wenyou Yang | 143877e | 2015-10-14 10:59:56 +0800 | [diff] [blame] | 261 | }; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 262 | }; |
| 263 | |
Claudiu Beznea | eb0b59d | 2017-05-31 12:23:12 +0300 | [diff] [blame] | 264 | pwm0: pwm@f802c000 { |
Claudiu Beznea | 0036d85 | 2017-10-10 13:09:45 +0300 | [diff] [blame] | 265 | pinctrl-names = "default"; |
| 266 | pinctrl-0 = <&pinctrl_pwm0_pwm2_default>; |
| 267 | status = "disabled"; /* conflict with leds */ |
Claudiu Beznea | eb0b59d | 2017-05-31 12:23:12 +0300 | [diff] [blame] | 268 | }; |
| 269 | |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 270 | flx0: flexcom@f8034000 { |
| 271 | atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; |
| 272 | status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */ |
| 273 | |
| 274 | uart5: serial@200 { |
| 275 | compatible = "atmel,at91sam9260-usart"; |
| 276 | reg = <0x200 0x200>; |
| 277 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; |
Alexandre Belloni | b605578 | 2018-06-12 20:02:52 +0200 | [diff] [blame] | 278 | clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 279 | clock-names = "usart"; |
| 280 | pinctrl-names = "default"; |
| 281 | pinctrl-0 = <&pinctrl_flx0_default>; |
| 282 | atmel,fifo-size = <32>; |
| 283 | status = "okay"; |
| 284 | }; |
| 285 | }; |
| 286 | |
Nicolas Ferre | e4b9a21 | 2016-04-26 14:19:25 +0200 | [diff] [blame] | 287 | shdwc@f8048010 { |
| 288 | atmel,shdwc-debouncer = <976>; |
Alexandre Belloni | 367daf8 | 2017-02-02 19:53:17 +0100 | [diff] [blame] | 289 | atmel,wakeup-rtc-timer; |
Nicolas Ferre | e4b9a21 | 2016-04-26 14:19:25 +0200 | [diff] [blame] | 290 | |
| 291 | input@0 { |
| 292 | reg = <0>; |
| 293 | atmel,wakeup-type = "low"; |
| 294 | }; |
| 295 | }; |
| 296 | |
Wenyou Yang | 92bd7aa | 2015-11-05 15:39:30 +0800 | [diff] [blame] | 297 | watchdog@f8048040 { |
| 298 | status = "okay"; |
| 299 | }; |
| 300 | |
Cyrille Pitchen | bb837a4 | 2018-08-06 14:19:48 +0300 | [diff] [blame] | 301 | i2s0: i2s@f8050000 { |
| 302 | pinctrl-names = "default"; |
| 303 | pinctrl-0 = <&pinctrl_i2s0_default>; |
| 304 | status = "disabled"; /* conflict with can0 */ |
| 305 | }; |
| 306 | |
Wenyou Yang | bc6d5d7 | 2017-04-24 09:12:17 +0800 | [diff] [blame] | 307 | can0: can@f8054000 { |
| 308 | pinctrl-names = "default"; |
| 309 | pinctrl-0 = <&pinctrl_can0_default>; |
| 310 | status = "okay"; |
| 311 | }; |
| 312 | |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 313 | uart3: serial@fc008000 { |
Nicolas Ferre | 89a236d | 2016-12-01 11:49:49 +0100 | [diff] [blame] | 314 | atmel,use-dma-rx; |
| 315 | atmel,use-dma-tx; |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 316 | pinctrl-names = "default"; |
| 317 | pinctrl-0 = <&pinctrl_uart3_default>; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 318 | status = "okay"; |
| 319 | }; |
| 320 | |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 321 | flx4: flexcom@fc018000 { |
| 322 | atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; |
| 323 | status = "okay"; |
| 324 | |
| 325 | i2c2: i2c@600 { |
| 326 | compatible = "atmel,sama5d2-i2c"; |
| 327 | reg = <0x600 0x200>; |
| 328 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; |
| 329 | dmas = <0>, <0>; |
| 330 | dma-names = "tx", "rx"; |
| 331 | #address-cells = <1>; |
| 332 | #size-cells = <0>; |
Alexandre Belloni | b605578 | 2018-06-12 20:02:52 +0200 | [diff] [blame] | 333 | clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 334 | pinctrl-names = "default"; |
| 335 | pinctrl-0 = <&pinctrl_flx4_default>; |
| 336 | atmel,fifo-size = <16>; |
| 337 | status = "okay"; |
| 338 | }; |
| 339 | }; |
| 340 | |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 341 | i2c1: i2c@fc028000 { |
| 342 | dmas = <0>, <0>; |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 343 | pinctrl-names = "default"; |
| 344 | pinctrl-0 = <&pinctrl_i2c1_default>; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 345 | status = "okay"; |
| 346 | |
| 347 | at24@54 { |
| 348 | compatible = "atmel,24c02"; |
| 349 | reg = <0x54>; |
| 350 | pagesize = <16>; |
| 351 | }; |
| 352 | }; |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 353 | |
Ludovic Desroches | 5e72c25 | 2016-01-14 16:38:16 +0100 | [diff] [blame] | 354 | adc: adc@fc030000 { |
| 355 | vddana-supply = <&vdd_3v3_lp_reg>; |
| 356 | vref-supply = <&vdd_3v3_lp_reg>; |
| 357 | pinctrl-names = "default"; |
Eugen Hristev | 84c70b2 | 2017-06-15 16:24:54 +0300 | [diff] [blame] | 358 | pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>; |
Ludovic Desroches | 5e72c25 | 2016-01-14 16:38:16 +0100 | [diff] [blame] | 359 | status = "okay"; |
| 360 | }; |
| 361 | |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 362 | pinctrl@fc038000 { |
Ludovic Desroches | 5e72c25 | 2016-01-14 16:38:16 +0100 | [diff] [blame] | 363 | /* |
| 364 | * There is no real pinmux for ADC, if the pin |
| 365 | * is not requested by another peripheral then |
| 366 | * the muxing is done when channel is enabled. |
| 367 | * Requesting pins for ADC is GPIO is |
| 368 | * encouraged to prevent conflicts and to |
| 369 | * disable bias in order to be in the same |
| 370 | * state when the pin is not muxed to the adc. |
| 371 | */ |
| 372 | pinctrl_adc_default: adc_default { |
| 373 | pinmux = <PIN_PD23__GPIO>; |
| 374 | bias-disable; |
| 375 | }; |
| 376 | |
Wenyou Yang | bc6d5d7 | 2017-04-24 09:12:17 +0800 | [diff] [blame] | 377 | pinctrl_can0_default: can0_default { |
| 378 | pinmux = <PIN_PC10__CANTX0>, |
| 379 | <PIN_PC11__CANRX0>; |
| 380 | bias-disable; |
| 381 | }; |
| 382 | |
| 383 | pinctrl_can1_default: can1_default { |
| 384 | pinmux = <PIN_PC26__CANTX1>, |
| 385 | <PIN_PC27__CANRX1>; |
| 386 | bias-disable; |
| 387 | }; |
| 388 | |
Eugen Hristev | 84c70b2 | 2017-06-15 16:24:54 +0300 | [diff] [blame] | 389 | /* |
| 390 | * The ADTRG pin can work on any edge type. |
| 391 | * In here it's being pulled up, so need to |
| 392 | * connect it to ground to get an edge e.g. |
| 393 | * Trigger can be configured on falling, rise |
| 394 | * or any edge, and the pull-up can be changed |
| 395 | * to pull-down or left floating according to |
| 396 | * needs. |
| 397 | */ |
| 398 | pinctrl_adtrg_default: adtrg_default { |
| 399 | pinmux = <PIN_PD31__ADTRG>; |
| 400 | bias-pull-up; |
| 401 | }; |
| 402 | |
Wenyou Yang | b8bca7e | 2016-06-24 15:32:05 +0800 | [diff] [blame] | 403 | pinctrl_charger_chglev: charger_chglev { |
| 404 | pinmux = <PIN_PA12__GPIO>; |
| 405 | bias-disable; |
| 406 | }; |
| 407 | |
| 408 | pinctrl_charger_irq: charger_irq { |
| 409 | pinmux = <PIN_PB13__GPIO>; |
| 410 | bias-disable; |
| 411 | }; |
| 412 | |
| 413 | pinctrl_charger_lbo: charger_lbo { |
| 414 | pinmux = <PIN_PC8__GPIO>; |
| 415 | bias-pull-up; |
| 416 | }; |
| 417 | |
Cyrille Pitchen | b133ca7 | 2017-07-25 09:37:10 +0200 | [diff] [blame] | 418 | pinctrl_classd_default: classd_default { |
| 419 | pinmux = <PIN_PB1__CLASSD_R0>, |
| 420 | <PIN_PB2__CLASSD_R1>, |
| 421 | <PIN_PB3__CLASSD_R2>, |
| 422 | <PIN_PB4__CLASSD_R3>; |
| 423 | bias-pull-up; |
| 424 | }; |
| 425 | |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 426 | pinctrl_flx0_default: flx0_default { |
| 427 | pinmux = <PIN_PB28__FLEXCOM0_IO0>, |
| 428 | <PIN_PB29__FLEXCOM0_IO1>; |
| 429 | bias-disable; |
| 430 | }; |
| 431 | |
| 432 | pinctrl_flx4_default: flx4_default { |
| 433 | pinmux = <PIN_PD12__FLEXCOM4_IO0>, |
| 434 | <PIN_PD13__FLEXCOM4_IO1>; |
| 435 | bias-disable; |
| 436 | }; |
| 437 | |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 438 | pinctrl_i2c0_default: i2c0_default { |
| 439 | pinmux = <PIN_PD21__TWD0>, |
| 440 | <PIN_PD22__TWCK0>; |
| 441 | bias-disable; |
| 442 | }; |
| 443 | |
| 444 | pinctrl_i2c1_default: i2c1_default { |
| 445 | pinmux = <PIN_PD4__TWD1>, |
| 446 | <PIN_PD5__TWCK1>; |
| 447 | bias-disable; |
| 448 | }; |
| 449 | |
Cyrille Pitchen | bb837a4 | 2018-08-06 14:19:48 +0300 | [diff] [blame] | 450 | pinctrl_i2s0_default: i2s0_default { |
| 451 | pinmux = <PIN_PC1__I2SC0_CK>, |
| 452 | <PIN_PC2__I2SC0_MCK>, |
| 453 | <PIN_PC3__I2SC0_WS>, |
| 454 | <PIN_PC4__I2SC0_DI0>, |
| 455 | <PIN_PC5__I2SC0_DO0>; |
| 456 | bias-disable; |
| 457 | }; |
| 458 | |
| 459 | pinctrl_i2s1_default: i2s1_default { |
| 460 | pinmux = <PIN_PA15__I2SC1_CK>, |
| 461 | <PIN_PA14__I2SC1_MCK>, |
| 462 | <PIN_PA16__I2SC1_WS>, |
| 463 | <PIN_PA17__I2SC1_DI0>, |
| 464 | <PIN_PA18__I2SC1_DO0>; |
| 465 | bias-disable; |
| 466 | }; |
| 467 | |
Ludovic Desroches | c7e48d4 | 2015-06-22 10:01:20 +0200 | [diff] [blame] | 468 | pinctrl_key_gpio_default: key_gpio_default { |
| 469 | pinmux = <PIN_PB9__GPIO>; |
| 470 | bias-pull-up; |
| 471 | }; |
| 472 | |
Wenyou Yang | ed0f4b3 | 2015-06-25 18:13:49 +0800 | [diff] [blame] | 473 | pinctrl_led_gpio_default: led_gpio_default { |
| 474 | pinmux = <PIN_PB0__GPIO>, |
| 475 | <PIN_PB5__GPIO>, |
| 476 | <PIN_PB6__GPIO>; |
| 477 | bias-pull-up; |
| 478 | }; |
| 479 | |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 480 | pinctrl_macb0_default: macb0_default { |
| 481 | pinmux = <PIN_PB14__GTXCK>, |
| 482 | <PIN_PB15__GTXEN>, |
| 483 | <PIN_PB16__GRXDV>, |
| 484 | <PIN_PB17__GRXER>, |
| 485 | <PIN_PB18__GRX0>, |
| 486 | <PIN_PB19__GRX1>, |
| 487 | <PIN_PB20__GTX0>, |
| 488 | <PIN_PB21__GTX1>, |
| 489 | <PIN_PB22__GMDC>, |
| 490 | <PIN_PB23__GMDIO>; |
| 491 | bias-disable; |
| 492 | }; |
| 493 | |
Nicolas Ferre | 6c482fd | 2016-01-12 15:55:12 +0100 | [diff] [blame] | 494 | pinctrl_macb0_phy_irq: macb0_phy_irq { |
| 495 | pinmux = <PIN_PC9__GPIO>; |
Romain Izard | 34ff2dc | 2016-02-18 11:21:06 +0100 | [diff] [blame] | 496 | bias-disable; |
Nicolas Ferre | 6c482fd | 2016-01-12 15:55:12 +0100 | [diff] [blame] | 497 | }; |
| 498 | |
Songjun Wu | ca6349a | 2015-12-22 17:26:05 +0800 | [diff] [blame] | 499 | pinctrl_pdmic_default: pdmic_default { |
| 500 | pinmux = <PIN_PB26__PDMIC_DAT>, |
| 501 | <PIN_PB27__PDMIC_CLK>; |
| 502 | bias-disable; |
| 503 | }; |
| 504 | |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 505 | pinctrl_sdmmc0_default: sdmmc0_default { |
| 506 | cmd_data { |
| 507 | pinmux = <PIN_PA1__SDMMC0_CMD>, |
| 508 | <PIN_PA2__SDMMC0_DAT0>, |
| 509 | <PIN_PA3__SDMMC0_DAT1>, |
| 510 | <PIN_PA4__SDMMC0_DAT2>, |
| 511 | <PIN_PA5__SDMMC0_DAT3>, |
| 512 | <PIN_PA6__SDMMC0_DAT4>, |
| 513 | <PIN_PA7__SDMMC0_DAT5>, |
| 514 | <PIN_PA8__SDMMC0_DAT6>, |
| 515 | <PIN_PA9__SDMMC0_DAT7>; |
Nicolas Ferre | a317e51 | 2017-10-10 13:09:46 +0300 | [diff] [blame] | 516 | bias-disable; |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 517 | }; |
| 518 | |
| 519 | ck_cd_rstn_vddsel { |
| 520 | pinmux = <PIN_PA0__SDMMC0_CK>, |
| 521 | <PIN_PA10__SDMMC0_RSTN>, |
| 522 | <PIN_PA11__SDMMC0_VDDSEL>, |
| 523 | <PIN_PA13__SDMMC0_CD>; |
| 524 | bias-disable; |
| 525 | }; |
| 526 | }; |
| 527 | |
| 528 | pinctrl_sdmmc1_default: sdmmc1_default { |
| 529 | cmd_data { |
| 530 | pinmux = <PIN_PA28__SDMMC1_CMD>, |
| 531 | <PIN_PA18__SDMMC1_DAT0>, |
| 532 | <PIN_PA19__SDMMC1_DAT1>, |
| 533 | <PIN_PA20__SDMMC1_DAT2>, |
| 534 | <PIN_PA21__SDMMC1_DAT3>; |
Nicolas Ferre | a317e51 | 2017-10-10 13:09:46 +0300 | [diff] [blame] | 535 | bias-disable; |
Ludovic Desroches | 13e2a6f | 2015-10-16 15:04:45 +0200 | [diff] [blame] | 536 | }; |
| 537 | |
| 538 | conf-ck_cd { |
| 539 | pinmux = <PIN_PA22__SDMMC1_CK>, |
| 540 | <PIN_PA30__SDMMC1_CD>; |
| 541 | bias-disable; |
| 542 | }; |
| 543 | }; |
| 544 | |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 545 | pinctrl_spi0_default: spi0_default { |
| 546 | pinmux = <PIN_PA14__SPI0_SPCK>, |
| 547 | <PIN_PA15__SPI0_MOSI>, |
| 548 | <PIN_PA16__SPI0_MISO>, |
| 549 | <PIN_PA17__SPI0_NPCS0>; |
| 550 | bias-disable; |
| 551 | }; |
| 552 | |
| 553 | pinctrl_uart1_default: uart1_default { |
| 554 | pinmux = <PIN_PD2__URXD1>, |
| 555 | <PIN_PD3__UTXD1>; |
| 556 | bias-disable; |
| 557 | }; |
| 558 | |
| 559 | pinctrl_uart3_default: uart3_default { |
| 560 | pinmux = <PIN_PB11__URXD3>, |
| 561 | <PIN_PB12__UTXD3>; |
| 562 | bias-disable; |
| 563 | }; |
Cyrille Pitchen | ff96496 | 2015-06-23 17:51:45 +0200 | [diff] [blame] | 564 | |
| 565 | pinctrl_usb_default: usb_default { |
| 566 | pinmux = <PIN_PB10__GPIO>; |
| 567 | bias-disable; |
| 568 | }; |
| 569 | |
| 570 | pinctrl_usba_vbus: usba_vbus { |
| 571 | pinmux = <PIN_PA31__GPIO>; |
| 572 | bias-disable; |
| 573 | }; |
| 574 | |
Claudiu Beznea | 0036d85 | 2017-10-10 13:09:45 +0300 | [diff] [blame] | 575 | pinctrl_pwm0_pwm2_default: pwm0_pwm2_default { |
| 576 | pinmux = <PIN_PB5__PWMH2>, |
| 577 | <PIN_PB6__PWML2>; |
| 578 | bias-pull-up; |
| 579 | }; |
Ludovic Desroches | a9b672a | 2015-09-16 17:37:03 +0200 | [diff] [blame] | 580 | }; |
Wenyou Yang | bc6d5d7 | 2017-04-24 09:12:17 +0800 | [diff] [blame] | 581 | |
Cyrille Pitchen | b133ca7 | 2017-07-25 09:37:10 +0200 | [diff] [blame] | 582 | classd: classd@fc048000 { |
| 583 | pinctrl-names = "default"; |
| 584 | pinctrl-0 = <&pinctrl_classd_default>; |
| 585 | atmel,pwm-type = "diff"; |
| 586 | atmel,non-overlap-time = <10>; |
| 587 | status = "okay"; |
| 588 | }; |
| 589 | |
Cyrille Pitchen | bb837a4 | 2018-08-06 14:19:48 +0300 | [diff] [blame] | 590 | i2s1: i2s@fc04c000 { |
| 591 | pinctrl-names = "default"; |
| 592 | pinctrl-0 = <&pinctrl_i2s1_default>; |
| 593 | status = "disabled"; /* conflict with spi0, sdmmc1 */ |
| 594 | }; |
| 595 | |
Wenyou Yang | bc6d5d7 | 2017-04-24 09:12:17 +0800 | [diff] [blame] | 596 | can1: can@fc050000 { |
| 597 | pinctrl-names = "default"; |
| 598 | pinctrl-0 = <&pinctrl_can1_default>; |
| 599 | status = "okay"; |
| 600 | }; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 601 | }; |
| 602 | }; |
Ludovic Desroches | c7e48d4 | 2015-06-22 10:01:20 +0200 | [diff] [blame] | 603 | |
| 604 | gpio_keys { |
| 605 | compatible = "gpio-keys"; |
| 606 | |
| 607 | pinctrl-names = "default"; |
| 608 | pinctrl-0 = <&pinctrl_key_gpio_default>; |
| 609 | |
| 610 | bp1 { |
| 611 | label = "PB_USER"; |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 612 | gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW>; |
Ludovic Desroches | c7e48d4 | 2015-06-22 10:01:20 +0200 | [diff] [blame] | 613 | linux,code = <0x104>; |
Ludovic Desroches | be6d90b | 2017-10-10 13:09:44 +0300 | [diff] [blame] | 614 | wakeup-source; |
Ludovic Desroches | c7e48d4 | 2015-06-22 10:01:20 +0200 | [diff] [blame] | 615 | }; |
| 616 | }; |
Wenyou Yang | ed0f4b3 | 2015-06-25 18:13:49 +0800 | [diff] [blame] | 617 | |
| 618 | leds { |
| 619 | compatible = "gpio-leds"; |
| 620 | pinctrl-names = "default"; |
| 621 | pinctrl-0 = <&pinctrl_led_gpio_default>; |
Claudiu Beznea | 0036d85 | 2017-10-10 13:09:45 +0300 | [diff] [blame] | 622 | status = "okay"; /* conflict with pwm0 */ |
Wenyou Yang | ed0f4b3 | 2015-06-25 18:13:49 +0800 | [diff] [blame] | 623 | |
| 624 | red { |
| 625 | label = "red"; |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 626 | gpios = <&pioA PIN_PB6 GPIO_ACTIVE_LOW>; |
Wenyou Yang | ed0f4b3 | 2015-06-25 18:13:49 +0800 | [diff] [blame] | 627 | }; |
| 628 | |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 629 | |
Wenyou Yang | ed0f4b3 | 2015-06-25 18:13:49 +0800 | [diff] [blame] | 630 | green { |
| 631 | label = "green"; |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 632 | gpios = <&pioA PIN_PB5 GPIO_ACTIVE_LOW>; |
Wenyou Yang | ed0f4b3 | 2015-06-25 18:13:49 +0800 | [diff] [blame] | 633 | }; |
| 634 | |
| 635 | blue { |
| 636 | label = "blue"; |
Ludovic Desroches | 8f3a8a6 | 2017-07-10 08:12:05 +0200 | [diff] [blame] | 637 | gpios = <&pioA PIN_PB0 GPIO_ACTIVE_LOW>; |
Wenyou Yang | ed0f4b3 | 2015-06-25 18:13:49 +0800 | [diff] [blame] | 638 | linux,default-trigger = "heartbeat"; |
| 639 | }; |
| 640 | }; |
Nicolas Ferre | 22b5a0f | 2015-06-18 14:55:03 +0200 | [diff] [blame] | 641 | }; |