blob: 8fc1987d9063cf4b57061e1dd94718848a9d8d4f [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
John Crispind99e19c2013-04-12 06:27:37 +00002/ {
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "ralink,rt2880-soc";
6
7 cpus {
8 cpu@0 {
9 compatible = "mips,mips4KEc";
10 };
11 };
12
Antony Pavlov5214cae2016-05-23 14:39:00 +030013 cpuintc: cpuintc {
John Crispind99e19c2013-04-12 06:27:37 +000014 #address-cells = <0>;
15 #interrupt-cells = <1>;
16 interrupt-controller;
17 compatible = "mti,cpu-interrupt-controller";
18 };
19
20 palmbus@300000 {
21 compatible = "palmbus";
22 reg = <0x300000 0x200000>;
23 ranges = <0x0 0x300000 0x1FFFFF>;
24
25 #address-cells = <1>;
26 #size-cells = <1>;
27
28 sysc@0 {
29 compatible = "ralink,rt2880-sysc";
30 reg = <0x0 0x100>;
31 };
32
33 intc: intc@200 {
34 compatible = "ralink,rt2880-intc";
35 reg = <0x200 0x100>;
36
37 interrupt-controller;
38 #interrupt-cells = <1>;
39
40 interrupt-parent = <&cpuintc>;
41 interrupts = <2>;
42 };
43
44 memc@300 {
45 compatible = "ralink,rt2880-memc";
46 reg = <0x300 0x100>;
47 };
48
49 uartlite@c00 {
50 compatible = "ralink,rt2880-uart", "ns16550a";
51 reg = <0xc00 0x100>;
52
53 interrupt-parent = <&intc>;
54 interrupts = <8>;
55
56 reg-shift = <2>;
57 };
58 };
59};