Thomas Gleixner | 5b497af | 2019-05-29 07:18:09 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 2 | /* |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 3 | * Copyright(c) 2013-2016 Intel Corporation. All rights reserved. |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 4 | */ |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 5 | #include <linux/memremap.h> |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 6 | #include <linux/blkdev.h> |
| 7 | #include <linux/device.h> |
| 8 | #include <linux/genhd.h> |
| 9 | #include <linux/sizes.h> |
| 10 | #include <linux/slab.h> |
| 11 | #include <linux/fs.h> |
| 12 | #include <linux/mm.h> |
| 13 | #include "nd-core.h" |
| 14 | #include "pfn.h" |
| 15 | #include "nd.h" |
| 16 | |
| 17 | static void nd_pfn_release(struct device *dev) |
| 18 | { |
| 19 | struct nd_region *nd_region = to_nd_region(dev->parent); |
| 20 | struct nd_pfn *nd_pfn = to_nd_pfn(dev); |
| 21 | |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 22 | dev_dbg(dev, "trace\n"); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 23 | nd_detach_ndns(&nd_pfn->dev, &nd_pfn->ndns); |
| 24 | ida_simple_remove(&nd_region->pfn_ida, nd_pfn->id); |
| 25 | kfree(nd_pfn->uuid); |
| 26 | kfree(nd_pfn); |
| 27 | } |
| 28 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 29 | struct nd_pfn *to_nd_pfn(struct device *dev) |
| 30 | { |
| 31 | struct nd_pfn *nd_pfn = container_of(dev, struct nd_pfn, dev); |
| 32 | |
| 33 | WARN_ON(!is_nd_pfn(dev)); |
| 34 | return nd_pfn; |
| 35 | } |
| 36 | EXPORT_SYMBOL(to_nd_pfn); |
| 37 | |
| 38 | static ssize_t mode_show(struct device *dev, |
| 39 | struct device_attribute *attr, char *buf) |
| 40 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 41 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 42 | |
| 43 | switch (nd_pfn->mode) { |
| 44 | case PFN_MODE_RAM: |
| 45 | return sprintf(buf, "ram\n"); |
| 46 | case PFN_MODE_PMEM: |
| 47 | return sprintf(buf, "pmem\n"); |
| 48 | default: |
| 49 | return sprintf(buf, "none\n"); |
| 50 | } |
| 51 | } |
| 52 | |
| 53 | static ssize_t mode_store(struct device *dev, |
| 54 | struct device_attribute *attr, const char *buf, size_t len) |
| 55 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 56 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 57 | ssize_t rc = 0; |
| 58 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 59 | nd_device_lock(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 60 | nvdimm_bus_lock(dev); |
| 61 | if (dev->driver) |
| 62 | rc = -EBUSY; |
| 63 | else { |
| 64 | size_t n = len - 1; |
| 65 | |
| 66 | if (strncmp(buf, "pmem\n", n) == 0 |
| 67 | || strncmp(buf, "pmem", n) == 0) { |
Dan Williams | d2c0f04 | 2016-01-15 16:56:26 -0800 | [diff] [blame] | 68 | nd_pfn->mode = PFN_MODE_PMEM; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 69 | } else if (strncmp(buf, "ram\n", n) == 0 |
| 70 | || strncmp(buf, "ram", n) == 0) |
| 71 | nd_pfn->mode = PFN_MODE_RAM; |
| 72 | else if (strncmp(buf, "none\n", n) == 0 |
| 73 | || strncmp(buf, "none", n) == 0) |
| 74 | nd_pfn->mode = PFN_MODE_NONE; |
| 75 | else |
| 76 | rc = -EINVAL; |
| 77 | } |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 78 | dev_dbg(dev, "result: %zd wrote: %s%s", rc, buf, |
| 79 | buf[len - 1] == '\n' ? "" : "\n"); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 80 | nvdimm_bus_unlock(dev); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 81 | nd_device_unlock(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 82 | |
| 83 | return rc ? rc : len; |
| 84 | } |
| 85 | static DEVICE_ATTR_RW(mode); |
| 86 | |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 87 | static ssize_t align_show(struct device *dev, |
| 88 | struct device_attribute *attr, char *buf) |
| 89 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 90 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 91 | |
Dan Williams | af7d9f0 | 2016-12-10 08:12:05 -0800 | [diff] [blame] | 92 | return sprintf(buf, "%ld\n", nd_pfn->align); |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 93 | } |
| 94 | |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 95 | static unsigned long *nd_pfn_supported_alignments(unsigned long *alignments) |
Oliver O'Halloran | 1fdadbe | 2017-06-27 19:56:12 +1000 | [diff] [blame] | 96 | { |
Oliver O'Halloran | 1fdadbe | 2017-06-27 19:56:12 +1000 | [diff] [blame] | 97 | |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 98 | alignments[0] = PAGE_SIZE; |
Oliver O'Halloran | 1fdadbe | 2017-06-27 19:56:12 +1000 | [diff] [blame] | 99 | |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 100 | if (has_transparent_hugepage()) { |
| 101 | alignments[1] = HPAGE_PMD_SIZE; |
| 102 | if (IS_ENABLED(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)) |
| 103 | alignments[2] = HPAGE_PUD_SIZE; |
| 104 | } |
| 105 | |
| 106 | return alignments; |
| 107 | } |
| 108 | |
| 109 | /* |
| 110 | * Use pmd mapping if supported as default alignment |
| 111 | */ |
| 112 | static unsigned long nd_pfn_default_alignment(void) |
| 113 | { |
| 114 | |
| 115 | if (has_transparent_hugepage()) |
| 116 | return HPAGE_PMD_SIZE; |
| 117 | return PAGE_SIZE; |
Oliver O'Halloran | 1fdadbe | 2017-06-27 19:56:12 +1000 | [diff] [blame] | 118 | } |
| 119 | |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 120 | static ssize_t align_store(struct device *dev, |
| 121 | struct device_attribute *attr, const char *buf, size_t len) |
| 122 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 123 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 124 | unsigned long aligns[MAX_NVDIMM_ALIGN] = { [0] = 0, }; |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 125 | ssize_t rc; |
| 126 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 127 | nd_device_lock(dev); |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 128 | nvdimm_bus_lock(dev); |
Dan Williams | f13d2b6 | 2017-08-11 17:54:48 -0700 | [diff] [blame] | 129 | rc = nd_size_select_store(dev, buf, &nd_pfn->align, |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 130 | nd_pfn_supported_alignments(aligns)); |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 131 | dev_dbg(dev, "result: %zd wrote: %s%s", rc, buf, |
| 132 | buf[len - 1] == '\n' ? "" : "\n"); |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 133 | nvdimm_bus_unlock(dev); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 134 | nd_device_unlock(dev); |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 135 | |
| 136 | return rc ? rc : len; |
| 137 | } |
| 138 | static DEVICE_ATTR_RW(align); |
| 139 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 140 | static ssize_t uuid_show(struct device *dev, |
| 141 | struct device_attribute *attr, char *buf) |
| 142 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 143 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 144 | |
| 145 | if (nd_pfn->uuid) |
| 146 | return sprintf(buf, "%pUb\n", nd_pfn->uuid); |
| 147 | return sprintf(buf, "\n"); |
| 148 | } |
| 149 | |
| 150 | static ssize_t uuid_store(struct device *dev, |
| 151 | struct device_attribute *attr, const char *buf, size_t len) |
| 152 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 153 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 154 | ssize_t rc; |
| 155 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 156 | nd_device_lock(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 157 | rc = nd_uuid_store(dev, &nd_pfn->uuid, buf, len); |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 158 | dev_dbg(dev, "result: %zd wrote: %s%s", rc, buf, |
| 159 | buf[len - 1] == '\n' ? "" : "\n"); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 160 | nd_device_unlock(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 161 | |
| 162 | return rc ? rc : len; |
| 163 | } |
| 164 | static DEVICE_ATTR_RW(uuid); |
| 165 | |
| 166 | static ssize_t namespace_show(struct device *dev, |
| 167 | struct device_attribute *attr, char *buf) |
| 168 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 169 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 170 | ssize_t rc; |
| 171 | |
| 172 | nvdimm_bus_lock(dev); |
| 173 | rc = sprintf(buf, "%s\n", nd_pfn->ndns |
| 174 | ? dev_name(&nd_pfn->ndns->dev) : ""); |
| 175 | nvdimm_bus_unlock(dev); |
| 176 | return rc; |
| 177 | } |
| 178 | |
| 179 | static ssize_t namespace_store(struct device *dev, |
| 180 | struct device_attribute *attr, const char *buf, size_t len) |
| 181 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 182 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 183 | ssize_t rc; |
| 184 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 185 | nd_device_lock(dev); |
Axel Lin | 4ca8b57a | 2015-09-16 21:25:38 +0800 | [diff] [blame] | 186 | nvdimm_bus_lock(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 187 | rc = nd_namespace_store(dev, &nd_pfn->ndns, buf, len); |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 188 | dev_dbg(dev, "result: %zd wrote: %s%s", rc, buf, |
| 189 | buf[len - 1] == '\n' ? "" : "\n"); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 190 | nvdimm_bus_unlock(dev); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 191 | nd_device_unlock(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 192 | |
| 193 | return rc; |
| 194 | } |
| 195 | static DEVICE_ATTR_RW(namespace); |
| 196 | |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 197 | static ssize_t resource_show(struct device *dev, |
| 198 | struct device_attribute *attr, char *buf) |
| 199 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 200 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 201 | ssize_t rc; |
| 202 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 203 | nd_device_lock(dev); |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 204 | if (dev->driver) { |
| 205 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 206 | u64 offset = __le64_to_cpu(pfn_sb->dataoff); |
| 207 | struct nd_namespace_common *ndns = nd_pfn->ndns; |
| 208 | u32 start_pad = __le32_to_cpu(pfn_sb->start_pad); |
| 209 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
| 210 | |
| 211 | rc = sprintf(buf, "%#llx\n", (unsigned long long) nsio->res.start |
| 212 | + start_pad + offset); |
| 213 | } else { |
| 214 | /* no address to convey if the pfn instance is disabled */ |
| 215 | rc = -ENXIO; |
| 216 | } |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 217 | nd_device_unlock(dev); |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 218 | |
| 219 | return rc; |
| 220 | } |
Dan Williams | bfd2e91 | 2019-11-12 17:13:14 -0800 | [diff] [blame] | 221 | static DEVICE_ATTR(resource, 0400, resource_show, NULL); |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 222 | |
| 223 | static ssize_t size_show(struct device *dev, |
| 224 | struct device_attribute *attr, char *buf) |
| 225 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 226 | struct nd_pfn *nd_pfn = to_nd_pfn_safe(dev); |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 227 | ssize_t rc; |
| 228 | |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 229 | nd_device_lock(dev); |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 230 | if (dev->driver) { |
| 231 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 232 | u64 offset = __le64_to_cpu(pfn_sb->dataoff); |
| 233 | struct nd_namespace_common *ndns = nd_pfn->ndns; |
| 234 | u32 start_pad = __le32_to_cpu(pfn_sb->start_pad); |
| 235 | u32 end_trunc = __le32_to_cpu(pfn_sb->end_trunc); |
| 236 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
| 237 | |
| 238 | rc = sprintf(buf, "%llu\n", (unsigned long long) |
| 239 | resource_size(&nsio->res) - start_pad |
| 240 | - end_trunc - offset); |
| 241 | } else { |
| 242 | /* no size to convey if the pfn instance is disabled */ |
| 243 | rc = -ENXIO; |
| 244 | } |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 245 | nd_device_unlock(dev); |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 246 | |
| 247 | return rc; |
| 248 | } |
| 249 | static DEVICE_ATTR_RO(size); |
| 250 | |
Oliver O'Halloran | 1fdadbe | 2017-06-27 19:56:12 +1000 | [diff] [blame] | 251 | static ssize_t supported_alignments_show(struct device *dev, |
| 252 | struct device_attribute *attr, char *buf) |
| 253 | { |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 254 | unsigned long aligns[MAX_NVDIMM_ALIGN] = { [0] = 0, }; |
| 255 | |
| 256 | return nd_size_select_show(0, |
| 257 | nd_pfn_supported_alignments(aligns), buf); |
Oliver O'Halloran | 1fdadbe | 2017-06-27 19:56:12 +1000 | [diff] [blame] | 258 | } |
| 259 | static DEVICE_ATTR_RO(supported_alignments); |
| 260 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 261 | static struct attribute *nd_pfn_attributes[] = { |
| 262 | &dev_attr_mode.attr, |
| 263 | &dev_attr_namespace.attr, |
| 264 | &dev_attr_uuid.attr, |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 265 | &dev_attr_align.attr, |
Dan Williams | f6ed58c | 2016-03-03 09:46:04 -0800 | [diff] [blame] | 266 | &dev_attr_resource.attr, |
| 267 | &dev_attr_size.attr, |
Oliver O'Halloran | 1fdadbe | 2017-06-27 19:56:12 +1000 | [diff] [blame] | 268 | &dev_attr_supported_alignments.attr, |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 269 | NULL, |
| 270 | }; |
| 271 | |
Dan Williams | 78c81cc | 2019-11-06 19:56:41 -0800 | [diff] [blame] | 272 | static struct attribute_group nd_pfn_attribute_group = { |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 273 | .attrs = nd_pfn_attributes, |
| 274 | }; |
| 275 | |
Dan Williams | 78c81cc | 2019-11-06 19:56:41 -0800 | [diff] [blame] | 276 | const struct attribute_group *nd_pfn_attribute_groups[] = { |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 277 | &nd_pfn_attribute_group, |
| 278 | &nd_device_attribute_group, |
| 279 | &nd_numa_attribute_group, |
| 280 | NULL, |
| 281 | }; |
| 282 | |
Dan Williams | 78c81cc | 2019-11-06 19:56:41 -0800 | [diff] [blame] | 283 | static const struct device_type nd_pfn_device_type = { |
| 284 | .name = "nd_pfn", |
| 285 | .release = nd_pfn_release, |
| 286 | .groups = nd_pfn_attribute_groups, |
| 287 | }; |
| 288 | |
| 289 | bool is_nd_pfn(struct device *dev) |
| 290 | { |
| 291 | return dev ? dev->type == &nd_pfn_device_type : false; |
| 292 | } |
| 293 | EXPORT_SYMBOL(is_nd_pfn); |
| 294 | |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 295 | struct device *nd_pfn_devinit(struct nd_pfn *nd_pfn, |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 296 | struct nd_namespace_common *ndns) |
| 297 | { |
Colin Ian King | 0cbfeef | 2018-02-05 14:08:52 +0000 | [diff] [blame] | 298 | struct device *dev; |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 299 | |
| 300 | if (!nd_pfn) |
| 301 | return NULL; |
| 302 | |
| 303 | nd_pfn->mode = PFN_MODE_NONE; |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 304 | nd_pfn->align = nd_pfn_default_alignment(); |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 305 | dev = &nd_pfn->dev; |
| 306 | device_initialize(&nd_pfn->dev); |
| 307 | if (ndns && !__nd_attach_ndns(&nd_pfn->dev, ndns, &nd_pfn->ndns)) { |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 308 | dev_dbg(&ndns->dev, "failed, already claimed by %s\n", |
| 309 | dev_name(ndns->claim)); |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 310 | put_device(dev); |
| 311 | return NULL; |
| 312 | } |
| 313 | return dev; |
| 314 | } |
| 315 | |
| 316 | static struct nd_pfn *nd_pfn_alloc(struct nd_region *nd_region) |
| 317 | { |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 318 | struct nd_pfn *nd_pfn; |
| 319 | struct device *dev; |
| 320 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 321 | nd_pfn = kzalloc(sizeof(*nd_pfn), GFP_KERNEL); |
| 322 | if (!nd_pfn) |
| 323 | return NULL; |
| 324 | |
| 325 | nd_pfn->id = ida_simple_get(&nd_region->pfn_ida, 0, 0, GFP_KERNEL); |
| 326 | if (nd_pfn->id < 0) { |
| 327 | kfree(nd_pfn); |
| 328 | return NULL; |
| 329 | } |
| 330 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 331 | dev = &nd_pfn->dev; |
| 332 | dev_set_name(dev, "pfn%d.%d", nd_region->id, nd_pfn->id); |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 333 | dev->type = &nd_pfn_device_type; |
| 334 | dev->parent = &nd_region->dev; |
| 335 | |
| 336 | return nd_pfn; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | struct device *nd_pfn_create(struct nd_region *nd_region) |
| 340 | { |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 341 | struct nd_pfn *nd_pfn; |
| 342 | struct device *dev; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 343 | |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 344 | if (!is_memory(&nd_region->dev)) |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 345 | return NULL; |
| 346 | |
| 347 | nd_pfn = nd_pfn_alloc(nd_region); |
| 348 | dev = nd_pfn_devinit(nd_pfn, NULL); |
| 349 | |
| 350 | __nd_device_register(dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 351 | return dev; |
| 352 | } |
| 353 | |
Vishal Verma | 48af2f7 | 2018-09-18 17:48:31 -0600 | [diff] [blame] | 354 | /* |
| 355 | * nd_pfn_clear_memmap_errors() clears any errors in the volatile memmap |
| 356 | * space associated with the namespace. If the memmap is set to DRAM, then |
| 357 | * this is a no-op. Since the memmap area is freshly initialized during |
| 358 | * probe, we have an opportunity to clear any badblocks in this area. |
| 359 | */ |
| 360 | static int nd_pfn_clear_memmap_errors(struct nd_pfn *nd_pfn) |
| 361 | { |
| 362 | struct nd_region *nd_region = to_nd_region(nd_pfn->dev.parent); |
| 363 | struct nd_namespace_common *ndns = nd_pfn->ndns; |
| 364 | void *zero_page = page_address(ZERO_PAGE(0)); |
| 365 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 366 | int num_bad, meta_num, rc, bb_present; |
| 367 | sector_t first_bad, meta_start; |
| 368 | struct nd_namespace_io *nsio; |
| 369 | |
| 370 | if (nd_pfn->mode != PFN_MODE_PMEM) |
| 371 | return 0; |
| 372 | |
| 373 | nsio = to_nd_namespace_io(&ndns->dev); |
| 374 | meta_start = (SZ_4K + sizeof(*pfn_sb)) >> 9; |
| 375 | meta_num = (le64_to_cpu(pfn_sb->dataoff) >> 9) - meta_start; |
| 376 | |
Aneesh Kumar K.V | 8f4b01f | 2019-10-31 16:27:41 +0530 | [diff] [blame] | 377 | /* |
| 378 | * re-enable the namespace with correct size so that we can access |
| 379 | * the device memmap area. |
| 380 | */ |
| 381 | devm_namespace_disable(&nd_pfn->dev, ndns); |
| 382 | rc = devm_namespace_enable(&nd_pfn->dev, ndns, le64_to_cpu(pfn_sb->dataoff)); |
| 383 | if (rc) |
| 384 | return rc; |
| 385 | |
Vishal Verma | 48af2f7 | 2018-09-18 17:48:31 -0600 | [diff] [blame] | 386 | do { |
| 387 | unsigned long zero_len; |
| 388 | u64 nsoff; |
| 389 | |
| 390 | bb_present = badblocks_check(&nd_region->bb, meta_start, |
| 391 | meta_num, &first_bad, &num_bad); |
| 392 | if (bb_present) { |
Christoph Hellwig | 72deb45 | 2019-04-05 18:08:59 +0200 | [diff] [blame] | 393 | dev_dbg(&nd_pfn->dev, "meta: %x badblocks at %llx\n", |
Vishal Verma | 48af2f7 | 2018-09-18 17:48:31 -0600 | [diff] [blame] | 394 | num_bad, first_bad); |
| 395 | nsoff = ALIGN_DOWN((nd_region->ndr_start |
| 396 | + (first_bad << 9)) - nsio->res.start, |
| 397 | PAGE_SIZE); |
| 398 | zero_len = ALIGN(num_bad << 9, PAGE_SIZE); |
| 399 | while (zero_len) { |
| 400 | unsigned long chunk = min(zero_len, PAGE_SIZE); |
| 401 | |
| 402 | rc = nvdimm_write_bytes(ndns, nsoff, zero_page, |
| 403 | chunk, 0); |
| 404 | if (rc) |
| 405 | break; |
| 406 | |
| 407 | zero_len -= chunk; |
| 408 | nsoff += chunk; |
| 409 | } |
| 410 | if (rc) { |
| 411 | dev_err(&nd_pfn->dev, |
Christoph Hellwig | 72deb45 | 2019-04-05 18:08:59 +0200 | [diff] [blame] | 412 | "error clearing %x badblocks at %llx\n", |
Vishal Verma | 48af2f7 | 2018-09-18 17:48:31 -0600 | [diff] [blame] | 413 | num_bad, first_bad); |
| 414 | return rc; |
| 415 | } |
| 416 | } |
| 417 | } while (bb_present); |
| 418 | |
| 419 | return 0; |
| 420 | } |
| 421 | |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 422 | static bool nd_supported_alignment(unsigned long align) |
| 423 | { |
| 424 | int i; |
| 425 | unsigned long supported[MAX_NVDIMM_ALIGN] = { [0] = 0, }; |
| 426 | |
| 427 | if (align == 0) |
| 428 | return false; |
| 429 | |
| 430 | nd_pfn_supported_alignments(supported); |
| 431 | for (i = 0; supported[i]; i++) |
| 432 | if (align == supported[i]) |
| 433 | return true; |
| 434 | return false; |
| 435 | } |
| 436 | |
Dan Williams | 7e3e888 | 2019-07-18 15:58:36 -0700 | [diff] [blame] | 437 | /** |
| 438 | * nd_pfn_validate - read and validate info-block |
| 439 | * @nd_pfn: fsdax namespace runtime state / properties |
| 440 | * @sig: 'devdax' or 'fsdax' signature |
| 441 | * |
| 442 | * Upon return the info-block buffer contents (->pfn_sb) are |
| 443 | * indeterminate when validation fails, and a coherent info-block |
| 444 | * otherwise. |
| 445 | */ |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 446 | int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig) |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 447 | { |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 448 | u64 checksum, offset; |
Dan Williams | 6acd7d5 | 2020-02-27 21:39:23 -0800 | [diff] [blame] | 449 | struct resource *res; |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 450 | enum nd_pfn_mode mode; |
Dan Williams | a34d5e8 | 2015-12-12 16:09:14 -0800 | [diff] [blame] | 451 | struct nd_namespace_io *nsio; |
Dan Williams | 19deaa2 | 2017-12-19 15:07:10 -0800 | [diff] [blame] | 452 | unsigned long align, start_pad; |
Dan Williams | a34d5e8 | 2015-12-12 16:09:14 -0800 | [diff] [blame] | 453 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 454 | struct nd_namespace_common *ndns = nd_pfn->ndns; |
| 455 | const u8 *parent_uuid = nd_dev_to_uuid(&ndns->dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 456 | |
| 457 | if (!pfn_sb || !ndns) |
| 458 | return -ENODEV; |
| 459 | |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 460 | if (!is_memory(nd_pfn->dev.parent)) |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 461 | return -ENODEV; |
| 462 | |
Vishal Verma | 3ae3d67 | 2017-05-10 15:01:30 -0600 | [diff] [blame] | 463 | if (nvdimm_read_bytes(ndns, SZ_4K, pfn_sb, sizeof(*pfn_sb), 0)) |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 464 | return -ENXIO; |
| 465 | |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 466 | if (memcmp(pfn_sb->signature, sig, PFN_SIG_LEN) != 0) |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 467 | return -ENODEV; |
| 468 | |
| 469 | checksum = le64_to_cpu(pfn_sb->checksum); |
| 470 | pfn_sb->checksum = 0; |
| 471 | if (checksum != nd_sb_checksum((struct nd_gen_sb *) pfn_sb)) |
| 472 | return -ENODEV; |
| 473 | pfn_sb->checksum = cpu_to_le64(checksum); |
| 474 | |
Dan Williams | a34d5e8 | 2015-12-12 16:09:14 -0800 | [diff] [blame] | 475 | if (memcmp(pfn_sb->parent_uuid, parent_uuid, 16) != 0) |
| 476 | return -ENODEV; |
| 477 | |
Dan Williams | cfe30b8 | 2016-03-03 09:38:00 -0800 | [diff] [blame] | 478 | if (__le16_to_cpu(pfn_sb->version_minor) < 1) { |
| 479 | pfn_sb->start_pad = 0; |
| 480 | pfn_sb->end_trunc = 0; |
| 481 | } |
| 482 | |
Dan Williams | 45a0dac | 2016-03-31 15:41:18 -0700 | [diff] [blame] | 483 | if (__le16_to_cpu(pfn_sb->version_minor) < 2) |
| 484 | pfn_sb->align = 0; |
| 485 | |
Aneesh Kumar K.V | edbb52c | 2019-09-05 21:16:00 +0530 | [diff] [blame] | 486 | if (__le16_to_cpu(pfn_sb->version_minor) < 4) { |
| 487 | pfn_sb->page_struct_size = cpu_to_le16(64); |
| 488 | pfn_sb->page_size = cpu_to_le32(PAGE_SIZE); |
| 489 | } |
| 490 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 491 | switch (le32_to_cpu(pfn_sb->mode)) { |
| 492 | case PFN_MODE_RAM: |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 493 | case PFN_MODE_PMEM: |
Dan Williams | 45eb570 | 2016-01-29 17:42:51 -0800 | [diff] [blame] | 494 | break; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 495 | default: |
| 496 | return -ENXIO; |
| 497 | } |
| 498 | |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 499 | align = le32_to_cpu(pfn_sb->align); |
| 500 | offset = le64_to_cpu(pfn_sb->dataoff); |
Dan Williams | 19deaa2 | 2017-12-19 15:07:10 -0800 | [diff] [blame] | 501 | start_pad = le32_to_cpu(pfn_sb->start_pad); |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 502 | if (align == 0) |
| 503 | align = 1UL << ilog2(offset); |
| 504 | mode = le32_to_cpu(pfn_sb->mode); |
| 505 | |
Aneesh Kumar K.V | edbb52c | 2019-09-05 21:16:00 +0530 | [diff] [blame] | 506 | if ((le32_to_cpu(pfn_sb->page_size) > PAGE_SIZE) && |
| 507 | (mode == PFN_MODE_PMEM)) { |
| 508 | dev_err(&nd_pfn->dev, |
| 509 | "init failed, page size mismatch %d\n", |
| 510 | le32_to_cpu(pfn_sb->page_size)); |
| 511 | return -EOPNOTSUPP; |
| 512 | } |
| 513 | |
| 514 | if ((le16_to_cpu(pfn_sb->page_struct_size) < sizeof(struct page)) && |
| 515 | (mode == PFN_MODE_PMEM)) { |
| 516 | dev_err(&nd_pfn->dev, |
| 517 | "init failed, struct page size mismatch %d\n", |
| 518 | le16_to_cpu(pfn_sb->page_struct_size)); |
| 519 | return -EOPNOTSUPP; |
| 520 | } |
| 521 | |
Aneesh Kumar K.V | f537669 | 2019-09-05 21:16:03 +0530 | [diff] [blame] | 522 | /* |
| 523 | * Check whether the we support the alignment. For Dax if the |
| 524 | * superblock alignment is not matching, we won't initialize |
| 525 | * the device. |
| 526 | */ |
| 527 | if (!nd_supported_alignment(align) && |
| 528 | !memcmp(pfn_sb->signature, DAX_SIG, PFN_SIG_LEN)) { |
| 529 | dev_err(&nd_pfn->dev, "init failed, alignment mismatch: " |
| 530 | "%ld:%ld\n", nd_pfn->align, align); |
| 531 | return -EOPNOTSUPP; |
| 532 | } |
| 533 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 534 | if (!nd_pfn->uuid) { |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 535 | /* |
| 536 | * When probing a namepace via nd_pfn_probe() the uuid |
| 537 | * is NULL (see: nd_pfn_devinit()) we init settings from |
| 538 | * pfn_sb |
| 539 | */ |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 540 | nd_pfn->uuid = kmemdup(pfn_sb->uuid, 16, GFP_KERNEL); |
| 541 | if (!nd_pfn->uuid) |
| 542 | return -ENOMEM; |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 543 | nd_pfn->align = align; |
| 544 | nd_pfn->mode = mode; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 545 | } else { |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 546 | /* |
| 547 | * When probing a pfn / dax instance we validate the |
| 548 | * live settings against the pfn_sb |
| 549 | */ |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 550 | if (memcmp(nd_pfn->uuid, pfn_sb->uuid, 16) != 0) |
Dan Williams | e567056 | 2016-04-07 19:59:27 -0700 | [diff] [blame] | 551 | return -ENODEV; |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 552 | |
| 553 | /* |
| 554 | * If the uuid validates, but other settings mismatch |
| 555 | * return EINVAL because userspace has managed to change |
| 556 | * the configuration without specifying new |
| 557 | * identification. |
| 558 | */ |
| 559 | if (nd_pfn->align != align || nd_pfn->mode != mode) { |
| 560 | dev_err(&nd_pfn->dev, |
| 561 | "init failed, settings mismatch\n"); |
| 562 | dev_dbg(&nd_pfn->dev, "align: %lx:%lx mode: %d:%d\n", |
| 563 | nd_pfn->align, align, nd_pfn->mode, |
| 564 | mode); |
Dan Williams | b2ba7e9 | 2020-02-27 21:31:45 -0800 | [diff] [blame] | 565 | return -EOPNOTSUPP; |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 566 | } |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 567 | } |
| 568 | |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 569 | if (align > nvdimm_namespace_capacity(ndns)) { |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 570 | dev_err(&nd_pfn->dev, "alignment: %lx exceeds capacity %llx\n", |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 571 | align, nvdimm_namespace_capacity(ndns)); |
Dan Williams | b2ba7e9 | 2020-02-27 21:31:45 -0800 | [diff] [blame] | 572 | return -EOPNOTSUPP; |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 573 | } |
| 574 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 575 | /* |
| 576 | * These warnings are verbose because they can only trigger in |
| 577 | * the case where the physical address alignment of the |
| 578 | * namespace has changed since the pfn superblock was |
| 579 | * established. |
| 580 | */ |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 581 | nsio = to_nd_namespace_io(&ndns->dev); |
Dan Williams | 6acd7d5 | 2020-02-27 21:39:23 -0800 | [diff] [blame] | 582 | res = &nsio->res; |
| 583 | if (offset >= resource_size(res)) { |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 584 | dev_err(&nd_pfn->dev, "pfn array size exceeds capacity of %s\n", |
| 585 | dev_name(&ndns->dev)); |
Dan Williams | b2ba7e9 | 2020-02-27 21:31:45 -0800 | [diff] [blame] | 586 | return -EOPNOTSUPP; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 587 | } |
| 588 | |
Dan Williams | 6acd7d5 | 2020-02-27 21:39:23 -0800 | [diff] [blame] | 589 | if ((align && !IS_ALIGNED(res->start + offset + start_pad, align)) |
Dan Williams | 5e24c9f | 2016-05-21 11:01:41 -0700 | [diff] [blame] | 590 | || !IS_ALIGNED(offset, PAGE_SIZE)) { |
Dan Williams | 1ee6667 | 2016-06-23 17:50:39 -0700 | [diff] [blame] | 591 | dev_err(&nd_pfn->dev, |
| 592 | "bad offset: %#llx dax disabled align: %#lx\n", |
| 593 | offset, align); |
Dan Williams | b2ba7e9 | 2020-02-27 21:31:45 -0800 | [diff] [blame] | 594 | return -EOPNOTSUPP; |
Dan Williams | 315c562 | 2015-12-10 14:45:23 -0800 | [diff] [blame] | 595 | } |
| 596 | |
Dan Williams | 6acd7d5 | 2020-02-27 21:39:23 -0800 | [diff] [blame] | 597 | if (!IS_ALIGNED(res->start + le32_to_cpu(pfn_sb->start_pad), |
| 598 | memremap_compat_align())) { |
| 599 | dev_err(&nd_pfn->dev, "resource start misaligned\n"); |
| 600 | return -EOPNOTSUPP; |
| 601 | } |
| 602 | |
| 603 | if (!IS_ALIGNED(res->end + 1 - le32_to_cpu(pfn_sb->end_trunc), |
| 604 | memremap_compat_align())) { |
| 605 | dev_err(&nd_pfn->dev, "resource end misaligned\n"); |
| 606 | return -EOPNOTSUPP; |
| 607 | } |
| 608 | |
Aneesh Kumar K.V | c1f45d8 | 2019-11-01 08:57:28 +0530 | [diff] [blame] | 609 | return 0; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 610 | } |
Dan Williams | 32ab0a3f | 2015-08-01 02:16:37 -0400 | [diff] [blame] | 611 | EXPORT_SYMBOL(nd_pfn_validate); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 612 | |
Dan Williams | 200c79d | 2016-03-22 00:22:16 -0700 | [diff] [blame] | 613 | int nd_pfn_probe(struct device *dev, struct nd_namespace_common *ndns) |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 614 | { |
| 615 | int rc; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 616 | struct nd_pfn *nd_pfn; |
Dan Williams | bd03294 | 2016-03-17 18:16:15 -0700 | [diff] [blame] | 617 | struct device *pfn_dev; |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 618 | struct nd_pfn_sb *pfn_sb; |
| 619 | struct nd_region *nd_region = to_nd_region(ndns->dev.parent); |
| 620 | |
| 621 | if (ndns->force_raw) |
| 622 | return -ENODEV; |
| 623 | |
Dan Williams | b3fde74 | 2017-06-04 10:18:39 +0900 | [diff] [blame] | 624 | switch (ndns->claim_class) { |
| 625 | case NVDIMM_CCLASS_NONE: |
| 626 | case NVDIMM_CCLASS_PFN: |
| 627 | break; |
| 628 | default: |
| 629 | return -ENODEV; |
| 630 | } |
| 631 | |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 632 | nvdimm_bus_lock(&ndns->dev); |
Dan Williams | cd03412 | 2016-03-11 10:15:36 -0800 | [diff] [blame] | 633 | nd_pfn = nd_pfn_alloc(nd_region); |
| 634 | pfn_dev = nd_pfn_devinit(nd_pfn, ndns); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 635 | nvdimm_bus_unlock(&ndns->dev); |
Dan Williams | bd03294 | 2016-03-17 18:16:15 -0700 | [diff] [blame] | 636 | if (!pfn_dev) |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 637 | return -ENOMEM; |
Dan Williams | 7e3e888 | 2019-07-18 15:58:36 -0700 | [diff] [blame] | 638 | pfn_sb = devm_kmalloc(dev, sizeof(*pfn_sb), GFP_KERNEL); |
Dan Williams | bd03294 | 2016-03-17 18:16:15 -0700 | [diff] [blame] | 639 | nd_pfn = to_nd_pfn(pfn_dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 640 | nd_pfn->pfn_sb = pfn_sb; |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 641 | rc = nd_pfn_validate(nd_pfn, PFN_SIG); |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 642 | dev_dbg(dev, "pfn: %s\n", rc == 0 ? dev_name(pfn_dev) : "<none>"); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 643 | if (rc < 0) { |
Dan Williams | 452bae0 | 2017-04-28 22:05:14 -0700 | [diff] [blame] | 644 | nd_detach_ndns(pfn_dev, &nd_pfn->ndns); |
Dan Williams | bd03294 | 2016-03-17 18:16:15 -0700 | [diff] [blame] | 645 | put_device(pfn_dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 646 | } else |
Dan Williams | bd03294 | 2016-03-17 18:16:15 -0700 | [diff] [blame] | 647 | __nd_device_register(pfn_dev); |
Dan Williams | e145574 | 2015-07-30 17:57:47 -0400 | [diff] [blame] | 648 | |
| 649 | return rc; |
| 650 | } |
| 651 | EXPORT_SYMBOL(nd_pfn_probe); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 652 | |
| 653 | /* |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 654 | * We hotplug memory at sub-section granularity, pad the reserved area |
| 655 | * from the previous section base to the namespace base address. |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 656 | */ |
| 657 | static unsigned long init_altmap_base(resource_size_t base) |
| 658 | { |
| 659 | unsigned long base_pfn = PHYS_PFN(base); |
| 660 | |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 661 | return SUBSECTION_ALIGN_DOWN(base_pfn); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 662 | } |
| 663 | |
| 664 | static unsigned long init_altmap_reserve(resource_size_t base) |
| 665 | { |
Aneesh Kumar K.V | 8f4b01f | 2019-10-31 16:27:41 +0530 | [diff] [blame] | 666 | unsigned long reserve = nd_info_block_reserve() >> PAGE_SHIFT; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 667 | unsigned long base_pfn = PHYS_PFN(base); |
| 668 | |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 669 | reserve += base_pfn - SUBSECTION_ALIGN_DOWN(base_pfn); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 670 | return reserve; |
| 671 | } |
| 672 | |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 673 | static int __nvdimm_setup_pfn(struct nd_pfn *nd_pfn, struct dev_pagemap *pgmap) |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 674 | { |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 675 | struct resource *res = &pgmap->res; |
| 676 | struct vmem_altmap *altmap = &pgmap->altmap; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 677 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; |
| 678 | u64 offset = le64_to_cpu(pfn_sb->dataoff); |
| 679 | u32 start_pad = __le32_to_cpu(pfn_sb->start_pad); |
| 680 | u32 end_trunc = __le32_to_cpu(pfn_sb->end_trunc); |
Aneesh Kumar K.V | 8f4b01f | 2019-10-31 16:27:41 +0530 | [diff] [blame] | 681 | u32 reserve = nd_info_block_reserve(); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 682 | struct nd_namespace_common *ndns = nd_pfn->ndns; |
| 683 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
| 684 | resource_size_t base = nsio->res.start + start_pad; |
Aneesh Kumar K.V | cf387d9 | 2019-09-10 11:58:25 +0530 | [diff] [blame] | 685 | resource_size_t end = nsio->res.end - end_trunc; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 686 | struct vmem_altmap __altmap = { |
| 687 | .base_pfn = init_altmap_base(base), |
| 688 | .reserve = init_altmap_reserve(base), |
Aneesh Kumar K.V | cf387d9 | 2019-09-10 11:58:25 +0530 | [diff] [blame] | 689 | .end_pfn = PHYS_PFN(end), |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 690 | }; |
| 691 | |
| 692 | memcpy(res, &nsio->res, sizeof(*res)); |
| 693 | res->start += start_pad; |
| 694 | res->end -= end_trunc; |
| 695 | |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 696 | if (nd_pfn->mode == PFN_MODE_RAM) { |
Dan Williams | 11a3581 | 2019-02-06 13:04:53 +1100 | [diff] [blame] | 697 | if (offset < reserve) |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 698 | return -EINVAL; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 699 | nd_pfn->npfns = le64_to_cpu(pfn_sb->npfns); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 700 | } else if (nd_pfn->mode == PFN_MODE_PMEM) { |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 701 | nd_pfn->npfns = PHYS_PFN((resource_size(res) - offset)); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 702 | if (le64_to_cpu(nd_pfn->pfn_sb->npfns) > nd_pfn->npfns) |
| 703 | dev_info(&nd_pfn->dev, |
| 704 | "number of pfns truncated from %lld to %ld\n", |
| 705 | le64_to_cpu(nd_pfn->pfn_sb->npfns), |
| 706 | nd_pfn->npfns); |
| 707 | memcpy(altmap, &__altmap, sizeof(*altmap)); |
Dan Williams | 11a3581 | 2019-02-06 13:04:53 +1100 | [diff] [blame] | 708 | altmap->free = PHYS_PFN(offset - reserve); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 709 | altmap->alloc = 0; |
Christoph Hellwig | 514caf2 | 2019-06-26 14:27:13 +0200 | [diff] [blame] | 710 | pgmap->flags |= PGMAP_ALTMAP_VALID; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 711 | } else |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 712 | return -ENXIO; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 713 | |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 714 | return 0; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 715 | } |
| 716 | |
| 717 | static int nd_pfn_init(struct nd_pfn *nd_pfn) |
| 718 | { |
| 719 | struct nd_namespace_common *ndns = nd_pfn->ndns; |
Dan Williams | ae86cbf | 2018-11-24 10:47:04 -0800 | [diff] [blame] | 720 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 721 | resource_size_t start, size; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 722 | struct nd_region *nd_region; |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 723 | unsigned long npfns, align; |
Jeff Moyer | 274b924 | 2019-08-28 11:49:46 -0400 | [diff] [blame] | 724 | u32 end_trunc; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 725 | struct nd_pfn_sb *pfn_sb; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 726 | phys_addr_t offset; |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 727 | const char *sig; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 728 | u64 checksum; |
| 729 | int rc; |
| 730 | |
Dan Williams | 7e3e888 | 2019-07-18 15:58:36 -0700 | [diff] [blame] | 731 | pfn_sb = devm_kmalloc(&nd_pfn->dev, sizeof(*pfn_sb), GFP_KERNEL); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 732 | if (!pfn_sb) |
| 733 | return -ENOMEM; |
| 734 | |
| 735 | nd_pfn->pfn_sb = pfn_sb; |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 736 | if (is_nd_dax(&nd_pfn->dev)) |
| 737 | sig = DAX_SIG; |
| 738 | else |
| 739 | sig = PFN_SIG; |
Dan Williams | 7e3e888 | 2019-07-18 15:58:36 -0700 | [diff] [blame] | 740 | |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 741 | rc = nd_pfn_validate(nd_pfn, sig); |
Aneesh Kumar K.V | c1f45d8 | 2019-11-01 08:57:28 +0530 | [diff] [blame] | 742 | if (rc == 0) |
| 743 | return nd_pfn_clear_memmap_errors(nd_pfn); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 744 | if (rc != -ENODEV) |
| 745 | return rc; |
| 746 | |
| 747 | /* no info block, do init */; |
Dan Williams | 7e3e888 | 2019-07-18 15:58:36 -0700 | [diff] [blame] | 748 | memset(pfn_sb, 0, sizeof(*pfn_sb)); |
| 749 | |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 750 | nd_region = to_nd_region(nd_pfn->dev.parent); |
| 751 | if (nd_region->ro) { |
| 752 | dev_info(&nd_pfn->dev, |
| 753 | "%s is read-only, unable to init metadata\n", |
| 754 | dev_name(&nd_region->dev)); |
| 755 | return -ENXIO; |
| 756 | } |
| 757 | |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 758 | /* |
| 759 | * Note, we use 64 here for the standard size of struct page, |
| 760 | * debugging options may cause it to be larger in which case the |
| 761 | * implementation will limit the pfns advertised through |
| 762 | * ->direct_access() to those that are included in the memmap. |
| 763 | */ |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 764 | start = nsio->res.start; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 765 | size = resource_size(&nsio->res); |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 766 | npfns = PHYS_PFN(size - SZ_8K); |
Dan Williams | 6acd7d5 | 2020-02-27 21:39:23 -0800 | [diff] [blame] | 767 | align = max(nd_pfn->align, memremap_compat_align()); |
| 768 | |
| 769 | /* |
| 770 | * When @start is misaligned fail namespace creation. See |
| 771 | * the 'struct nd_pfn_sb' commentary on why ->start_pad is not |
| 772 | * an option. |
| 773 | */ |
| 774 | if (!IS_ALIGNED(start, memremap_compat_align())) { |
| 775 | dev_err(&nd_pfn->dev, "%s: start %pa misaligned to %#lx\n", |
| 776 | dev_name(&ndns->dev), &start, |
| 777 | memremap_compat_align()); |
| 778 | return -EINVAL; |
| 779 | } |
Jeff Moyer | 274b924 | 2019-08-28 11:49:46 -0400 | [diff] [blame] | 780 | end_trunc = start + size - ALIGN_DOWN(start + size, align); |
Dan Williams | 594d6d9 | 2016-05-18 09:59:34 -0700 | [diff] [blame] | 781 | if (nd_pfn->mode == PFN_MODE_PMEM) { |
Dan Williams | 594d6d9 | 2016-05-18 09:59:34 -0700 | [diff] [blame] | 782 | /* |
Oliver O'Halloran | 0dd6964 | 2017-06-27 19:56:33 +1000 | [diff] [blame] | 783 | * The altmap should be padded out to the block size used |
| 784 | * when populating the vmemmap. This *should* be equal to |
| 785 | * PMD_SIZE for most architectures. |
Aneesh Kumar K.V | e96f0bf | 2019-09-05 21:15:59 +0530 | [diff] [blame] | 786 | * |
| 787 | * Also make sure size of struct page is less than 64. We |
| 788 | * want to make sure we use large enough size here so that |
| 789 | * we don't have a dynamic reserve space depending on |
| 790 | * struct page size. But we also want to make sure we notice |
| 791 | * when we end up adding new elements to struct page. |
Dan Williams | 594d6d9 | 2016-05-18 09:59:34 -0700 | [diff] [blame] | 792 | */ |
Aneesh Kumar K.V | e96f0bf | 2019-09-05 21:15:59 +0530 | [diff] [blame] | 793 | BUILD_BUG_ON(sizeof(struct page) > MAX_STRUCT_PAGE_SIZE); |
| 794 | offset = ALIGN(start + SZ_8K + MAX_STRUCT_PAGE_SIZE * npfns, align) |
| 795 | - start; |
Dan Williams | 594d6d9 | 2016-05-18 09:59:34 -0700 | [diff] [blame] | 796 | } else if (nd_pfn->mode == PFN_MODE_RAM) |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 797 | offset = ALIGN(start + SZ_8K, align) - start; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 798 | else |
| 799 | return -ENXIO; |
| 800 | |
Dan Williams | a361919 | 2019-07-18 15:58:40 -0700 | [diff] [blame] | 801 | if (offset >= size) { |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 802 | dev_err(&nd_pfn->dev, "%s unable to satisfy requested alignment\n", |
| 803 | dev_name(&ndns->dev)); |
| 804 | return -ENXIO; |
| 805 | } |
| 806 | |
Jeff Moyer | 274b924 | 2019-08-28 11:49:46 -0400 | [diff] [blame] | 807 | npfns = PHYS_PFN(size - offset - end_trunc); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 808 | pfn_sb->mode = cpu_to_le32(nd_pfn->mode); |
| 809 | pfn_sb->dataoff = cpu_to_le64(offset); |
| 810 | pfn_sb->npfns = cpu_to_le64(npfns); |
Dan Williams | c5ed926 | 2016-05-18 14:50:12 -0700 | [diff] [blame] | 811 | memcpy(pfn_sb->signature, sig, PFN_SIG_LEN); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 812 | memcpy(pfn_sb->uuid, nd_pfn->uuid, 16); |
| 813 | memcpy(pfn_sb->parent_uuid, nd_dev_to_uuid(&ndns->dev), 16); |
| 814 | pfn_sb->version_major = cpu_to_le16(1); |
Aneesh Kumar K.V | edbb52c | 2019-09-05 21:16:00 +0530 | [diff] [blame] | 815 | pfn_sb->version_minor = cpu_to_le16(4); |
Jeff Moyer | 274b924 | 2019-08-28 11:49:46 -0400 | [diff] [blame] | 816 | pfn_sb->end_trunc = cpu_to_le32(end_trunc); |
Dan Williams | 45a0dac | 2016-03-31 15:41:18 -0700 | [diff] [blame] | 817 | pfn_sb->align = cpu_to_le32(nd_pfn->align); |
Aneesh Kumar K.V | edbb52c | 2019-09-05 21:16:00 +0530 | [diff] [blame] | 818 | pfn_sb->page_struct_size = cpu_to_le16(MAX_STRUCT_PAGE_SIZE); |
| 819 | pfn_sb->page_size = cpu_to_le32(PAGE_SIZE); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 820 | checksum = nd_sb_checksum((struct nd_gen_sb *) pfn_sb); |
| 821 | pfn_sb->checksum = cpu_to_le64(checksum); |
| 822 | |
Aneesh Kumar K.V | c1f45d8 | 2019-11-01 08:57:28 +0530 | [diff] [blame] | 823 | rc = nd_pfn_clear_memmap_errors(nd_pfn); |
| 824 | if (rc) |
| 825 | return rc; |
| 826 | |
Vishal Verma | 3ae3d67 | 2017-05-10 15:01:30 -0600 | [diff] [blame] | 827 | return nvdimm_write_bytes(ndns, SZ_4K, pfn_sb, sizeof(*pfn_sb), 0); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 828 | } |
| 829 | |
| 830 | /* |
| 831 | * Determine the effective resource range and vmem_altmap from an nd_pfn |
| 832 | * instance. |
| 833 | */ |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 834 | int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, struct dev_pagemap *pgmap) |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 835 | { |
| 836 | int rc; |
| 837 | |
| 838 | if (!nd_pfn->uuid || !nd_pfn->ndns) |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 839 | return -ENODEV; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 840 | |
| 841 | rc = nd_pfn_init(nd_pfn); |
| 842 | if (rc) |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 843 | return rc; |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 844 | |
Christoph Hellwig | e8d5134 | 2017-12-29 08:54:05 +0100 | [diff] [blame] | 845 | /* we need a valid pfn_sb before we can init a dev_pagemap */ |
| 846 | return __nvdimm_setup_pfn(nd_pfn, pgmap); |
Dan Williams | ac515c0 | 2016-03-22 00:29:43 -0700 | [diff] [blame] | 847 | } |
| 848 | EXPORT_SYMBOL_GPL(nvdimm_setup_pfn); |