blob: d534761e9cdaafaf07a4686a4b105e72c22a3a73 [file] [log] [blame]
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +04001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
7 */
8
9#include <linux/mm.h>
10#include <linux/io.h>
11#include <linux/serial_reg.h>
Alexander Sverdlin5c933162018-07-13 17:51:56 +020012#include <asm/setup.h>
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +040013
14#include "devices.h"
15#include "ar2315_regs.h"
16#include "ar5312_regs.h"
17
18static inline void prom_uart_wr(void __iomem *base, unsigned reg,
19 unsigned char ch)
20{
21 __raw_writel(ch, base + 4 * reg);
22}
23
24static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
25{
26 return __raw_readl(base + 4 * reg);
27}
28
Alexander Sverdlin5c933162018-07-13 17:51:56 +020029void prom_putchar(char ch)
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +040030{
31 static void __iomem *base;
32
33 if (unlikely(base == NULL)) {
34 if (is_ar2315())
35 base = (void __iomem *)(KSEG1ADDR(AR2315_UART0_BASE));
36 else
37 base = (void __iomem *)(KSEG1ADDR(AR5312_UART0_BASE));
38 }
39
40 while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)
41 ;
Alexander Sverdlin5c933162018-07-13 17:51:56 +020042 prom_uart_wr(base, UART_TX, (unsigned char)ch);
Sergey Ryazanov8aaa7272014-10-29 03:18:42 +040043 while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)
44 ;
45}