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Thomas Gleixnerdd165a62019-05-20 19:08:13 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/* ----------------------------------------------------------------------- *
3 *
4 * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
5 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * ----------------------------------------------------------------------- */
7
8/*
NeilBrowna8e026c2010-08-12 06:44:54 +10009 * raid6/x86.h
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
11 * Definitions common to x86 and x86-64 RAID-6 code only
12 */
13
14#ifndef LINUX_RAID_RAID6X86_H
15#define LINUX_RAID_RAID6X86_H
16
Al Viroca5cd872007-10-29 04:31:16 +000017#if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__)
Linus Torvalds1da177e2005-04-16 15:20:36 -070018
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#ifdef __KERNEL__ /* Real code */
20
Ingo Molnardf6b35f2015-04-24 02:46:00 +020021#include <asm/fpu/api.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23#else /* Dummy code for user space testing */
24
H. Peter Anvina7234062007-02-28 20:11:25 -080025static inline void kernel_fpu_begin(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070026{
Linus Torvalds1da177e2005-04-16 15:20:36 -070027}
28
H. Peter Anvina7234062007-02-28 20:11:25 -080029static inline void kernel_fpu_end(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070030{
Linus Torvalds1da177e2005-04-16 15:20:36 -070031}
32
Jim Kukunas2dbf7082012-05-22 13:54:23 +100033#define __aligned(x) __attribute__((aligned(x)))
34
H. Peter Anvina7234062007-02-28 20:11:25 -080035#define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */
36#define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions
37 * (fast save and restore) */
38#define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */
39#define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */
Jim Kukunas2dbf7082012-05-22 13:54:23 +100040#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
41#define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */
42#define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */
Jim Kukunas70567412012-11-08 13:47:44 -080043#define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */
Gayatri Kammelae0a491c2016-08-12 18:03:19 -070044#define X86_FEATURE_AVX512F (9*32+16) /* AVX-512 Foundation */
45#define X86_FEATURE_AVX512DQ (9*32+17) /* AVX-512 DQ (Double/Quad granular)
46 * Instructions
47 */
48#define X86_FEATURE_AVX512BW (9*32+30) /* AVX-512 BW (Byte/Word granular)
49 * Instructions
50 */
51#define X86_FEATURE_AVX512VL (9*32+31) /* AVX-512 VL (128/256 Vector Length)
52 * Extensions
53 */
H. Peter Anvina7234062007-02-28 20:11:25 -080054#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
H. Peter Anvina7234062007-02-28 20:11:25 -080056/* Should work well enough on modern CPUs for testing */
57static inline int boot_cpu_has(int flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -070058{
Jim Kukunas70567412012-11-08 13:47:44 -080059 u32 eax, ebx, ecx, edx;
60
61 eax = (flag & 0x100) ? 7 :
62 (flag & 0x20) ? 0x80000001 : 1;
63 ecx = 0;
H. Peter Anvina7234062007-02-28 20:11:25 -080064
65 asm volatile("cpuid"
Jim Kukunas70567412012-11-08 13:47:44 -080066 : "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx));
H. Peter Anvina7234062007-02-28 20:11:25 -080067
Jim Kukunas70567412012-11-08 13:47:44 -080068 return ((flag & 0x100 ? ebx :
69 (flag & 0x80) ? ecx : edx) >> (flag & 31)) & 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070070}
71
Linus Torvalds1da177e2005-04-16 15:20:36 -070072#endif /* ndef __KERNEL__ */
73
74#endif
75#endif