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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 5b372600ccf1116701e96cf593559a60c9bee7e0 / . / arch / xtensa / boot / boot-elf / bootstrap.S
blob: 29c68426ab56a15ad7bfc8f1794692e5b3b3b1f4 [file] [log] [blame]
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]1/*
2 * arch/xtensa/boot/boot-elf/bootstrap.S
3 *
4 * Low-level exception handling
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 2004 - 2013 by Tensilica Inc.
11 *
12 * Chris Zankel <chris@zankel.net>
13 * Marc Gauthier <marc@tensilica.com>
14 * Piet Delaney <piet@tensilica.com>
15 */
Chris Zankel4bedea92005-06-23 22:01:12 -0700[diff] [blame]16
Chris Zankel4bedea92005-06-23 22:01:12 -0700[diff] [blame]17#include <asm/bootparam.h>
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]18#include <asm/initialize_mmu.h>
Max Filippovccd0ef32014-10-02 22:03:27 +0400[diff] [blame]19#include <asm/vectors.h>
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]20#include <linux/linkage.h>
Chris Zankel4bedea92005-06-23 22:01:12 -0700[diff] [blame]21
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]22 .section .ResetVector.text, "ax"
Chris Zankel4bedea92005-06-23 22:01:12 -0700[diff] [blame]23 .global _ResetVector
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]24 .global reset
25
Chris Zankel4bedea92005-06-23 22:01:12 -0700[diff] [blame]26_ResetVector:
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]27 _j _SetupMMU
28
29 .begin no-absolute-literals
30 .literal_position
31
Max Filippova9f2fc62016-04-13 05:20:02 +0300[diff] [blame]32#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \
33 XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
Max Filippov0c692562018-08-13 20:43:10 -0700[diff] [blame]34 .literal RomInitAddr, CONFIG_KERNEL_LOAD_ADDRESS
Max Filippova9f2fc62016-04-13 05:20:02 +0300[diff] [blame]35#else
Max Filippov0c692562018-08-13 20:43:10 -0700[diff] [blame]36 .literal RomInitAddr, KERNELOFFSET
Max Filippova9f2fc62016-04-13 05:20:02 +0300[diff] [blame]37#endif
Max Filippovbaac1d32018-08-13 18:56:37 -0700[diff] [blame]38#ifndef CONFIG_PARSE_BOOTPARAM
Max Filippov0c692562018-08-13 20:43:10 -0700[diff] [blame]39 .literal RomBootParam, 0
Max Filippovbaac1d32018-08-13 18:56:37 -0700[diff] [blame]40#else
Max Filippov0c692562018-08-13 20:43:10 -0700[diff] [blame]41 .literal RomBootParam, _bootparam
42
43 .align 4
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]44_bootparam:
45 .short BP_TAG_FIRST
46 .short 4
47 .long BP_VERSION
48 .short BP_TAG_LAST
49 .short 0
50 .long 0
Max Filippovbaac1d32018-08-13 18:56:37 -0700[diff] [blame]51#endif
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]52
53 .align 4
54_SetupMMU:
55 movi a0, 0
56 wsr a0, windowbase
57 rsync
58 movi a0, 1
59 wsr a0, windowstart
60 rsync
61 movi a0, 0x1F
62 wsr a0, ps
63 rsync
64
Max Filippove85e3352012-12-03 15:01:43 +0400[diff] [blame]65#ifndef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
66 initialize_mmu
67#endif
68
69 .end no-absolute-literals
70
71 rsil a0, XCHAL_DEBUGLEVEL-1
72 rsync
Chris Zankel4bedea92005-06-23 22:01:12 -0700[diff] [blame]73reset:
74 l32r a0, RomInitAddr
75 l32r a2, RomBootParam
76 movi a3, 0
77 movi a4, 0
78 jx a0