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Josh Coombs5136b2a2012-07-16 11:52:50 +02001/dts-v1/;
2
Ezequiel Garcia0ab61292013-07-26 10:18:02 -03003#include "kirkwood.dtsi"
4#include "kirkwood-6281.dtsi"
Josh Coombs5136b2a2012-07-16 11:52:50 +02005
6/ {
7 model = "Seagate GoFlex Net";
Andrew Lunnf39c1102012-07-18 19:22:54 +02008 compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood";
Josh Coombs5136b2a2012-07-16 11:52:50 +02009
10 memory {
11 device_type = "memory";
12 reg = <0x00000000 0x8000000>;
13 };
14
15 chosen {
16 bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
17 };
18
19 ocp@f1000000 {
Andrew Lunn5d183ef2012-11-17 17:00:51 +010020 pinctrl: pinctrl@10000 {
Andrew Lunn5d183ef2012-11-17 17:00:51 +010021 pmx_usb_power_enable: pmx-usb-power-enable {
22 marvell,pins = "mpp29";
23 marvell,function = "gpio";
24 };
25 pmx_led_right_cap_0: pmx-led_right_cap_0 {
26 marvell,pins = "mpp38";
27 marvell,function = "gpio";
28 };
29 pmx_led_right_cap_1: pmx-led_right_cap_1 {
30 marvell,pins = "mpp39";
31 marvell,function = "gpio";
32 };
33 pmx_led_right_cap_2: pmx-led_right_cap_2 {
34 marvell,pins = "mpp40";
35 marvell,function = "gpio";
36 };
37 pmx_led_right_cap_3: pmx-led_right_cap_3 {
38 marvell,pins = "mpp41";
39 marvell,function = "gpio";
40 };
41 pmx_led_left_cap_0: pmx-led_left_cap_0 {
42 marvell,pins = "mpp42";
43 marvell,function = "gpio";
44 };
45 pmx_led_left_cap_1: pmx-led_left_cap_1 {
46 marvell,pins = "mpp43";
47 marvell,function = "gpio";
48 };
49 pmx_led_left_cap_2: pmx-led_left_cap_2 {
50 marvell,pins = "mpp44";
51 marvell,function = "gpio";
52 };
53 pmx_led_left_cap_3: pmx-led_left_cap_3 {
54 marvell,pins = "mpp45";
55 marvell,function = "gpio";
56 };
57 pmx_led_green: pmx-led_green {
58 marvell,pins = "mpp46";
59 marvell,function = "gpio";
60 };
61 pmx_led_orange: pmx-led_orange {
62 marvell,pins = "mpp47";
63 marvell,function = "gpio";
64 };
65 };
Josh Coombs5136b2a2012-07-16 11:52:50 +020066 serial@12000 {
Josh Coombs5136b2a2012-07-16 11:52:50 +020067 status = "ok";
68 };
69
Andrew Lunnf3af1c72012-07-17 08:05:27 +020070 sata@80000 {
71 status = "okay";
72 nr-ports = <2>;
73 };
74
75 };
76 gpio-leds {
77 compatible = "gpio-leds";
Thomas Petazzoni7cfbb282013-05-24 11:44:42 +020078 pinctrl-0 = < &pmx_led_orange
79 &pmx_led_left_cap_0 &pmx_led_left_cap_1
80 &pmx_led_left_cap_2 &pmx_led_left_cap_3
81 &pmx_led_right_cap_0 &pmx_led_right_cap_1
82 &pmx_led_right_cap_2 &pmx_led_right_cap_3
83 >;
84 pinctrl-names = "default";
Andrew Lunnf3af1c72012-07-17 08:05:27 +020085
86 health {
87 label = "status:green:health";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +010088 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
Jason Cooperdcdf14c2013-10-14 17:37:55 +000089 default-state = "keep";
Andrew Lunnf3af1c72012-07-17 08:05:27 +020090 };
91 fault {
92 label = "status:orange:fault";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +010093 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +020094 };
95 left0 {
96 label = "status:white:left0";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +010097 gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +020098 };
99 left1 {
100 label = "status:white:left1";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100101 gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +0200102 };
103 left2 {
104 label = "status:white:left2";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100105 gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +0200106 };
107 left3 {
108 label = "status:white:left3";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100109 gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +0200110 };
111 right0 {
112 label = "status:white:right0";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100113 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +0200114 };
115 right1 {
116 label = "status:white:right1";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100117 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +0200118 };
119 right2 {
120 label = "status:white:right2";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100121 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +0200122 };
123 right3 {
124 label = "status:white:right3";
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100125 gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
Andrew Lunnf3af1c72012-07-17 08:05:27 +0200126 };
Josh Coombs5136b2a2012-07-16 11:52:50 +0200127 };
Andrew Lunn280b3482012-11-17 15:46:13 +0100128 regulators {
129 compatible = "simple-bus";
130 #address-cells = <1>;
131 #size-cells = <0>;
Thomas Petazzoni7cfbb282013-05-24 11:44:42 +0200132 pinctrl-0 = <&pmx_usb_power_enable>;
133 pinctrl-names = "default";
Andrew Lunn280b3482012-11-17 15:46:13 +0100134
135 usb_power: regulator@1 {
136 compatible = "regulator-fixed";
137 reg = <1>;
138 regulator-name = "USB Power";
139 regulator-min-microvolt = <5000000>;
140 regulator-max-microvolt = <5000000>;
141 enable-active-high;
142 regulator-always-on;
143 regulator-boot-on;
Andrew Lunn3a31f2d72013-12-04 16:51:39 +0100144 gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
Andrew Lunn280b3482012-11-17 15:46:13 +0100145 };
146 };
Josh Coombs5136b2a2012-07-16 11:52:50 +0200147};
Sebastian Hesselbarth876e2332013-07-07 22:34:56 +0200148
Jason Gunthorpe7045ff52013-09-17 12:44:33 -0600149&nand {
150 chip-delay = <40>;
151 status = "okay";
152
153 partition@0 {
154 label = "u-boot";
155 reg = <0x0000000 0x100000>;
156 read-only;
157 };
158
159 partition@100000 {
160 label = "uImage";
161 reg = <0x0100000 0x400000>;
162 };
163
164 partition@500000 {
165 label = "pogoplug";
166 reg = <0x0500000 0x2000000>;
167 };
168
169 partition@2500000 {
170 label = "root";
171 reg = <0x02500000 0xd800000>;
172 };
173};
174
Sebastian Hesselbarth876e2332013-07-07 22:34:56 +0200175&mdio {
176 status = "okay";
177
178 ethphy0: ethernet-phy@0 {
Sebastian Hesselbarth876e2332013-07-07 22:34:56 +0200179 reg = <0>;
180 };
181};
182
183&eth0 {
184 status = "okay";
185 ethernet0-port@0 {
186 phy-handle = <&ethphy0>;
187 };
188};