Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Ben Dooks | bec0806 | 2009-12-14 22:20:24 -0800 | [diff] [blame] | 2 | /* linux/drivers/spi/spi_s3c24xx_fiq.S |
| 3 | * |
| 4 | * Copyright 2009 Simtec Electronics |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * |
| 7 | * S3C24XX SPI - FIQ pseudo-DMA transfer code |
Ben Dooks | bec0806 | 2009-12-14 22:20:24 -0800 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <linux/linkage.h> |
| 11 | #include <asm/assembler.h> |
| 12 | |
| 13 | #include <mach/map.h> |
| 14 | #include <mach/regs-irq.h> |
| 15 | #include <plat/regs-spi.h> |
| 16 | |
Grant Likely | ca632f5 | 2011-06-06 01:16:30 -0600 | [diff] [blame] | 17 | #include "spi-s3c24xx-fiq.h" |
Ben Dooks | bec0806 | 2009-12-14 22:20:24 -0800 | [diff] [blame] | 18 | |
| 19 | .text |
| 20 | |
| 21 | @ entry to these routines is as follows, with the register names |
| 22 | @ defined in fiq.h so that they can be shared with the C files which |
| 23 | @ setup the calling registers. |
| 24 | @ |
| 25 | @ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND |
| 26 | @ fiq_rtmp Temporary register to hold tx/rx data |
| 27 | @ fiq_rspi The base of the SPI register block |
| 28 | @ fiq_rtx The tx buffer pointer |
| 29 | @ fiq_rrx The rx buffer pointer |
| 30 | @ fiq_rcount The number of bytes to move |
| 31 | |
| 32 | @ each entry starts with a word entry of how long it is |
| 33 | @ and an offset to the irq acknowledgment word |
| 34 | |
| 35 | ENTRY(s3c24xx_spi_fiq_rx) |
| 36 | s3c24xx_spi_fix_rx: |
| 37 | .word fiq_rx_end - fiq_rx_start |
| 38 | .word fiq_rx_irq_ack - fiq_rx_start |
| 39 | fiq_rx_start: |
| 40 | ldr fiq_rtmp, fiq_rx_irq_ack |
| 41 | str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] |
| 42 | |
| 43 | ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] |
| 44 | strb fiq_rtmp, [ fiq_rrx ], #1 |
| 45 | |
| 46 | mov fiq_rtmp, #0xff |
| 47 | strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] |
| 48 | |
| 49 | subs fiq_rcount, fiq_rcount, #1 |
| 50 | subnes pc, lr, #4 @@ return, still have work to do |
| 51 | |
| 52 | @@ set IRQ controller so that next op will trigger IRQ |
| 53 | mov fiq_rtmp, #0 |
| 54 | str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] |
| 55 | subs pc, lr, #4 |
| 56 | |
| 57 | fiq_rx_irq_ack: |
| 58 | .word 0 |
| 59 | fiq_rx_end: |
| 60 | |
| 61 | ENTRY(s3c24xx_spi_fiq_txrx) |
| 62 | s3c24xx_spi_fiq_txrx: |
| 63 | .word fiq_txrx_end - fiq_txrx_start |
| 64 | .word fiq_txrx_irq_ack - fiq_txrx_start |
| 65 | fiq_txrx_start: |
| 66 | |
| 67 | ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] |
| 68 | strb fiq_rtmp, [ fiq_rrx ], #1 |
| 69 | |
| 70 | ldr fiq_rtmp, fiq_txrx_irq_ack |
| 71 | str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] |
| 72 | |
| 73 | ldrb fiq_rtmp, [ fiq_rtx ], #1 |
| 74 | strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] |
| 75 | |
| 76 | subs fiq_rcount, fiq_rcount, #1 |
| 77 | subnes pc, lr, #4 @@ return, still have work to do |
| 78 | |
| 79 | mov fiq_rtmp, #0 |
| 80 | str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] |
| 81 | subs pc, lr, #4 |
| 82 | |
| 83 | fiq_txrx_irq_ack: |
| 84 | .word 0 |
| 85 | |
| 86 | fiq_txrx_end: |
| 87 | |
| 88 | ENTRY(s3c24xx_spi_fiq_tx) |
| 89 | s3c24xx_spi_fix_tx: |
| 90 | .word fiq_tx_end - fiq_tx_start |
| 91 | .word fiq_tx_irq_ack - fiq_tx_start |
| 92 | fiq_tx_start: |
| 93 | ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] |
| 94 | |
| 95 | ldr fiq_rtmp, fiq_tx_irq_ack |
| 96 | str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] |
| 97 | |
| 98 | ldrb fiq_rtmp, [ fiq_rtx ], #1 |
| 99 | strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] |
| 100 | |
| 101 | subs fiq_rcount, fiq_rcount, #1 |
| 102 | subnes pc, lr, #4 @@ return, still have work to do |
| 103 | |
| 104 | mov fiq_rtmp, #0 |
| 105 | str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] |
| 106 | subs pc, lr, #4 |
| 107 | |
| 108 | fiq_tx_irq_ack: |
| 109 | .word 0 |
| 110 | |
| 111 | fiq_tx_end: |
| 112 | |
| 113 | .end |