Nishanth Menon | d6392ae | 2017-12-15 00:45:34 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Franklin S Cooper Jr | 84e00e2 | 2017-05-21 22:46:56 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Device Tree Source for K2G Industrial Communication Engine EVM |
| 4 | * |
| 5 | * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ |
Franklin S Cooper Jr | 84e00e2 | 2017-05-21 22:46:56 -0700 | [diff] [blame] | 6 | */ |
| 7 | /dts-v1/; |
| 8 | |
| 9 | #include "keystone-k2g.dtsi" |
| 10 | |
| 11 | / { |
| 12 | compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone"; |
| 13 | model = "Texas Instruments K2G Industrial Communication EVM"; |
| 14 | |
| 15 | memory@800000000 { |
| 16 | device_type = "memory"; |
| 17 | reg = <0x00000008 0x00000000 0x00000000 0x20000000>; |
| 18 | }; |
Suman Anna | 6794d37 | 2017-08-12 10:58:11 -0700 | [diff] [blame] | 19 | |
| 20 | reserved-memory { |
| 21 | #address-cells = <2>; |
| 22 | #size-cells = <2>; |
| 23 | ranges; |
| 24 | |
| 25 | dsp_common_memory: dsp-common-memory@81f800000 { |
| 26 | compatible = "shared-dma-pool"; |
| 27 | reg = <0x00000008 0x1f800000 0x00000000 0x800000>; |
| 28 | reusable; |
| 29 | status = "okay"; |
| 30 | }; |
| 31 | }; |
Vignesh R | 6b1f518 | 2017-12-02 19:33:56 -0800 | [diff] [blame] | 32 | |
| 33 | vmain: fixedregulator-vmain { |
| 34 | compatible = "regulator-fixed"; |
| 35 | regulator-name = "vmain_fixed"; |
| 36 | regulator-min-microvolt = <24000000>; |
| 37 | regulator-max-microvolt = <24000000>; |
| 38 | regulator-always-on; |
| 39 | }; |
| 40 | |
| 41 | v5_0: fixedregulator-v5_0 { |
| 42 | /* TPS54531 */ |
| 43 | compatible = "regulator-fixed"; |
| 44 | regulator-name = "v5_0_fixed"; |
| 45 | regulator-min-microvolt = <5000000>; |
| 46 | regulator-max-microvolt = <5000000>; |
| 47 | vin-supply = <&vmain>; |
| 48 | regulator-always-on; |
| 49 | }; |
| 50 | |
| 51 | vdd_3v3: fixedregulator-vdd_3v3 { |
| 52 | /* TLV62084 */ |
| 53 | compatible = "regulator-fixed"; |
| 54 | regulator-name = "vdd_3v3_fixed"; |
| 55 | regulator-min-microvolt = <3300000>; |
| 56 | regulator-max-microvolt = <3300000>; |
| 57 | vin-supply = <&v5_0>; |
| 58 | regulator-always-on; |
| 59 | }; |
| 60 | |
| 61 | vdd_1v8: fixedregulator-vdd_1v8 { |
| 62 | /* TLV62084 */ |
| 63 | compatible = "regulator-fixed"; |
| 64 | regulator-name = "vdd_1v8_fixed"; |
| 65 | regulator-min-microvolt = <1800000>; |
| 66 | regulator-max-microvolt = <1800000>; |
| 67 | vin-supply = <&v5_0>; |
| 68 | regulator-always-on; |
| 69 | }; |
| 70 | |
| 71 | vdds_ddr: fixedregulator-vdds_ddr { |
| 72 | /* TLV62080 */ |
| 73 | compatible = "regulator-fixed"; |
| 74 | regulator-name = "vdds_ddr_fixed"; |
| 75 | regulator-min-microvolt = <1350000>; |
| 76 | regulator-max-microvolt = <1350000>; |
| 77 | vin-supply = <&v5_0>; |
| 78 | regulator-always-on; |
| 79 | }; |
| 80 | |
| 81 | vref_ddr: fixedregulator-vref_ddr { |
| 82 | /* LP2996A */ |
| 83 | compatible = "regulator-fixed"; |
| 84 | regulator-name = "vref_ddr_fixed"; |
| 85 | regulator-min-microvolt = <675000>; |
| 86 | regulator-max-microvolt = <675000>; |
| 87 | vin-supply = <&vdd_3v3>; |
| 88 | regulator-always-on; |
| 89 | }; |
| 90 | |
| 91 | vtt_ddr: fixedregulator-vtt_ddr { |
| 92 | /* LP2996A */ |
| 93 | compatible = "regulator-fixed"; |
| 94 | regulator-name = "vtt_ddr_fixed"; |
| 95 | regulator-min-microvolt = <675000>; |
| 96 | regulator-max-microvolt = <675000>; |
| 97 | vin-supply = <&vdd_3v3>; |
| 98 | regulator-always-on; |
| 99 | }; |
| 100 | |
| 101 | vdd_0v9: fixedregulator-vdd_0v9 { |
| 102 | /* TPS62180 */ |
| 103 | compatible = "regulator-fixed"; |
| 104 | regulator-name = "vdd_0v9_fixed"; |
| 105 | regulator-min-microvolt = <900000>; |
| 106 | regulator-max-microvolt = <900000>; |
| 107 | vin-supply = <&v5_0>; |
| 108 | regulator-always-on; |
| 109 | }; |
| 110 | |
| 111 | vddb: fixedregulator-vddb { |
| 112 | /* TPS22945 */ |
| 113 | compatible = "regulator-fixed"; |
| 114 | regulator-name = "vddb_fixed"; |
| 115 | regulator-min-microvolt = <3300000>; |
| 116 | regulator-max-microvolt = <3300000>; |
| 117 | |
| 118 | gpio = <&gpio1 53 GPIO_ACTIVE_HIGH>; |
| 119 | enable-active-high; |
| 120 | }; |
| 121 | |
| 122 | gpio-decoder { |
| 123 | compatible = "gpio-decoder"; |
| 124 | gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>, |
| 125 | <&pca9536 2 GPIO_ACTIVE_HIGH>, |
| 126 | <&pca9536 1 GPIO_ACTIVE_HIGH>, |
| 127 | <&pca9536 0 GPIO_ACTIVE_HIGH>; |
| 128 | linux,axis = <0>; /* ABS_X */ |
| 129 | decoder-max-value = <9>; |
| 130 | }; |
| 131 | |
| 132 | leds1 { |
| 133 | compatible = "gpio-leds"; |
| 134 | pinctrl-names = "default"; |
| 135 | pinctrl-0 = <&user_leds>; |
| 136 | |
| 137 | led0 { |
| 138 | label = "status0:red:cpu0"; |
| 139 | gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; |
| 140 | default-state = "off"; |
| 141 | linux,default-trigger = "cpu0"; |
| 142 | }; |
| 143 | |
| 144 | led1 { |
| 145 | label = "status0:green:usr"; |
| 146 | gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; |
| 147 | default-state = "off"; |
| 148 | }; |
| 149 | |
| 150 | led2 { |
| 151 | label = "status0:yellow:usr"; |
| 152 | gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; |
| 153 | default-state = "off"; |
| 154 | }; |
| 155 | |
| 156 | led3 { |
| 157 | label = "status1:red:mmc0"; |
| 158 | gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; |
| 159 | default-state = "off"; |
| 160 | linux,default-trigger = "mmc0"; |
| 161 | }; |
| 162 | |
| 163 | led4 { |
| 164 | label = "status1:green:usr"; |
| 165 | gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; |
| 166 | default-state = "off"; |
| 167 | }; |
| 168 | |
| 169 | led5 { |
| 170 | label = "status1:yellow:usr"; |
| 171 | gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; |
| 172 | default-state = "off"; |
| 173 | }; |
| 174 | |
| 175 | led6 { |
| 176 | label = "status2:red:usr"; |
| 177 | gpios = <&gpio0 44 GPIO_ACTIVE_HIGH>; |
| 178 | default-state = "off"; |
| 179 | }; |
| 180 | |
| 181 | led7 { |
| 182 | label = "status2:green:usr"; |
| 183 | gpios = <&gpio0 43 GPIO_ACTIVE_HIGH>; |
| 184 | default-state = "off"; |
| 185 | }; |
| 186 | |
| 187 | led8 { |
| 188 | label = "status2:yellow:usr"; |
| 189 | gpios = <&gpio0 42 GPIO_ACTIVE_HIGH>; |
| 190 | default-state = "off"; |
| 191 | }; |
| 192 | |
| 193 | led9 { |
| 194 | label = "status3:red:usr"; |
| 195 | gpios = <&gpio0 41 GPIO_ACTIVE_HIGH>; |
| 196 | default-state = "off"; |
| 197 | }; |
| 198 | |
| 199 | led10 { |
| 200 | label = "status3:green:usr"; |
| 201 | gpios = <&gpio0 101 GPIO_ACTIVE_HIGH>; |
| 202 | default-state = "off"; |
| 203 | }; |
| 204 | |
| 205 | led11 { |
| 206 | label = "status3:yellow:usr"; |
| 207 | gpios = <&gpio0 102 GPIO_ACTIVE_HIGH>; |
| 208 | default-state = "off"; |
| 209 | }; |
| 210 | |
| 211 | led12 { |
| 212 | label = "status4:green:heartbeat"; |
| 213 | gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; |
| 214 | linux,default-trigger = "heartbeat"; |
| 215 | }; |
| 216 | }; |
Franklin S Cooper Jr | 84e00e2 | 2017-05-21 22:46:56 -0700 | [diff] [blame] | 217 | }; |
| 218 | |
| 219 | &k2g_pinctrl { |
| 220 | uart0_pins: pinmux_uart0_pins { |
| 221 | pinctrl-single,pins = < |
| 222 | K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
| 223 | K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
| 224 | >; |
| 225 | }; |
Vignesh R | 6b1f518 | 2017-12-02 19:33:56 -0800 | [diff] [blame] | 226 | |
| 227 | qspi_pins: pinmux_qspi_pins { |
| 228 | pinctrl-single,pins = < |
| 229 | K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */ |
| 230 | K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */ |
| 231 | K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */ |
| 232 | K2G_CORE_IOPAD(0x1210) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d1.qspi_d1 */ |
| 233 | K2G_CORE_IOPAD(0x1214) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d2.qspi_d2 */ |
| 234 | K2G_CORE_IOPAD(0x1218) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d3.qspi_d3 */ |
| 235 | K2G_CORE_IOPAD(0x121c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_csn0.qspi_csn0 */ |
| 236 | >; |
| 237 | }; |
| 238 | |
| 239 | mmc1_pins: pinmux_mmc1_pins { |
| 240 | pinctrl-single,pins = < |
| 241 | K2G_CORE_IOPAD(0x10FC) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ |
| 242 | K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ |
| 243 | K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ |
| 244 | K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ |
| 245 | K2G_CORE_IOPAD(0x110C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */ |
| 246 | K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ |
| 247 | K2G_CORE_IOPAD(0x1114) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* mmc1_sdcd.gpio0_69 */ |
| 248 | K2G_CORE_IOPAD(0x1118) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_sdwp.mmc1_sdwp */ |
| 249 | K2G_CORE_IOPAD(0x111C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_pow.mmc1_pow */ |
| 250 | >; |
| 251 | }; |
| 252 | |
| 253 | i2c0_pins: pinmux_i2c0_pins { |
| 254 | pinctrl-single,pins = < |
| 255 | K2G_CORE_IOPAD(0x137c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
| 256 | K2G_CORE_IOPAD(0x1380) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| 257 | >; |
| 258 | }; |
| 259 | |
| 260 | i2c1_pins: pinmux_i2c1_pins { |
| 261 | pinctrl-single,pins = < |
| 262 | K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */ |
| 263 | K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */ |
| 264 | >; |
| 265 | }; |
| 266 | |
| 267 | user_leds: pinmux_user_leds { |
| 268 | pinctrl-single,pins = < |
| 269 | K2G_CORE_IOPAD(0x102c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad11.gpio0_11 */ |
| 270 | K2G_CORE_IOPAD(0x1030) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad12.gpio0_12 */ |
| 271 | K2G_CORE_IOPAD(0x1034) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad13.gpio0_13 */ |
| 272 | K2G_CORE_IOPAD(0x1038) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad14.gpio0_14 */ |
| 273 | K2G_CORE_IOPAD(0x103c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_ad15.gpio0_15 */ |
| 274 | K2G_CORE_IOPAD(0x1040) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_clk.gpio0_16 */ |
| 275 | K2G_CORE_IOPAD(0x104c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* gpmc_wen.gpio0_19 */ |
| 276 | K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data9.gpio0_44 */ |
| 277 | K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data10.gpio0_43 */ |
| 278 | K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data11.gpio0_42 */ |
| 279 | K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* dss_data12.gpio0_41 */ |
| 280 | K2G_CORE_IOPAD(0x11b8) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* spi2_scsn0.gpio0_101 */ |
| 281 | K2G_CORE_IOPAD(0x11bc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* spi2_scsn1.gpio0_102 */ |
| 282 | >; |
| 283 | }; |
Franklin S Cooper Jr | 84e00e2 | 2017-05-21 22:46:56 -0700 | [diff] [blame] | 284 | }; |
| 285 | |
| 286 | &uart0 { |
| 287 | pinctrl-names = "default"; |
| 288 | pinctrl-0 = <&uart0_pins>; |
| 289 | status = "okay"; |
| 290 | }; |
Suman Anna | 6794d37 | 2017-08-12 10:58:11 -0700 | [diff] [blame] | 291 | |
| 292 | &dsp0 { |
| 293 | memory-region = <&dsp_common_memory>; |
| 294 | status = "okay"; |
| 295 | }; |
Vignesh R | 6b1f518 | 2017-12-02 19:33:56 -0800 | [diff] [blame] | 296 | |
| 297 | &qspi { |
| 298 | pinctrl-names = "default"; |
| 299 | pinctrl-0 = <&qspi_pins>; |
| 300 | cdns,rclk-en; |
| 301 | status = "okay"; |
| 302 | |
| 303 | flash0: m25p80@0 { |
| 304 | compatible = "s25fl256s1", "jedec,spi-nor"; |
| 305 | reg = <0>; |
| 306 | spi-tx-bus-width = <1>; |
| 307 | spi-rx-bus-width = <4>; |
| 308 | spi-max-frequency = <96000000>; |
| 309 | #address-cells = <1>; |
| 310 | #size-cells = <1>; |
| 311 | cdns,read-delay = <5>; |
| 312 | cdns,tshsl-ns = <500>; |
| 313 | cdns,tsd2d-ns = <500>; |
| 314 | cdns,tchsh-ns = <119>; |
| 315 | cdns,tslch-ns = <119>; |
| 316 | |
| 317 | partition@0 { |
| 318 | label = "QSPI.u-boot"; |
| 319 | reg = <0x00000000 0x00100000>; |
| 320 | }; |
| 321 | partition@1 { |
| 322 | label = "QSPI.u-boot-env"; |
| 323 | reg = <0x00100000 0x00040000>; |
| 324 | }; |
| 325 | partition@2 { |
| 326 | label = "QSPI.skern"; |
| 327 | reg = <0x00140000 0x0040000>; |
| 328 | }; |
| 329 | partition@3 { |
| 330 | label = "QSPI.pmmc-firmware"; |
| 331 | reg = <0x00180000 0x0040000>; |
| 332 | }; |
| 333 | partition@4 { |
| 334 | label = "QSPI.kernel"; |
| 335 | reg = <0x001c0000 0x0800000>; |
| 336 | }; |
| 337 | partition@5 { |
| 338 | label = "QSPI.u-boot-spl-os"; |
| 339 | reg = <0x009c0000 0x0040000>; |
| 340 | }; |
| 341 | partition@6 { |
| 342 | label = "QSPI.file-system"; |
| 343 | reg = <0x00a00000 0x1600000>; |
| 344 | }; |
| 345 | }; |
| 346 | }; |
| 347 | |
| 348 | &gpio0 { |
| 349 | status = "okay"; |
| 350 | }; |
| 351 | |
| 352 | &gpio1 { |
| 353 | status = "okay"; |
| 354 | }; |
| 355 | |
| 356 | &mmc1 { |
| 357 | pinctrl-names = "default"; |
| 358 | pinctrl-0 = <&mmc1_pins>; |
| 359 | vmmc-supply = <&vdd_3v3>; |
| 360 | cd-gpios = <&gpio0 69 GPIO_ACTIVE_LOW>; |
| 361 | status = "okay"; |
| 362 | }; |
| 363 | |
| 364 | &i2c0 { |
| 365 | pinctrl-names = "default"; |
| 366 | pinctrl-0 = <&i2c0_pins>; |
| 367 | status = "okay"; |
| 368 | |
| 369 | eeprom@50 { |
| 370 | compatible = "atmel,24c256"; |
| 371 | reg = <0x50>; |
| 372 | }; |
| 373 | }; |
| 374 | |
| 375 | &i2c1 { |
| 376 | pinctrl-names = "default"; |
| 377 | pinctrl-0 = <&i2c1_pins>; |
| 378 | status = "okay"; |
| 379 | clock-frequency = <400000>; |
| 380 | |
| 381 | pca9536: gpio@41 { |
| 382 | compatible = "ti,pca9536"; |
| 383 | reg = <0x41>; |
| 384 | gpio-controller; |
| 385 | #gpio-cells = <2>; |
| 386 | vcc-supply = <&vdd_3v3>; |
| 387 | }; |
| 388 | }; |