Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/kernel/irq/chip.c |
| 3 | * |
| 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
| 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King |
| 6 | * |
| 7 | * This file contains the core interrupt handling code, for irq-chip |
| 8 | * based architectures. |
| 9 | * |
| 10 | * Detailed information is available in Documentation/DocBook/genericirq |
| 11 | */ |
| 12 | |
| 13 | #include <linux/irq.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/kernel_stat.h> |
| 17 | |
| 18 | #include "internals.h" |
| 19 | |
| 20 | /** |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 21 | * dynamic_irq_init - initialize a dynamically allocated irq |
| 22 | * @irq: irq number to initialize |
| 23 | */ |
| 24 | void dynamic_irq_init(unsigned int irq) |
| 25 | { |
| 26 | struct irq_desc *desc; |
| 27 | unsigned long flags; |
| 28 | |
| 29 | if (irq >= NR_IRQS) { |
| 30 | printk(KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); |
| 31 | WARN_ON(1); |
| 32 | return; |
| 33 | } |
| 34 | |
| 35 | /* Ensure we don't have left over values from a previous use of this irq */ |
| 36 | desc = irq_desc + irq; |
| 37 | spin_lock_irqsave(&desc->lock, flags); |
| 38 | desc->status = IRQ_DISABLED; |
| 39 | desc->chip = &no_irq_chip; |
| 40 | desc->handle_irq = handle_bad_irq; |
| 41 | desc->depth = 1; |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 42 | desc->msi_desc = NULL; |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 43 | desc->handler_data = NULL; |
| 44 | desc->chip_data = NULL; |
| 45 | desc->action = NULL; |
| 46 | desc->irq_count = 0; |
| 47 | desc->irqs_unhandled = 0; |
| 48 | #ifdef CONFIG_SMP |
| 49 | desc->affinity = CPU_MASK_ALL; |
| 50 | #endif |
| 51 | spin_unlock_irqrestore(&desc->lock, flags); |
| 52 | } |
| 53 | |
| 54 | /** |
| 55 | * dynamic_irq_cleanup - cleanup a dynamically allocated irq |
| 56 | * @irq: irq number to initialize |
| 57 | */ |
| 58 | void dynamic_irq_cleanup(unsigned int irq) |
| 59 | { |
| 60 | struct irq_desc *desc; |
| 61 | unsigned long flags; |
| 62 | |
| 63 | if (irq >= NR_IRQS) { |
| 64 | printk(KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); |
| 65 | WARN_ON(1); |
| 66 | return; |
| 67 | } |
| 68 | |
| 69 | desc = irq_desc + irq; |
| 70 | spin_lock_irqsave(&desc->lock, flags); |
Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 71 | if (desc->action) { |
| 72 | spin_unlock_irqrestore(&desc->lock, flags); |
| 73 | printk(KERN_ERR "Destroying IRQ%d without calling free_irq\n", |
| 74 | irq); |
| 75 | WARN_ON(1); |
| 76 | return; |
| 77 | } |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 78 | desc->msi_desc = NULL; |
| 79 | desc->handler_data = NULL; |
| 80 | desc->chip_data = NULL; |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 81 | desc->handle_irq = handle_bad_irq; |
| 82 | desc->chip = &no_irq_chip; |
| 83 | spin_unlock_irqrestore(&desc->lock, flags); |
| 84 | } |
| 85 | |
| 86 | |
| 87 | /** |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 88 | * set_irq_chip - set the irq chip for an irq |
| 89 | * @irq: irq number |
| 90 | * @chip: pointer to irq chip description structure |
| 91 | */ |
| 92 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) |
| 93 | { |
| 94 | struct irq_desc *desc; |
| 95 | unsigned long flags; |
| 96 | |
| 97 | if (irq >= NR_IRQS) { |
| 98 | printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
| 99 | WARN_ON(1); |
| 100 | return -EINVAL; |
| 101 | } |
| 102 | |
| 103 | if (!chip) |
| 104 | chip = &no_irq_chip; |
| 105 | |
| 106 | desc = irq_desc + irq; |
| 107 | spin_lock_irqsave(&desc->lock, flags); |
| 108 | irq_chip_set_defaults(chip); |
| 109 | desc->chip = chip; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 110 | spin_unlock_irqrestore(&desc->lock, flags); |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | EXPORT_SYMBOL(set_irq_chip); |
| 115 | |
| 116 | /** |
| 117 | * set_irq_type - set the irq type for an irq |
| 118 | * @irq: irq number |
| 119 | * @type: interrupt type - see include/linux/interrupt.h |
| 120 | */ |
| 121 | int set_irq_type(unsigned int irq, unsigned int type) |
| 122 | { |
| 123 | struct irq_desc *desc; |
| 124 | unsigned long flags; |
| 125 | int ret = -ENXIO; |
| 126 | |
| 127 | if (irq >= NR_IRQS) { |
| 128 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
| 129 | return -ENODEV; |
| 130 | } |
| 131 | |
| 132 | desc = irq_desc + irq; |
| 133 | if (desc->chip->set_type) { |
| 134 | spin_lock_irqsave(&desc->lock, flags); |
| 135 | ret = desc->chip->set_type(irq, type); |
| 136 | spin_unlock_irqrestore(&desc->lock, flags); |
| 137 | } |
| 138 | return ret; |
| 139 | } |
| 140 | EXPORT_SYMBOL(set_irq_type); |
| 141 | |
| 142 | /** |
| 143 | * set_irq_data - set irq type data for an irq |
| 144 | * @irq: Interrupt number |
| 145 | * @data: Pointer to interrupt specific data |
| 146 | * |
| 147 | * Set the hardware irq controller data for an irq |
| 148 | */ |
| 149 | int set_irq_data(unsigned int irq, void *data) |
| 150 | { |
| 151 | struct irq_desc *desc; |
| 152 | unsigned long flags; |
| 153 | |
| 154 | if (irq >= NR_IRQS) { |
| 155 | printk(KERN_ERR |
| 156 | "Trying to install controller data for IRQ%d\n", irq); |
| 157 | return -EINVAL; |
| 158 | } |
| 159 | |
| 160 | desc = irq_desc + irq; |
| 161 | spin_lock_irqsave(&desc->lock, flags); |
| 162 | desc->handler_data = data; |
| 163 | spin_unlock_irqrestore(&desc->lock, flags); |
| 164 | return 0; |
| 165 | } |
| 166 | EXPORT_SYMBOL(set_irq_data); |
| 167 | |
| 168 | /** |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 169 | * set_irq_data - set irq type data for an irq |
| 170 | * @irq: Interrupt number |
Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 171 | * @entry: Pointer to MSI descriptor data |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 172 | * |
| 173 | * Set the hardware irq controller data for an irq |
| 174 | */ |
| 175 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) |
| 176 | { |
| 177 | struct irq_desc *desc; |
| 178 | unsigned long flags; |
| 179 | |
| 180 | if (irq >= NR_IRQS) { |
| 181 | printk(KERN_ERR |
| 182 | "Trying to install msi data for IRQ%d\n", irq); |
| 183 | return -EINVAL; |
| 184 | } |
| 185 | desc = irq_desc + irq; |
| 186 | spin_lock_irqsave(&desc->lock, flags); |
| 187 | desc->msi_desc = entry; |
| 188 | spin_unlock_irqrestore(&desc->lock, flags); |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | /** |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 193 | * set_irq_chip_data - set irq chip data for an irq |
| 194 | * @irq: Interrupt number |
| 195 | * @data: Pointer to chip specific data |
| 196 | * |
| 197 | * Set the hardware irq chip data for an irq |
| 198 | */ |
| 199 | int set_irq_chip_data(unsigned int irq, void *data) |
| 200 | { |
| 201 | struct irq_desc *desc = irq_desc + irq; |
| 202 | unsigned long flags; |
| 203 | |
| 204 | if (irq >= NR_IRQS || !desc->chip) { |
| 205 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); |
| 206 | return -EINVAL; |
| 207 | } |
| 208 | |
| 209 | spin_lock_irqsave(&desc->lock, flags); |
| 210 | desc->chip_data = data; |
| 211 | spin_unlock_irqrestore(&desc->lock, flags); |
| 212 | |
| 213 | return 0; |
| 214 | } |
| 215 | EXPORT_SYMBOL(set_irq_chip_data); |
| 216 | |
| 217 | /* |
| 218 | * default enable function |
| 219 | */ |
| 220 | static void default_enable(unsigned int irq) |
| 221 | { |
| 222 | struct irq_desc *desc = irq_desc + irq; |
| 223 | |
| 224 | desc->chip->unmask(irq); |
| 225 | desc->status &= ~IRQ_MASKED; |
| 226 | } |
| 227 | |
| 228 | /* |
| 229 | * default disable function |
| 230 | */ |
| 231 | static void default_disable(unsigned int irq) |
| 232 | { |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | /* |
| 236 | * default startup function |
| 237 | */ |
| 238 | static unsigned int default_startup(unsigned int irq) |
| 239 | { |
| 240 | irq_desc[irq].chip->enable(irq); |
| 241 | |
| 242 | return 0; |
| 243 | } |
| 244 | |
| 245 | /* |
| 246 | * Fixup enable/disable function pointers |
| 247 | */ |
| 248 | void irq_chip_set_defaults(struct irq_chip *chip) |
| 249 | { |
| 250 | if (!chip->enable) |
| 251 | chip->enable = default_enable; |
| 252 | if (!chip->disable) |
| 253 | chip->disable = default_disable; |
| 254 | if (!chip->startup) |
| 255 | chip->startup = default_startup; |
| 256 | if (!chip->shutdown) |
| 257 | chip->shutdown = chip->disable; |
| 258 | if (!chip->name) |
| 259 | chip->name = chip->typename; |
Zhang, Yanmin | b86432b | 2006-11-16 01:19:10 -0800 | [diff] [blame] | 260 | if (!chip->end) |
| 261 | chip->end = dummy_irq_chip.end; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 262 | } |
| 263 | |
| 264 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) |
| 265 | { |
| 266 | if (desc->chip->mask_ack) |
| 267 | desc->chip->mask_ack(irq); |
| 268 | else { |
| 269 | desc->chip->mask(irq); |
| 270 | desc->chip->ack(irq); |
| 271 | } |
| 272 | } |
| 273 | |
| 274 | /** |
| 275 | * handle_simple_irq - Simple and software-decoded IRQs. |
| 276 | * @irq: the interrupt number |
| 277 | * @desc: the interrupt description structure for this irq |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 278 | * |
| 279 | * Simple interrupts are either sent from a demultiplexing interrupt |
| 280 | * handler or come from hardware, where no interrupt hardware control |
| 281 | * is necessary. |
| 282 | * |
| 283 | * Note: The caller is expected to handle the ack, clear, mask and |
| 284 | * unmask issues if necessary. |
| 285 | */ |
| 286 | void fastcall |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 287 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 288 | { |
| 289 | struct irqaction *action; |
| 290 | irqreturn_t action_ret; |
| 291 | const unsigned int cpu = smp_processor_id(); |
| 292 | |
| 293 | spin_lock(&desc->lock); |
| 294 | |
| 295 | if (unlikely(desc->status & IRQ_INPROGRESS)) |
| 296 | goto out_unlock; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 297 | kstat_cpu(cpu).irqs[irq]++; |
| 298 | |
| 299 | action = desc->action; |
Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 300 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
| 301 | if (desc->chip->mask) |
| 302 | desc->chip->mask(irq); |
| 303 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 304 | desc->status |= IRQ_PENDING; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 305 | goto out_unlock; |
Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 306 | } |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 307 | |
Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 308 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING | IRQ_PENDING); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 309 | desc->status |= IRQ_INPROGRESS; |
| 310 | spin_unlock(&desc->lock); |
| 311 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 312 | action_ret = handle_IRQ_event(irq, action); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 313 | if (!noirqdebug) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 314 | note_interrupt(irq, desc, action_ret); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 315 | |
| 316 | spin_lock(&desc->lock); |
| 317 | desc->status &= ~IRQ_INPROGRESS; |
| 318 | out_unlock: |
| 319 | spin_unlock(&desc->lock); |
| 320 | } |
| 321 | |
| 322 | /** |
| 323 | * handle_level_irq - Level type irq handler |
| 324 | * @irq: the interrupt number |
| 325 | * @desc: the interrupt description structure for this irq |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 326 | * |
| 327 | * Level type interrupts are active as long as the hardware line has |
| 328 | * the active level. This may require to mask the interrupt and unmask |
| 329 | * it after the associated handler has acknowledged the device, so the |
| 330 | * interrupt line is back to inactive. |
| 331 | */ |
| 332 | void fastcall |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 333 | handle_level_irq(unsigned int irq, struct irq_desc *desc) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 334 | { |
| 335 | unsigned int cpu = smp_processor_id(); |
| 336 | struct irqaction *action; |
| 337 | irqreturn_t action_ret; |
| 338 | |
| 339 | spin_lock(&desc->lock); |
| 340 | mask_ack_irq(desc, irq); |
| 341 | |
| 342 | if (unlikely(desc->status & IRQ_INPROGRESS)) |
Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 343 | goto out_unlock; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 344 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 345 | kstat_cpu(cpu).irqs[irq]++; |
| 346 | |
| 347 | /* |
| 348 | * If its disabled or no action available |
| 349 | * keep it masked and get out of here |
| 350 | */ |
| 351 | action = desc->action; |
Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 352 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
| 353 | desc->status |= IRQ_PENDING; |
Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 354 | goto out_unlock; |
Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 355 | } |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 356 | |
| 357 | desc->status |= IRQ_INPROGRESS; |
Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 358 | desc->status &= ~IRQ_PENDING; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 359 | spin_unlock(&desc->lock); |
| 360 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 361 | action_ret = handle_IRQ_event(irq, action); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 362 | if (!noirqdebug) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 363 | note_interrupt(irq, desc, action_ret); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 364 | |
| 365 | spin_lock(&desc->lock); |
| 366 | desc->status &= ~IRQ_INPROGRESS; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 367 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
| 368 | desc->chip->unmask(irq); |
Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 369 | out_unlock: |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 370 | spin_unlock(&desc->lock); |
| 371 | } |
| 372 | |
| 373 | /** |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 374 | * handle_fasteoi_irq - irq handler for transparent controllers |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 375 | * @irq: the interrupt number |
| 376 | * @desc: the interrupt description structure for this irq |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 377 | * |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 378 | * Only a single callback will be issued to the chip: an ->eoi() |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 379 | * call when the interrupt has been serviced. This enables support |
| 380 | * for modern forms of interrupt handlers, which handle the flow |
| 381 | * details in hardware, transparently. |
| 382 | */ |
| 383 | void fastcall |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 384 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 385 | { |
| 386 | unsigned int cpu = smp_processor_id(); |
| 387 | struct irqaction *action; |
| 388 | irqreturn_t action_ret; |
| 389 | |
| 390 | spin_lock(&desc->lock); |
| 391 | |
| 392 | if (unlikely(desc->status & IRQ_INPROGRESS)) |
| 393 | goto out; |
| 394 | |
| 395 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 396 | kstat_cpu(cpu).irqs[irq]++; |
| 397 | |
| 398 | /* |
| 399 | * If its disabled or no action available |
Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 400 | * then mask it and get out of here: |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 401 | */ |
| 402 | action = desc->action; |
Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 403 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
| 404 | desc->status |= IRQ_PENDING; |
Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 405 | if (desc->chip->mask) |
| 406 | desc->chip->mask(irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 407 | goto out; |
Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 408 | } |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 409 | |
| 410 | desc->status |= IRQ_INPROGRESS; |
Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 411 | desc->status &= ~IRQ_PENDING; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 412 | spin_unlock(&desc->lock); |
| 413 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 414 | action_ret = handle_IRQ_event(irq, action); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 415 | if (!noirqdebug) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 416 | note_interrupt(irq, desc, action_ret); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 417 | |
| 418 | spin_lock(&desc->lock); |
| 419 | desc->status &= ~IRQ_INPROGRESS; |
| 420 | out: |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 421 | desc->chip->eoi(irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 422 | |
| 423 | spin_unlock(&desc->lock); |
| 424 | } |
| 425 | |
| 426 | /** |
| 427 | * handle_edge_irq - edge type IRQ handler |
| 428 | * @irq: the interrupt number |
| 429 | * @desc: the interrupt description structure for this irq |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 430 | * |
| 431 | * Interrupt occures on the falling and/or rising edge of a hardware |
| 432 | * signal. The occurence is latched into the irq controller hardware |
| 433 | * and must be acked in order to be reenabled. After the ack another |
| 434 | * interrupt can happen on the same source even before the first one |
| 435 | * is handled by the assosiacted event handler. If this happens it |
| 436 | * might be necessary to disable (mask) the interrupt depending on the |
| 437 | * controller hardware. This requires to reenable the interrupt inside |
| 438 | * of the loop which handles the interrupts which have arrived while |
| 439 | * the handler was running. If all pending interrupts are handled, the |
| 440 | * loop is left. |
| 441 | */ |
| 442 | void fastcall |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 443 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 444 | { |
| 445 | const unsigned int cpu = smp_processor_id(); |
| 446 | |
| 447 | spin_lock(&desc->lock); |
| 448 | |
| 449 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 450 | |
| 451 | /* |
| 452 | * If we're currently running this IRQ, or its disabled, |
| 453 | * we shouldn't process the IRQ. Mark it pending, handle |
| 454 | * the necessary masking and go out |
| 455 | */ |
| 456 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || |
| 457 | !desc->action)) { |
| 458 | desc->status |= (IRQ_PENDING | IRQ_MASKED); |
| 459 | mask_ack_irq(desc, irq); |
| 460 | goto out_unlock; |
| 461 | } |
| 462 | |
| 463 | kstat_cpu(cpu).irqs[irq]++; |
| 464 | |
| 465 | /* Start handling the irq */ |
| 466 | desc->chip->ack(irq); |
| 467 | |
| 468 | /* Mark the IRQ currently in progress.*/ |
| 469 | desc->status |= IRQ_INPROGRESS; |
| 470 | |
| 471 | do { |
| 472 | struct irqaction *action = desc->action; |
| 473 | irqreturn_t action_ret; |
| 474 | |
| 475 | if (unlikely(!action)) { |
| 476 | desc->chip->mask(irq); |
| 477 | goto out_unlock; |
| 478 | } |
| 479 | |
| 480 | /* |
| 481 | * When another irq arrived while we were handling |
| 482 | * one, we could have masked the irq. |
| 483 | * Renable it, if it was not disabled in meantime. |
| 484 | */ |
| 485 | if (unlikely((desc->status & |
| 486 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == |
| 487 | (IRQ_PENDING | IRQ_MASKED))) { |
| 488 | desc->chip->unmask(irq); |
| 489 | desc->status &= ~IRQ_MASKED; |
| 490 | } |
| 491 | |
| 492 | desc->status &= ~IRQ_PENDING; |
| 493 | spin_unlock(&desc->lock); |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 494 | action_ret = handle_IRQ_event(irq, action); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 495 | if (!noirqdebug) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 496 | note_interrupt(irq, desc, action_ret); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 497 | spin_lock(&desc->lock); |
| 498 | |
| 499 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); |
| 500 | |
| 501 | desc->status &= ~IRQ_INPROGRESS; |
| 502 | out_unlock: |
| 503 | spin_unlock(&desc->lock); |
| 504 | } |
| 505 | |
| 506 | #ifdef CONFIG_SMP |
| 507 | /** |
| 508 | * handle_percpu_IRQ - Per CPU local irq handler |
| 509 | * @irq: the interrupt number |
| 510 | * @desc: the interrupt description structure for this irq |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 511 | * |
| 512 | * Per CPU interrupts on SMP machines without locking requirements |
| 513 | */ |
| 514 | void fastcall |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 515 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 516 | { |
| 517 | irqreturn_t action_ret; |
| 518 | |
| 519 | kstat_this_cpu.irqs[irq]++; |
| 520 | |
| 521 | if (desc->chip->ack) |
| 522 | desc->chip->ack(irq); |
| 523 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 524 | action_ret = handle_IRQ_event(irq, desc->action); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 525 | if (!noirqdebug) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 526 | note_interrupt(irq, desc, action_ret); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 527 | |
| 528 | if (desc->chip->eoi) |
| 529 | desc->chip->eoi(irq); |
| 530 | } |
| 531 | |
| 532 | #endif /* CONFIG_SMP */ |
| 533 | |
| 534 | void |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 535 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
| 536 | const char *name) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 537 | { |
| 538 | struct irq_desc *desc; |
| 539 | unsigned long flags; |
| 540 | |
| 541 | if (irq >= NR_IRQS) { |
| 542 | printk(KERN_ERR |
| 543 | "Trying to install type control for IRQ%d\n", irq); |
| 544 | return; |
| 545 | } |
| 546 | |
| 547 | desc = irq_desc + irq; |
| 548 | |
| 549 | if (!handle) |
| 550 | handle = handle_bad_irq; |
Thomas Gleixner | 9d7ac8b | 2006-12-22 01:08:14 -0800 | [diff] [blame] | 551 | else if (desc->chip == &no_irq_chip) { |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 552 | printk(KERN_WARNING "Trying to install %sinterrupt handler " |
Geert Uytterhoeven | b039db8 | 2006-12-20 15:59:48 +0100 | [diff] [blame] | 553 | "for IRQ%d\n", is_chained ? "chained " : "", irq); |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 554 | /* |
| 555 | * Some ARM implementations install a handler for really dumb |
| 556 | * interrupt hardware without setting an irq_chip. This worked |
| 557 | * with the ARM no_irq_chip but the check in setup_irq would |
| 558 | * prevent us to setup the interrupt at all. Switch it to |
| 559 | * dummy_irq_chip for easy transition. |
| 560 | */ |
| 561 | desc->chip = &dummy_irq_chip; |
| 562 | } |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 563 | |
| 564 | spin_lock_irqsave(&desc->lock, flags); |
| 565 | |
| 566 | /* Uninstall? */ |
| 567 | if (handle == handle_bad_irq) { |
Jan Beulich | 5575ddf | 2007-02-16 01:28:26 -0800 | [diff] [blame^] | 568 | if (desc->chip != &no_irq_chip) |
| 569 | mask_ack_irq(desc, irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 570 | desc->status |= IRQ_DISABLED; |
| 571 | desc->depth = 1; |
| 572 | } |
| 573 | desc->handle_irq = handle; |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 574 | desc->name = name; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 575 | |
| 576 | if (handle != handle_bad_irq && is_chained) { |
| 577 | desc->status &= ~IRQ_DISABLED; |
| 578 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; |
| 579 | desc->depth = 0; |
| 580 | desc->chip->unmask(irq); |
| 581 | } |
| 582 | spin_unlock_irqrestore(&desc->lock, flags); |
| 583 | } |
| 584 | |
| 585 | void |
| 586 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 587 | irq_flow_handler_t handle) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 588 | { |
| 589 | set_irq_chip(irq, chip); |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 590 | __set_irq_handler(irq, handle, 0, NULL); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 591 | } |
| 592 | |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 593 | void |
| 594 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, |
| 595 | irq_flow_handler_t handle, const char *name) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 596 | { |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 597 | set_irq_chip(irq, chip); |
| 598 | __set_irq_handler(irq, handle, 0, name); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 599 | } |