blob: 590963c9c6094435c1bd5bbe599327f7f1264e94 [file] [log] [blame]
Thomas Gleixneraf873fc2019-05-28 09:57:21 -07001// SPDX-License-Identifier: GPL-2.0-only
James Morse82869ac2016-04-27 17:47:12 +01002/*:
3 * Hibernate support specific for ARM64
4 *
5 * Derived from work on ARM hibernation support by:
6 *
7 * Ubuntu project, hibernation support for mach-dove
8 * Copyright (C) 2010 Nokia Corporation (Hiroshi Doyu)
9 * Copyright (C) 2010 Texas Instruments, Inc. (Teerth Reddy et al.)
10 * https://lkml.org/lkml/2010/6/18/4
11 * https://lists.linux-foundation.org/pipermail/linux-pm/2010-June/027422.html
12 * https://patchwork.kernel.org/patch/96442/
13 *
14 * Copyright (C) 2006 Rafael J. Wysocki <rjw@sisk.pl>
James Morse82869ac2016-04-27 17:47:12 +010015 */
16#define pr_fmt(x) "hibernate: " x
James Morse8ec058f2016-08-17 13:50:26 +010017#include <linux/cpu.h>
James Morse82869ac2016-04-27 17:47:12 +010018#include <linux/kvm_host.h>
19#include <linux/mm.h>
20#include <linux/pm.h>
21#include <linux/sched.h>
22#include <linux/suspend.h>
23#include <linux/utsname.h>
24#include <linux/version.h>
25
26#include <asm/barrier.h>
27#include <asm/cacheflush.h>
James Morse8ec058f2016-08-17 13:50:26 +010028#include <asm/cputype.h>
James Morse0fbeb312017-11-02 12:12:34 +000029#include <asm/daifflags.h>
James Morse82869ac2016-04-27 17:47:12 +010030#include <asm/irqflags.h>
AKASHI Takahiro254a41c2017-04-03 11:24:35 +090031#include <asm/kexec.h>
James Morse82869ac2016-04-27 17:47:12 +010032#include <asm/memory.h>
33#include <asm/mmu_context.h>
34#include <asm/pgalloc.h>
35#include <asm/pgtable.h>
36#include <asm/pgtable-hwdef.h>
37#include <asm/sections.h>
James Morsed74b4e42016-06-22 10:06:13 +010038#include <asm/smp.h>
James Morse8ec058f2016-08-17 13:50:26 +010039#include <asm/smp_plat.h>
James Morse82869ac2016-04-27 17:47:12 +010040#include <asm/suspend.h>
Mark Rutland0194e762016-08-11 14:11:05 +010041#include <asm/sysreg.h>
James Morse82869ac2016-04-27 17:47:12 +010042#include <asm/virt.h>
43
44/*
45 * Hibernate core relies on this value being 0 on resume, and marks it
46 * __nosavedata assuming it will keep the resume kernel's '0' value. This
47 * doesn't happen with either KASLR.
48 *
49 * defined as "__visible int in_suspend __nosavedata" in
50 * kernel/power/hibernate.c
51 */
52extern int in_suspend;
53
James Morse82869ac2016-04-27 17:47:12 +010054/* Do we need to reset el2? */
55#define el2_reset_needed() (is_hyp_mode_available() && !is_kernel_in_hyp_mode())
56
James Morse82869ac2016-04-27 17:47:12 +010057/* temporary el2 vectors in the __hibernate_exit_text section. */
58extern char hibernate_el2_vectors[];
59
60/* hyp-stub vectors, used to restore el2 during resume from hibernate. */
61extern char __hyp_stub_vectors[];
62
63/*
James Morse8ec058f2016-08-17 13:50:26 +010064 * The logical cpu number we should resume on, initialised to a non-cpu
65 * number.
66 */
67static int sleep_cpu = -EINVAL;
68
69/*
James Morse82869ac2016-04-27 17:47:12 +010070 * Values that may not change over hibernate/resume. We put the build number
71 * and date in here so that we guarantee not to resume with a different
72 * kernel.
73 */
74struct arch_hibernate_hdr_invariants {
75 char uts_version[__NEW_UTS_LEN + 1];
76};
77
78/* These values need to be know across a hibernate/restore. */
79static struct arch_hibernate_hdr {
80 struct arch_hibernate_hdr_invariants invariants;
81
82 /* These are needed to find the relocated kernel if built with kaslr */
83 phys_addr_t ttbr1_el1;
84 void (*reenter_kernel)(void);
85
86 /*
87 * We need to know where the __hyp_stub_vectors are after restore to
88 * re-configure el2.
89 */
90 phys_addr_t __hyp_stub_vectors;
James Morse8ec058f2016-08-17 13:50:26 +010091
92 u64 sleep_cpu_mpidr;
James Morse82869ac2016-04-27 17:47:12 +010093} resume_hdr;
94
95static inline void arch_hdr_invariants(struct arch_hibernate_hdr_invariants *i)
96{
97 memset(i, 0, sizeof(*i));
98 memcpy(i->uts_version, init_utsname()->version, sizeof(i->uts_version));
99}
100
101int pfn_is_nosave(unsigned long pfn)
102{
Laura Abbott2077be62017-01-10 13:35:49 -0800103 unsigned long nosave_begin_pfn = sym_to_pfn(&__nosave_begin);
104 unsigned long nosave_end_pfn = sym_to_pfn(&__nosave_end - 1);
James Morse82869ac2016-04-27 17:47:12 +0100105
AKASHI Takahiro254a41c2017-04-03 11:24:35 +0900106 return ((pfn >= nosave_begin_pfn) && (pfn <= nosave_end_pfn)) ||
107 crash_is_nosave(pfn);
James Morse82869ac2016-04-27 17:47:12 +0100108}
109
110void notrace save_processor_state(void)
111{
112 WARN_ON(num_online_cpus() != 1);
113}
114
115void notrace restore_processor_state(void)
116{
117}
118
119int arch_hibernation_header_save(void *addr, unsigned int max_size)
120{
121 struct arch_hibernate_hdr *hdr = addr;
122
123 if (max_size < sizeof(*hdr))
124 return -EOVERFLOW;
125
126 arch_hdr_invariants(&hdr->invariants);
Laura Abbott2077be62017-01-10 13:35:49 -0800127 hdr->ttbr1_el1 = __pa_symbol(swapper_pg_dir);
James Morse82869ac2016-04-27 17:47:12 +0100128 hdr->reenter_kernel = _cpu_resume;
129
130 /* We can't use __hyp_get_vectors() because kvm may still be loaded */
131 if (el2_reset_needed())
Laura Abbott2077be62017-01-10 13:35:49 -0800132 hdr->__hyp_stub_vectors = __pa_symbol(__hyp_stub_vectors);
James Morse82869ac2016-04-27 17:47:12 +0100133 else
134 hdr->__hyp_stub_vectors = 0;
135
James Morse8ec058f2016-08-17 13:50:26 +0100136 /* Save the mpidr of the cpu we called cpu_suspend() on... */
137 if (sleep_cpu < 0) {
Masanari Iida9165dab2016-09-17 23:44:17 +0900138 pr_err("Failing to hibernate on an unknown CPU.\n");
James Morse8ec058f2016-08-17 13:50:26 +0100139 return -ENODEV;
140 }
141 hdr->sleep_cpu_mpidr = cpu_logical_map(sleep_cpu);
142 pr_info("Hibernating on CPU %d [mpidr:0x%llx]\n", sleep_cpu,
143 hdr->sleep_cpu_mpidr);
144
James Morse82869ac2016-04-27 17:47:12 +0100145 return 0;
146}
147EXPORT_SYMBOL(arch_hibernation_header_save);
148
149int arch_hibernation_header_restore(void *addr)
150{
James Morse8ec058f2016-08-17 13:50:26 +0100151 int ret;
James Morse82869ac2016-04-27 17:47:12 +0100152 struct arch_hibernate_hdr_invariants invariants;
153 struct arch_hibernate_hdr *hdr = addr;
154
155 arch_hdr_invariants(&invariants);
156 if (memcmp(&hdr->invariants, &invariants, sizeof(invariants))) {
157 pr_crit("Hibernate image not generated by this kernel!\n");
158 return -EINVAL;
159 }
160
James Morse8ec058f2016-08-17 13:50:26 +0100161 sleep_cpu = get_logical_index(hdr->sleep_cpu_mpidr);
162 pr_info("Hibernated on CPU %d [mpidr:0x%llx]\n", sleep_cpu,
163 hdr->sleep_cpu_mpidr);
164 if (sleep_cpu < 0) {
165 pr_crit("Hibernated on a CPU not known to this kernel!\n");
166 sleep_cpu = -EINVAL;
167 return -EINVAL;
168 }
169 if (!cpu_online(sleep_cpu)) {
170 pr_info("Hibernated on a CPU that is offline! Bringing CPU up.\n");
171 ret = cpu_up(sleep_cpu);
172 if (ret) {
173 pr_err("Failed to bring hibernate-CPU up!\n");
174 sleep_cpu = -EINVAL;
175 return ret;
176 }
177 }
178
James Morse82869ac2016-04-27 17:47:12 +0100179 resume_hdr = *hdr;
180
181 return 0;
182}
183EXPORT_SYMBOL(arch_hibernation_header_restore);
184
Pavel Tatashina2c2e672019-12-04 10:59:23 -0500185static int trans_pgd_map_page(pgd_t *trans_pgd, void *page,
186 unsigned long dst_addr,
187 pgprot_t pgprot)
James Morse82869ac2016-04-27 17:47:12 +0100188{
Will Deacon20a004e2018-02-15 11:14:56 +0000189 pgd_t *pgdp;
190 pud_t *pudp;
191 pmd_t *pmdp;
192 pte_t *ptep;
James Morse82869ac2016-04-27 17:47:12 +0100193
Pavel Tatashin8c551f92019-10-14 10:48:24 -0400194 pgdp = pgd_offset_raw(trans_pgd, dst_addr);
Will Deacon20a004e2018-02-15 11:14:56 +0000195 if (pgd_none(READ_ONCE(*pgdp))) {
Pavel Tatashin051a7a92019-12-04 10:59:19 -0500196 pudp = (void *)get_safe_page(GFP_ATOMIC);
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500197 if (!pudp)
198 return -ENOMEM;
Will Deacon20a004e2018-02-15 11:14:56 +0000199 pgd_populate(&init_mm, pgdp, pudp);
James Morse82869ac2016-04-27 17:47:12 +0100200 }
201
Will Deacon20a004e2018-02-15 11:14:56 +0000202 pudp = pud_offset(pgdp, dst_addr);
203 if (pud_none(READ_ONCE(*pudp))) {
Pavel Tatashin051a7a92019-12-04 10:59:19 -0500204 pmdp = (void *)get_safe_page(GFP_ATOMIC);
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500205 if (!pmdp)
206 return -ENOMEM;
Will Deacon20a004e2018-02-15 11:14:56 +0000207 pud_populate(&init_mm, pudp, pmdp);
James Morse82869ac2016-04-27 17:47:12 +0100208 }
209
Will Deacon20a004e2018-02-15 11:14:56 +0000210 pmdp = pmd_offset(pudp, dst_addr);
211 if (pmd_none(READ_ONCE(*pmdp))) {
Pavel Tatashin051a7a92019-12-04 10:59:19 -0500212 ptep = (void *)get_safe_page(GFP_ATOMIC);
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500213 if (!ptep)
214 return -ENOMEM;
Will Deacon20a004e2018-02-15 11:14:56 +0000215 pmd_populate_kernel(&init_mm, pmdp, ptep);
James Morse82869ac2016-04-27 17:47:12 +0100216 }
217
Will Deacon20a004e2018-02-15 11:14:56 +0000218 ptep = pte_offset_kernel(pmdp, dst_addr);
Pavel Tatashin13373f02019-12-04 10:59:21 -0500219 set_pte(ptep, pfn_pte(virt_to_pfn(page), PAGE_KERNEL_EXEC));
James Morse82869ac2016-04-27 17:47:12 +0100220
Pavel Tatashina2c2e672019-12-04 10:59:23 -0500221 return 0;
222}
223
224/*
225 * Copies length bytes, starting at src_start into an new page,
226 * perform cache maintenance, then maps it at the specified address low
227 * address as executable.
228 *
229 * This is used by hibernate to copy the code it needs to execute when
230 * overwriting the kernel text. This function generates a new set of page
231 * tables, which it loads into ttbr0.
232 *
233 * Length is provided as we probably only want 4K of data, even on a 64K
234 * page system.
235 */
236static int create_safe_exec_page(void *src_start, size_t length,
237 unsigned long dst_addr,
238 phys_addr_t *phys_dst_addr)
239{
240 void *page = (void *)get_safe_page(GFP_ATOMIC);
241 pgd_t *trans_pgd;
242 int rc;
243
244 if (!page)
245 return -ENOMEM;
246
247 memcpy(page, src_start, length);
248 __flush_icache_range((unsigned long)page, (unsigned long)page + length);
249
250 trans_pgd = (void *)get_safe_page(GFP_ATOMIC);
251 if (!trans_pgd)
252 return -ENOMEM;
253
254 rc = trans_pgd_map_page(trans_pgd, page, dst_addr,
255 PAGE_KERNEL_EXEC);
256 if (rc)
257 return rc;
258
Mark Rutland0194e762016-08-11 14:11:05 +0100259 /*
260 * Load our new page tables. A strict BBM approach requires that we
261 * ensure that TLBs are free of any entries that may overlap with the
262 * global mappings we are about to install.
263 *
264 * For a real hibernate/resume cycle TTBR0 currently points to a zero
265 * page, but TLBs may contain stale ASID-tagged entries (e.g. for EFI
266 * runtime services), while for a userspace-driven test_resume cycle it
267 * points to userspace page tables (and we must point it at a zero page
268 * ourselves). Elsewhere we only (un)install the idmap with preemption
269 * disabled, so T0SZ should be as required regardless.
270 */
271 cpu_set_reserved_ttbr0();
272 local_flush_tlb_all();
Pavel Tatashind2343322019-12-04 10:59:18 -0500273 write_sysreg(phys_to_ttbr(virt_to_phys(trans_pgd)), ttbr0_el1);
Mark Rutland0194e762016-08-11 14:11:05 +0100274 isb();
James Morse82869ac2016-04-27 17:47:12 +0100275
Pavel Tatashin13373f02019-12-04 10:59:21 -0500276 *phys_dst_addr = virt_to_phys(page);
James Morse82869ac2016-04-27 17:47:12 +0100277
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500278 return 0;
James Morse82869ac2016-04-27 17:47:12 +0100279}
280
James Morse5ebe3a42016-08-24 18:27:30 +0100281#define dcache_clean_range(start, end) __flush_dcache_area(start, (end - start))
James Morse82869ac2016-04-27 17:47:12 +0100282
283int swsusp_arch_suspend(void)
284{
285 int ret = 0;
286 unsigned long flags;
287 struct sleep_stack_data state;
288
James Morsed74b4e42016-06-22 10:06:13 +0100289 if (cpus_are_stuck_in_kernel()) {
290 pr_err("Can't hibernate: no mechanism to offline secondary CPUs.\n");
291 return -EBUSY;
292 }
293
James Morse0fbeb312017-11-02 12:12:34 +0000294 flags = local_daif_save();
James Morse82869ac2016-04-27 17:47:12 +0100295
296 if (__cpu_suspend_enter(&state)) {
AKASHI Takahiro254a41c2017-04-03 11:24:35 +0900297 /* make the crash dump kernel image visible/saveable */
298 crash_prepare_suspend();
299
James Morse8ec058f2016-08-17 13:50:26 +0100300 sleep_cpu = smp_processor_id();
James Morse82869ac2016-04-27 17:47:12 +0100301 ret = swsusp_save();
302 } else {
James Morse5ebe3a42016-08-24 18:27:30 +0100303 /* Clean kernel core startup/idle code to PoC*/
304 dcache_clean_range(__mmuoff_data_start, __mmuoff_data_end);
305 dcache_clean_range(__idmap_text_start, __idmap_text_end);
306
307 /* Clean kvm setup code to PoC? */
James Morsef7daa9c2019-01-24 16:32:57 +0000308 if (el2_reset_needed()) {
James Morse5ebe3a42016-08-24 18:27:30 +0100309 dcache_clean_range(__hyp_idmap_text_start, __hyp_idmap_text_end);
James Morsef7daa9c2019-01-24 16:32:57 +0000310 dcache_clean_range(__hyp_text_start, __hyp_text_end);
311 }
James Morse82869ac2016-04-27 17:47:12 +0100312
AKASHI Takahiro254a41c2017-04-03 11:24:35 +0900313 /* make the crash dump kernel image protected again */
314 crash_post_resume();
315
James Morse82869ac2016-04-27 17:47:12 +0100316 /*
317 * Tell the hibernation core that we've just restored
318 * the memory
319 */
320 in_suspend = 0;
321
James Morse8ec058f2016-08-17 13:50:26 +0100322 sleep_cpu = -EINVAL;
James Morse82869ac2016-04-27 17:47:12 +0100323 __cpu_suspend_exit();
Marc Zyngier647d0512018-05-29 13:11:12 +0100324
325 /*
326 * Just in case the boot kernel did turn the SSBD
327 * mitigation off behind our back, let's set the state
328 * to what we expect it to be.
329 */
330 switch (arm64_get_ssbd_state()) {
331 case ARM64_SSBD_FORCE_ENABLE:
332 case ARM64_SSBD_KERNEL:
333 arm64_set_ssbd_mitigation(true);
334 }
James Morse82869ac2016-04-27 17:47:12 +0100335 }
336
James Morse0fbeb312017-11-02 12:12:34 +0000337 local_daif_restore(flags);
James Morse82869ac2016-04-27 17:47:12 +0100338
339 return ret;
340}
341
Will Deacon20a004e2018-02-15 11:14:56 +0000342static void _copy_pte(pte_t *dst_ptep, pte_t *src_ptep, unsigned long addr)
James Morse5ebe3a42016-08-24 18:27:30 +0100343{
Will Deacon20a004e2018-02-15 11:14:56 +0000344 pte_t pte = READ_ONCE(*src_ptep);
James Morse5ebe3a42016-08-24 18:27:30 +0100345
346 if (pte_valid(pte)) {
347 /*
348 * Resume will overwrite areas that may be marked
349 * read only (code, rodata). Clear the RDONLY bit from
350 * the temporary mappings we use during restore.
351 */
Will Deacon20a004e2018-02-15 11:14:56 +0000352 set_pte(dst_ptep, pte_mkwrite(pte));
James Morse5ebe3a42016-08-24 18:27:30 +0100353 } else if (debug_pagealloc_enabled() && !pte_none(pte)) {
354 /*
355 * debug_pagealloc will removed the PTE_VALID bit if
356 * the page isn't in use by the resume kernel. It may have
357 * been in use by the original kernel, in which case we need
358 * to put it back in our copy to do the restore.
359 *
360 * Before marking this entry valid, check the pfn should
361 * be mapped.
362 */
363 BUG_ON(!pfn_valid(pte_pfn(pte)));
364
Will Deacon20a004e2018-02-15 11:14:56 +0000365 set_pte(dst_ptep, pte_mkpresent(pte_mkwrite(pte)));
James Morse5ebe3a42016-08-24 18:27:30 +0100366 }
367}
368
Will Deacon20a004e2018-02-15 11:14:56 +0000369static int copy_pte(pmd_t *dst_pmdp, pmd_t *src_pmdp, unsigned long start,
James Morse82869ac2016-04-27 17:47:12 +0100370 unsigned long end)
371{
Will Deacon20a004e2018-02-15 11:14:56 +0000372 pte_t *src_ptep;
373 pte_t *dst_ptep;
James Morse82869ac2016-04-27 17:47:12 +0100374 unsigned long addr = start;
375
Will Deacon20a004e2018-02-15 11:14:56 +0000376 dst_ptep = (pte_t *)get_safe_page(GFP_ATOMIC);
377 if (!dst_ptep)
James Morse82869ac2016-04-27 17:47:12 +0100378 return -ENOMEM;
Will Deacon20a004e2018-02-15 11:14:56 +0000379 pmd_populate_kernel(&init_mm, dst_pmdp, dst_ptep);
380 dst_ptep = pte_offset_kernel(dst_pmdp, start);
James Morse82869ac2016-04-27 17:47:12 +0100381
Will Deacon20a004e2018-02-15 11:14:56 +0000382 src_ptep = pte_offset_kernel(src_pmdp, start);
James Morse82869ac2016-04-27 17:47:12 +0100383 do {
Will Deacon20a004e2018-02-15 11:14:56 +0000384 _copy_pte(dst_ptep, src_ptep, addr);
385 } while (dst_ptep++, src_ptep++, addr += PAGE_SIZE, addr != end);
James Morse82869ac2016-04-27 17:47:12 +0100386
387 return 0;
388}
389
Will Deacon20a004e2018-02-15 11:14:56 +0000390static int copy_pmd(pud_t *dst_pudp, pud_t *src_pudp, unsigned long start,
James Morse82869ac2016-04-27 17:47:12 +0100391 unsigned long end)
392{
Will Deacon20a004e2018-02-15 11:14:56 +0000393 pmd_t *src_pmdp;
394 pmd_t *dst_pmdp;
James Morse82869ac2016-04-27 17:47:12 +0100395 unsigned long next;
396 unsigned long addr = start;
397
Will Deacon20a004e2018-02-15 11:14:56 +0000398 if (pud_none(READ_ONCE(*dst_pudp))) {
399 dst_pmdp = (pmd_t *)get_safe_page(GFP_ATOMIC);
400 if (!dst_pmdp)
James Morse82869ac2016-04-27 17:47:12 +0100401 return -ENOMEM;
Will Deacon20a004e2018-02-15 11:14:56 +0000402 pud_populate(&init_mm, dst_pudp, dst_pmdp);
James Morse82869ac2016-04-27 17:47:12 +0100403 }
Will Deacon20a004e2018-02-15 11:14:56 +0000404 dst_pmdp = pmd_offset(dst_pudp, start);
James Morse82869ac2016-04-27 17:47:12 +0100405
Will Deacon20a004e2018-02-15 11:14:56 +0000406 src_pmdp = pmd_offset(src_pudp, start);
James Morse82869ac2016-04-27 17:47:12 +0100407 do {
Will Deacon20a004e2018-02-15 11:14:56 +0000408 pmd_t pmd = READ_ONCE(*src_pmdp);
409
James Morse82869ac2016-04-27 17:47:12 +0100410 next = pmd_addr_end(addr, end);
Will Deacon20a004e2018-02-15 11:14:56 +0000411 if (pmd_none(pmd))
James Morse82869ac2016-04-27 17:47:12 +0100412 continue;
Will Deacon20a004e2018-02-15 11:14:56 +0000413 if (pmd_table(pmd)) {
414 if (copy_pte(dst_pmdp, src_pmdp, addr, next))
James Morse82869ac2016-04-27 17:47:12 +0100415 return -ENOMEM;
416 } else {
Will Deacon20a004e2018-02-15 11:14:56 +0000417 set_pmd(dst_pmdp,
418 __pmd(pmd_val(pmd) & ~PMD_SECT_RDONLY));
James Morse82869ac2016-04-27 17:47:12 +0100419 }
Will Deacon20a004e2018-02-15 11:14:56 +0000420 } while (dst_pmdp++, src_pmdp++, addr = next, addr != end);
James Morse82869ac2016-04-27 17:47:12 +0100421
422 return 0;
423}
424
Will Deacon20a004e2018-02-15 11:14:56 +0000425static int copy_pud(pgd_t *dst_pgdp, pgd_t *src_pgdp, unsigned long start,
James Morse82869ac2016-04-27 17:47:12 +0100426 unsigned long end)
427{
Will Deacon20a004e2018-02-15 11:14:56 +0000428 pud_t *dst_pudp;
429 pud_t *src_pudp;
James Morse82869ac2016-04-27 17:47:12 +0100430 unsigned long next;
431 unsigned long addr = start;
432
Will Deacon20a004e2018-02-15 11:14:56 +0000433 if (pgd_none(READ_ONCE(*dst_pgdp))) {
434 dst_pudp = (pud_t *)get_safe_page(GFP_ATOMIC);
435 if (!dst_pudp)
James Morse82869ac2016-04-27 17:47:12 +0100436 return -ENOMEM;
Will Deacon20a004e2018-02-15 11:14:56 +0000437 pgd_populate(&init_mm, dst_pgdp, dst_pudp);
James Morse82869ac2016-04-27 17:47:12 +0100438 }
Will Deacon20a004e2018-02-15 11:14:56 +0000439 dst_pudp = pud_offset(dst_pgdp, start);
James Morse82869ac2016-04-27 17:47:12 +0100440
Will Deacon20a004e2018-02-15 11:14:56 +0000441 src_pudp = pud_offset(src_pgdp, start);
James Morse82869ac2016-04-27 17:47:12 +0100442 do {
Will Deacon20a004e2018-02-15 11:14:56 +0000443 pud_t pud = READ_ONCE(*src_pudp);
444
James Morse82869ac2016-04-27 17:47:12 +0100445 next = pud_addr_end(addr, end);
Will Deacon20a004e2018-02-15 11:14:56 +0000446 if (pud_none(pud))
James Morse82869ac2016-04-27 17:47:12 +0100447 continue;
Will Deacon20a004e2018-02-15 11:14:56 +0000448 if (pud_table(pud)) {
449 if (copy_pmd(dst_pudp, src_pudp, addr, next))
James Morse82869ac2016-04-27 17:47:12 +0100450 return -ENOMEM;
451 } else {
Will Deacon20a004e2018-02-15 11:14:56 +0000452 set_pud(dst_pudp,
Pavel Tatashin7ea40882019-12-04 10:59:22 -0500453 __pud(pud_val(pud) & ~PUD_SECT_RDONLY));
James Morse82869ac2016-04-27 17:47:12 +0100454 }
Will Deacon20a004e2018-02-15 11:14:56 +0000455 } while (dst_pudp++, src_pudp++, addr = next, addr != end);
James Morse82869ac2016-04-27 17:47:12 +0100456
457 return 0;
458}
459
Will Deacon20a004e2018-02-15 11:14:56 +0000460static int copy_page_tables(pgd_t *dst_pgdp, unsigned long start,
James Morse82869ac2016-04-27 17:47:12 +0100461 unsigned long end)
462{
463 unsigned long next;
464 unsigned long addr = start;
Will Deacon20a004e2018-02-15 11:14:56 +0000465 pgd_t *src_pgdp = pgd_offset_k(start);
James Morse82869ac2016-04-27 17:47:12 +0100466
Will Deacon20a004e2018-02-15 11:14:56 +0000467 dst_pgdp = pgd_offset_raw(dst_pgdp, start);
James Morse82869ac2016-04-27 17:47:12 +0100468 do {
469 next = pgd_addr_end(addr, end);
Will Deacon20a004e2018-02-15 11:14:56 +0000470 if (pgd_none(READ_ONCE(*src_pgdp)))
James Morse82869ac2016-04-27 17:47:12 +0100471 continue;
Will Deacon20a004e2018-02-15 11:14:56 +0000472 if (copy_pud(dst_pgdp, src_pgdp, addr, next))
James Morse82869ac2016-04-27 17:47:12 +0100473 return -ENOMEM;
Will Deacon20a004e2018-02-15 11:14:56 +0000474 } while (dst_pgdp++, src_pgdp++, addr = next, addr != end);
James Morse82869ac2016-04-27 17:47:12 +0100475
476 return 0;
477}
478
Pavel Tatashina2c2e672019-12-04 10:59:23 -0500479static int trans_pgd_create_copy(pgd_t **dst_pgdp, unsigned long start,
480 unsigned long end)
481{
482 int rc;
483 pgd_t *trans_pgd = (pgd_t *)get_safe_page(GFP_ATOMIC);
484
485 if (!trans_pgd) {
486 pr_err("Failed to allocate memory for temporary page tables.\n");
487 return -ENOMEM;
488 }
489
490 rc = copy_page_tables(trans_pgd, start, end);
491 if (!rc)
492 *dst_pgdp = trans_pgd;
493
494 return rc;
495}
496
James Morse82869ac2016-04-27 17:47:12 +0100497/*
498 * Setup then Resume from the hibernate image using swsusp_arch_suspend_exit().
499 *
500 * Memory allocated by get_safe_page() will be dealt with by the hibernate code,
501 * we don't need to free it here.
502 */
503int swsusp_arch_resume(void)
504{
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500505 int rc;
James Morse82869ac2016-04-27 17:47:12 +0100506 void *zero_page;
507 size_t exit_size;
508 pgd_t *tmp_pg_dir;
James Morse82869ac2016-04-27 17:47:12 +0100509 phys_addr_t phys_hibernate_exit;
510 void __noreturn (*hibernate_exit)(phys_addr_t, phys_addr_t, void *,
511 void *, phys_addr_t, phys_addr_t);
512
513 /*
Mark Rutlanddfbca612016-08-11 14:11:06 +0100514 * Restoring the memory image will overwrite the ttbr1 page tables.
515 * Create a second copy of just the linear map, and use this when
516 * restoring.
517 */
Pavel Tatashina2c2e672019-12-04 10:59:23 -0500518 rc = trans_pgd_create_copy(&tmp_pg_dir, PAGE_OFFSET, PAGE_END);
Mark Rutlanddfbca612016-08-11 14:11:06 +0100519 if (rc)
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500520 return rc;
Mark Rutlanddfbca612016-08-11 14:11:06 +0100521
522 /*
Mark Rutlanddfbca612016-08-11 14:11:06 +0100523 * We need a zero page that is zero before & after resume in order to
524 * to break before make on the ttbr1 page tables.
525 */
526 zero_page = (void *)get_safe_page(GFP_ATOMIC);
527 if (!zero_page) {
Mark Rutland117f5722017-01-09 14:13:36 +0000528 pr_err("Failed to allocate zero page.\n");
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500529 return -ENOMEM;
Mark Rutlanddfbca612016-08-11 14:11:06 +0100530 }
531
532 /*
James Morse82869ac2016-04-27 17:47:12 +0100533 * Locate the exit code in the bottom-but-one page, so that *NULL
534 * still has disastrous affects.
535 */
536 hibernate_exit = (void *)PAGE_SIZE;
537 exit_size = __hibernate_exit_text_end - __hibernate_exit_text_start;
538 /*
539 * Copy swsusp_arch_suspend_exit() to a safe page. This will generate
540 * a new set of ttbr0 page tables and load them.
541 */
542 rc = create_safe_exec_page(__hibernate_exit_text_start, exit_size,
543 (unsigned long)hibernate_exit,
Pavel Tatashin051a7a92019-12-04 10:59:19 -0500544 &phys_hibernate_exit);
James Morse82869ac2016-04-27 17:47:12 +0100545 if (rc) {
Mark Rutland117f5722017-01-09 14:13:36 +0000546 pr_err("Failed to create safe executable page for hibernate_exit code.\n");
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500547 return rc;
James Morse82869ac2016-04-27 17:47:12 +0100548 }
549
550 /*
551 * The hibernate exit text contains a set of el2 vectors, that will
552 * be executed at el2 with the mmu off in order to reload hyp-stub.
553 */
554 __flush_dcache_area(hibernate_exit, exit_size);
555
556 /*
James Morse82869ac2016-04-27 17:47:12 +0100557 * KASLR will cause the el2 vectors to be in a different location in
558 * the resumed kernel. Load hibernate's temporary copy into el2.
559 *
560 * We can skip this step if we booted at EL1, or are running with VHE.
561 */
562 if (el2_reset_needed()) {
563 phys_addr_t el2_vectors = phys_hibernate_exit; /* base */
564 el2_vectors += hibernate_el2_vectors -
565 __hibernate_exit_text_start; /* offset */
566
567 __hyp_set_vectors(el2_vectors);
568 }
569
James Morse82869ac2016-04-27 17:47:12 +0100570 hibernate_exit(virt_to_phys(tmp_pg_dir), resume_hdr.ttbr1_el1,
Laura Abbott2077be62017-01-10 13:35:49 -0800571 resume_hdr.reenter_kernel, restore_pblist,
James Morse82869ac2016-04-27 17:47:12 +0100572 resume_hdr.__hyp_stub_vectors, virt_to_phys(zero_page));
573
Pavel Tatashina89d7ff2019-12-04 10:59:20 -0500574 return 0;
James Morse82869ac2016-04-27 17:47:12 +0100575}
James Morse1fe492c2016-04-27 17:47:13 +0100576
James Morse8ec058f2016-08-17 13:50:26 +0100577int hibernate_resume_nonboot_cpu_disable(void)
578{
579 if (sleep_cpu < 0) {
Masanari Iida9165dab2016-09-17 23:44:17 +0900580 pr_err("Failing to resume from hibernate on an unknown CPU.\n");
James Morse8ec058f2016-08-17 13:50:26 +0100581 return -ENODEV;
582 }
583
584 return freeze_secondary_cpus(sleep_cpu);
585}