blob: 4c1e700840b6ced5a0b2f868bfb4f37dddc8abc0 [file] [log] [blame]
Marc Zyngierf27bb132012-03-05 11:49:33 +00001/*
2 * Copyright (C) 2012 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/linkage.h>
18#include <linux/const.h>
19#include <asm/assembler.h>
20#include <asm/page.h>
Andrew Pinski60e0a092016-02-02 12:46:26 +000021#include <asm/cpufeature.h>
22#include <asm/alternative.h>
Marc Zyngierf27bb132012-03-05 11:49:33 +000023
24/*
25 * Copy a page from src to dest (both are page aligned)
26 *
27 * Parameters:
28 * x0 - dest
29 * x1 - src
30 */
31ENTRY(copy_page)
Andrew Pinski60e0a092016-02-02 12:46:26 +000032alternative_if_not ARM64_HAS_NO_HW_PREFETCH
33 nop
34 nop
35alternative_else
36 # Prefetch two cache lines ahead.
37 prfm pldl1strm, [x1, #128]
38 prfm pldl1strm, [x1, #256]
39alternative_endif
40
Will Deacon223e23e2016-02-02 12:46:25 +000041 ldp x2, x3, [x1]
Marc Zyngierf27bb132012-03-05 11:49:33 +000042 ldp x4, x5, [x1, #16]
43 ldp x6, x7, [x1, #32]
44 ldp x8, x9, [x1, #48]
Will Deacon223e23e2016-02-02 12:46:25 +000045 ldp x10, x11, [x1, #64]
46 ldp x12, x13, [x1, #80]
47 ldp x14, x15, [x1, #96]
48 ldp x16, x17, [x1, #112]
49
50 mov x18, #(PAGE_SIZE - 128)
51 add x1, x1, #128
521:
53 subs x18, x18, #128
54
Andrew Pinski60e0a092016-02-02 12:46:26 +000055alternative_if_not ARM64_HAS_NO_HW_PREFETCH
56 nop
57alternative_else
58 prfm pldl1strm, [x1, #384]
59alternative_endif
60
Will Deacon223e23e2016-02-02 12:46:25 +000061 stnp x2, x3, [x0]
62 ldp x2, x3, [x1]
63 stnp x4, x5, [x0, #16]
64 ldp x4, x5, [x1, #16]
65 stnp x6, x7, [x0, #32]
66 ldp x6, x7, [x1, #32]
67 stnp x8, x9, [x0, #48]
68 ldp x8, x9, [x1, #48]
69 stnp x10, x11, [x0, #64]
70 ldp x10, x11, [x1, #64]
71 stnp x12, x13, [x0, #80]
72 ldp x12, x13, [x1, #80]
73 stnp x14, x15, [x0, #96]
74 ldp x14, x15, [x1, #96]
75 stnp x16, x17, [x0, #112]
76 ldp x16, x17, [x1, #112]
77
78 add x0, x0, #128
79 add x1, x1, #128
80
81 b.gt 1b
82
Marc Zyngierf27bb132012-03-05 11:49:33 +000083 stnp x2, x3, [x0]
84 stnp x4, x5, [x0, #16]
85 stnp x6, x7, [x0, #32]
86 stnp x8, x9, [x0, #48]
Will Deacon223e23e2016-02-02 12:46:25 +000087 stnp x10, x11, [x0, #64]
88 stnp x12, x13, [x0, #80]
89 stnp x14, x15, [x0, #96]
90 stnp x16, x17, [x0, #112]
91
Marc Zyngierf27bb132012-03-05 11:49:33 +000092 ret
93ENDPROC(copy_page)