blob: e4ba43bdf85d9756123e13bd105b1024ef42a240 [file] [log] [blame]
Jürgen Schindele326764a2006-06-29 16:01:43 +01001/*
2 * linux/arch/arm/mach-pxa/trizeps4.c
3 *
4 * Support for the Keith und Koep Trizeps4 Module Platform.
5 *
6 * Author: Jürgen Schindele
7 * Created: 20 02, 2006
8 * Copyright: Jürgen Schindele
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/sysdev.h>
19#include <linux/interrupt.h>
20#include <linux/sched.h>
21#include <linux/bitops.h>
22#include <linux/fb.h>
23#include <linux/ioport.h>
24#include <linux/delay.h>
25#include <linux/serial_8250.h>
26#include <linux/mtd/mtd.h>
Jürgen Schindelec9184f52007-05-07 19:48:44 +010027#include <linux/mtd/physmap.h>
Jürgen Schindele326764a2006-06-29 16:01:43 +010028#include <linux/mtd/partitions.h>
29
30#include <asm/types.h>
31#include <asm/setup.h>
32#include <asm/memory.h>
33#include <asm/mach-types.h>
34#include <asm/hardware.h>
35#include <asm/irq.h>
36#include <asm/sizes.h>
37
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41#include <asm/mach/flash.h>
42
43#include <asm/arch/pxa-regs.h>
44#include <asm/arch/trizeps4.h>
45#include <asm/arch/audio.h>
46#include <asm/arch/pxafb.h>
47#include <asm/arch/mmc.h>
48#include <asm/arch/irda.h>
49#include <asm/arch/ohci.h>
50
51#include "generic.h"
Russell King46c41e62007-05-15 15:39:36 +010052#include "devices.h"
Jürgen Schindele326764a2006-06-29 16:01:43 +010053
54/********************************************************************************************
55 * ONBOARD FLASH
56 ********************************************************************************************/
57static struct mtd_partition trizeps4_partitions[] = {
58 {
59 .name = "Bootloader",
Jürgen Schindelec9184f52007-05-07 19:48:44 +010060 .offset = 0x00000000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010061 .size = 0x00040000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010062 .mask_flags = MTD_WRITEABLE /* force read-only */
63 },{
Jürgen Schindelec9184f52007-05-07 19:48:44 +010064 .name = "Backup",
65 .offset = 0x00040000,
66 .size = 0x00040000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010067 },{
Jürgen Schindelec9184f52007-05-07 19:48:44 +010068 .name = "Image",
69 .offset = 0x00080000,
70 .size = 0x01080000,
71 },{
72 .name = "IPSM",
73 .offset = 0x01100000,
74 .size = 0x00e00000,
75 },{
76 .name = "Registry",
77 .offset = 0x01f00000,
Jürgen Schindele326764a2006-06-29 16:01:43 +010078 .size = MTDPART_SIZ_FULL,
Jürgen Schindele326764a2006-06-29 16:01:43 +010079 }
80};
81
Jürgen Schindelec9184f52007-05-07 19:48:44 +010082static struct physmap_flash_data trizeps4_flash_data[] = {
Jürgen Schindele326764a2006-06-29 16:01:43 +010083 {
Jürgen Schindelec9184f52007-05-07 19:48:44 +010084 .width = 4, /* bankwidth in bytes */
Jürgen Schindele326764a2006-06-29 16:01:43 +010085 .parts = trizeps4_partitions,
86 .nr_parts = ARRAY_SIZE(trizeps4_partitions)
87 }
88};
89
90static struct resource flash_resource = {
91 .start = PXA_CS0_PHYS,
Jürgen Schindelec9184f52007-05-07 19:48:44 +010092 .end = PXA_CS0_PHYS + SZ_32M - 1,
Jürgen Schindele326764a2006-06-29 16:01:43 +010093 .flags = IORESOURCE_MEM,
94};
95
96static struct platform_device flash_device = {
Jürgen Schindelec9184f52007-05-07 19:48:44 +010097 .name = "physmap-flash",
Jürgen Schindele326764a2006-06-29 16:01:43 +010098 .id = 0,
99 .dev = {
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100100 .platform_data = trizeps4_flash_data,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100101 },
102 .resource = &flash_resource,
103 .num_resources = 1,
104};
105
106/********************************************************************************************
107 * DAVICOM DM9000 Ethernet
108 ********************************************************************************************/
109static struct resource dm9000_resources[] = {
110 [0] = {
111 .start = TRIZEPS4_ETH_PHYS+0x300,
112 .end = TRIZEPS4_ETH_PHYS+0x400-1,
113 .flags = IORESOURCE_MEM,
114 },
115 [1] = {
116 .start = TRIZEPS4_ETH_PHYS+0x8300,
117 .end = TRIZEPS4_ETH_PHYS+0x8400-1,
118 .flags = IORESOURCE_MEM,
119 },
120 [2] = {
121 .start = TRIZEPS4_ETH_IRQ,
122 .end = TRIZEPS4_ETH_IRQ,
123 .flags = (IORESOURCE_IRQ | IRQT_RISING),
124 },
125};
126
127static struct platform_device dm9000_device = {
128 .name = "dm9000",
129 .id = -1,
130 .num_resources = ARRAY_SIZE(dm9000_resources),
131 .resource = dm9000_resources,
132};
133
134/********************************************************************************************
135 * PXA270 serial ports
136 ********************************************************************************************/
137static struct plat_serial8250_port tri_serial_ports[] = {
138#ifdef CONFIG_SERIAL_PXA
139 /* this uses the own PXA driver */
140 {
141 0,
142 },
143#else
144 /* this uses the generic 8520 driver */
145 [0] = {
146 .membase = (void *)&FFUART,
147 .irq = IRQ_FFUART,
148 .flags = UPF_BOOT_AUTOCONF,
149 .iotype = UPIO_MEM32,
150 .regshift = 2,
151 .uartclk = (921600*16),
152 },
153 [1] = {
154 .membase = (void *)&BTUART,
155 .irq = IRQ_BTUART,
156 .flags = UPF_BOOT_AUTOCONF,
157 .iotype = UPIO_MEM32,
158 .regshift = 2,
159 .uartclk = (921600*16),
160 },
161 {
162 0,
163 },
164#endif
165};
166
167static struct platform_device uart_devices = {
168 .name = "serial8250",
169 .id = 0,
170 .dev = {
171 .platform_data = tri_serial_ports,
172 },
173 .num_resources = 0,
174 .resource = NULL,
175};
176
177/********************************************************************************************
178 * PXA270 ac97 sound codec
179 ********************************************************************************************/
180static struct platform_device ac97_audio_device = {
181 .name = "pxa2xx-ac97",
182 .id = -1,
183};
184
185static struct platform_device * trizeps4_devices[] __initdata = {
186 &flash_device,
187 &uart_devices,
188 &dm9000_device,
189 &ac97_audio_device,
190};
191
192#ifdef CONFIG_MACH_TRIZEPS4_CONXS
193static short trizeps_conxs_bcr;
194
195/* PCCARD power switching supports only 3,3V */
196void board_pcmcia_power(int power)
197{
198 if (power) {
199 /* switch power on, put in reset and enable buffers */
200 trizeps_conxs_bcr |= power;
201 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
202 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
203 ConXS_BCR = trizeps_conxs_bcr;
204 /* wait a little */
205 udelay(2000);
206 /* take reset away */
207 trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
208 ConXS_BCR = trizeps_conxs_bcr;
209 udelay(2000);
210 } else {
211 /* put in reset */
212 trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
213 ConXS_BCR = trizeps_conxs_bcr;
214 udelay(1000);
215 /* switch power off */
216 trizeps_conxs_bcr &= ~(0xf);
217 ConXS_BCR = trizeps_conxs_bcr;
218
219 }
220 pr_debug("%s: o%s 0x%x\n", __FUNCTION__, power ? "n": "ff", trizeps_conxs_bcr);
221}
222
223/* backlight power switching for LCD panel */
224static void board_backlight_power(int on)
225{
226 if (on) {
227 trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
228 } else {
229 trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
230 }
231 pr_debug("%s: o%s 0x%x\n", __FUNCTION__, on ? "n" : "ff", trizeps_conxs_bcr);
232 ConXS_BCR = trizeps_conxs_bcr;
233}
234
235/* Powersupply for MMC/SD cardslot */
236static void board_mci_power(struct device *dev, unsigned int vdd)
237{
238 struct pxamci_platform_data* p_d = dev->platform_data;
239
240 if (( 1 << vdd) & p_d->ocr_mask) {
241 pr_debug("%s: on\n", __FUNCTION__);
242 /* FIXME fill in values here */
243 } else {
244 pr_debug("%s: off\n", __FUNCTION__);
245 /* FIXME fill in values here */
246 }
247}
248
249static short trizeps_conxs_ircr;
250
251/* Switch modes and Power for IRDA receiver */
252static void board_irda_mode(struct device *dev, int mode)
253{
254 unsigned long flags;
255
256 local_irq_save(flags);
257 if (mode & IR_SIRMODE) {
258 /* Slow mode */
259 trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
260 } else if (mode & IR_FIRMODE) {
261 /* Fast mode */
262 trizeps_conxs_ircr |= ConXS_IRCR_MODE;
263 }
264 if (mode & IR_OFF) {
265 trizeps_conxs_ircr |= ConXS_IRCR_SD;
266 } else {
267 trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
268 }
269 /* FIXME write values to register */
270 local_irq_restore(flags);
271}
272
273#else
274/* for other baseboards define dummies */
275void board_pcmcia_power(int power) {;}
276#define board_backlight_power NULL
277#define board_mci_power NULL
278#define board_irda_mode NULL
279
280#endif /* CONFIG_MACH_TRIZEPS4_CONXS */
281EXPORT_SYMBOL(board_pcmcia_power);
282
David Howells40220c12006-10-09 12:19:47 +0100283static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
Jürgen Schindele326764a2006-06-29 16:01:43 +0100284{
285 int err;
286 /* setup GPIO for PXA27x MMC controller */
287 pxa_gpio_mode(GPIO32_MMCCLK_MD);
288 pxa_gpio_mode(GPIO112_MMCCMD_MD);
289 pxa_gpio_mode(GPIO92_MMCDAT0_MD);
290 pxa_gpio_mode(GPIO109_MMCDAT1_MD);
291 pxa_gpio_mode(GPIO110_MMCDAT2_MD);
292 pxa_gpio_mode(GPIO111_MMCDAT3_MD);
293
294 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
295
Thomas Gleixner52e405e2006-07-03 02:20:05 +0200296 err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
297 IRQF_DISABLED | IRQF_TRIGGER_RISING,
298 "MMC card detect", data);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100299 if (err) {
300 printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
301 return -1;
302 }
303 return 0;
304}
305
306static void trizeps4_mci_exit(struct device *dev, void *data)
307{
308 free_irq(TRIZEPS4_MMC_IRQ, data);
309}
310
311static struct pxamci_platform_data trizeps4_mci_platform_data = {
312 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
313 .init = trizeps4_mci_init,
314 .exit = trizeps4_mci_exit,
315 .setpower = board_mci_power,
316};
317
318static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
319 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
320 .transceiver_mode = board_irda_mode,
321};
322
323static int trizeps4_ohci_init(struct device *dev)
324{
325 /* setup Port1 GPIO pin. */
326 pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
327 pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
328
329 /* Set the Power Control Polarity Low and Power Sense
330 Polarity Low to active low. */
331 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
332 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
333
334 return 0;
335}
336
337static void trizeps4_ohci_exit(struct device *dev)
338{
339 ;
340}
341
342static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
343 .port_mode = PMM_PERPORT_MODE,
344 .init = trizeps4_ohci_init,
345 .exit = trizeps4_ohci_exit,
346};
347
348static struct map_desc trizeps4_io_desc[] __initdata = {
349 { /* ConXS CFSR */
350 .virtual = TRIZEPS4_CFSR_VIRT,
351 .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
352 .length = 0x00001000,
353 .type = MT_DEVICE
354 },
355 { /* ConXS BCR */
356 .virtual = TRIZEPS4_BOCR_VIRT,
357 .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
358 .length = 0x00001000,
359 .type = MT_DEVICE
360 },
361 { /* ConXS IRCR */
362 .virtual = TRIZEPS4_IRCR_VIRT,
363 .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
364 .length = 0x00001000,
365 .type = MT_DEVICE
366 },
367 { /* ConXS DCR */
368 .virtual = TRIZEPS4_DICR_VIRT,
369 .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
370 .length = 0x00001000,
371 .type = MT_DEVICE
372 },
373 { /* ConXS UPSR */
374 .virtual = TRIZEPS4_UPSR_VIRT,
375 .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
376 .length = 0x00001000,
377 .type = MT_DEVICE
378 }
379};
380
Richard Purdied14b2722006-09-20 22:54:21 +0100381static struct pxafb_mode_info sharp_lcd_mode = {
Jürgen Schindele326764a2006-06-29 16:01:43 +0100382 .pixclock = 78000,
383 .xres = 640,
384 .yres = 480,
385 .bpp = 8,
386 .hsync_len = 4,
387 .left_margin = 4,
388 .right_margin = 4,
389 .vsync_len = 2,
390 .upper_margin = 0,
391 .lower_margin = 0,
392 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
393 .cmap_greyscale = 0,
Richard Purdied14b2722006-09-20 22:54:21 +0100394};
395
396static struct pxafb_mach_info sharp_lcd = {
397 .modes = &sharp_lcd_mode,
398 .num_modes = 1,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100399 .cmap_inverse = 0,
400 .cmap_static = 0,
401 .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
402 .lccr3 = 0x0340ff02,
403 .pxafb_backlight_power = board_backlight_power,
404};
405
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100406static struct pxafb_mode_info toshiba_lcd_mode = {
407 .pixclock = 39720,
408 .xres = 640,
409 .yres = 480,
410 .bpp = 8,
411 .hsync_len = 63,
412 .left_margin = 12,
413 .right_margin = 12,
414 .vsync_len = 4,
415 .upper_margin = 32,
416 .lower_margin = 10,
417 .sync = 0,
418 .cmap_greyscale = 0,
419};
420
421static struct pxafb_mach_info toshiba_lcd = {
422 .modes = &toshiba_lcd_mode,
423 .num_modes = 1,
424 .cmap_inverse = 0,
425 .cmap_static = 0,
426 .lccr0 = LCCR0_Color | LCCR0_Act,
427 .lccr3 = 0x03400002,
428 .pxafb_backlight_power = board_backlight_power,
429};
430
Jürgen Schindele326764a2006-06-29 16:01:43 +0100431static void __init trizeps4_init(void)
432{
433 platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
434
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100435/* set_pxa_fb_info(&sharp_lcd); */
436 set_pxa_fb_info(&toshiba_lcd);
Jürgen Schindele326764a2006-06-29 16:01:43 +0100437
438 pxa_set_mci_info(&trizeps4_mci_platform_data);
439 pxa_set_ficp_info(&trizeps4_ficp_platform_data);
440 pxa_set_ohci_info(&trizeps4_ohci_platform_data);
441}
442
443static void __init trizeps4_map_io(void)
444{
445 pxa_map_io();
446 iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
447
448 /* for DiskOnChip */
449 pxa_gpio_mode(GPIO15_nCS_1_MD);
450
451 /* for off-module PIC on ConXS board */
452 pxa_gpio_mode(GPIO_PIC | GPIO_IN);
453
454 /* UCB1400 irq */
455 pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
456
457 /* for DM9000 LAN */
458 pxa_gpio_mode(GPIO78_nCS_2_MD);
459 pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
460
461 /* for PCMCIA device */
462 pxa_gpio_mode(GPIO_PCD | GPIO_IN);
463 pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
464
465 /* for I2C adapter */
466 pxa_gpio_mode(GPIO117_I2CSCL_MD);
467 pxa_gpio_mode(GPIO118_I2CSDA_MD);
468
469 /* MMC_DET s.o. */
470 pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
471
472 /* whats that for ??? */
473 pxa_gpio_mode(GPIO79_nCS_3_MD);
474
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100475#ifdef CONFIG_LEDS
Jürgen Schindele326764a2006-06-29 16:01:43 +0100476 pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
477 pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
Jürgen Schindelec9184f52007-05-07 19:48:44 +0100478#endif
Jürgen Schindele326764a2006-06-29 16:01:43 +0100479#ifdef CONFIG_MACH_TRIZEPS4_CONXS
480#ifdef CONFIG_IDE_PXA_CF
481 /* if boot direct from compact flash dont disable power */
482 trizeps_conxs_bcr = 0x0009;
483#else
484 /* this is the reset value */
485 trizeps_conxs_bcr = 0x00A0;
486#endif
487 ConXS_BCR = trizeps_conxs_bcr;
488#endif
489
490 PWER = 0x00000002;
491 PFER = 0x00000000;
492 PRER = 0x00000002;
493 PGSR0 = 0x0158C000;
494 PGSR1 = 0x00FF0080;
495 PGSR2 = 0x0001C004;
496 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
497 PCFR |= PCFR_OPDE;
498}
499
500MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
501 /* MAINTAINER("Jürgen Schindele") */
502 .phys_io = 0x40000000,
503 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
504 .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100505 .init_machine = trizeps4_init,
506 .map_io = trizeps4_map_io,
Eric Miaocd491042007-06-22 04:14:09 +0100507 .init_irq = pxa27x_init_irq,
Jürgen Schindele326764a2006-06-29 16:01:43 +0100508 .timer = &pxa_timer,
509MACHINE_END
510