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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 527630fbf4f194c5d71e75b2d3cb3d2f406bc5d0 / . / tools / power / x86 / turbostat / turbostat.c
blob: 33b370865d16da6f2d6c966183d39a6cecbeed8d [file] [log] [blame]
Thomas Gleixnera61127c2019-05-29 16:57:49 -0700[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2/*
3 * turbostat -- show CPU frequency and C-state residency
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]4 * on modern Intel and AMD processors.
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]6 * Copyright (c) 2013 Intel Corporation.
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]7 * Len Brown <len.brown@intel.com>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]8 */
9
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]10#define _GNU_SOURCE
Josh Triplettb731f312013-08-20 17:20:12 -0700[diff] [blame]11#include MSRHEADER
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]12#include INTEL_FAMILY_HEADER
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]13#include <stdarg.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]14#include <stdio.h>
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]15#include <err.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]16#include <unistd.h>
17#include <sys/types.h>
18#include <sys/wait.h>
19#include <sys/stat.h>
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]20#include <sys/select.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]21#include <sys/resource.h>
22#include <fcntl.h>
23#include <signal.h>
24#include <sys/time.h>
25#include <stdlib.h>
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]26#include <getopt.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]27#include <dirent.h>
28#include <string.h>
29#include <ctype.h>
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]30#include <sched.h>
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]31#include <time.h>
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]32#include <cpuid.h>
Len Brownfcaa6812020-03-19 23:24:17 -0400[diff] [blame]33#include <sys/capability.h>
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]34#include <errno.h>
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]35#include <math.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]36
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]37char *proc_stat = "/proc/stat";
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]38FILE *outf;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]39int *fd_percpu;
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]40struct timeval interval_tv = {5, 0};
Artem Bityutskiy47936f92017-10-04 15:01:47 +0300[diff] [blame]41struct timespec interval_ts = {5, 0};
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]42unsigned int num_iterations;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]43unsigned int debug;
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]44unsigned int quiet;
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]45unsigned int shown;
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]46unsigned int sums_need_wide_columns;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]47unsigned int rapl_joules;
48unsigned int summary_only;
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]49unsigned int list_header_only;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]50unsigned int dump_only;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]51unsigned int do_snb_cstates;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]52unsigned int do_knl_cstates;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]53unsigned int do_slm_cstates;
54unsigned int use_c1_residency_msr;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]55unsigned int has_aperf;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]56unsigned int has_epb;
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]57unsigned int do_irtl_snb;
58unsigned int do_irtl_hsw;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]59unsigned int units = 1000000; /* MHz etc */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]60unsigned int genuine_intel;
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]61unsigned int authentic_amd;
Pu Wenc1c10cc2019-08-31 10:20:31 +0800[diff] [blame]62unsigned int hygon_genuine;
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]63unsigned int max_level, max_extended_level;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]64unsigned int has_invariant_tsc;
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]65unsigned int do_nhm_platform_info;
Len Browncf4cbe52017-01-01 13:08:33 -0500[diff] [blame]66unsigned int no_MSR_MISC_PWR_MGMT;
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]67unsigned int aperf_mperf_multiplier = 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]68double bclk;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]69double base_hz;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]70unsigned int has_base_hz;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]71double tsc_tweak = 1.0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]72unsigned int show_pkg_only;
73unsigned int show_core_only;
74char *output_buffer, *outp;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]75unsigned int do_rapl;
76unsigned int do_dts;
77unsigned int do_ptm;
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]78unsigned long long gfx_cur_rc6_ms;
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]79unsigned long long cpuidle_cur_cpu_lpi_us;
80unsigned long long cpuidle_cur_sys_lpi_us;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]81unsigned int gfx_cur_mhz;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]82unsigned int tcc_activation_temp;
83unsigned int tcc_activation_temp_override;
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]84double rapl_power_units, rapl_time_units;
85double rapl_dram_energy_units, rapl_energy_units;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]86double rapl_joule_counter_range;
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]87unsigned int do_core_perf_limit_reasons;
Artem Bityutskiyac980e12017-09-05 15:14:08 +0300[diff] [blame]88unsigned int has_automatic_cstate_conversion;
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]89unsigned int do_gfx_perf_limit_reasons;
90unsigned int do_ring_perf_limit_reasons;
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]91unsigned int crystal_hz;
92unsigned long long tsc_hz;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]93int base_cpu;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]94double discover_bclk(unsigned int family, unsigned int model);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]95unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
96 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
97unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
98unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
99unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
100unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]101unsigned int has_misc_feature_control;
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]102unsigned int first_counter_read = 1;
Artem Bityutskiyc026c232019-08-14 20:12:55 +0300[diff] [blame]103int ignore_stdin;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]104
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]105#define RAPL_PKG (1 << 0)
106 /* 0x610 MSR_PKG_POWER_LIMIT */
107 /* 0x611 MSR_PKG_ENERGY_STATUS */
108#define RAPL_PKG_PERF_STATUS (1 << 1)
109 /* 0x613 MSR_PKG_PERF_STATUS */
110#define RAPL_PKG_POWER_INFO (1 << 2)
111 /* 0x614 MSR_PKG_POWER_INFO */
112
113#define RAPL_DRAM (1 << 3)
114 /* 0x618 MSR_DRAM_POWER_LIMIT */
115 /* 0x619 MSR_DRAM_ENERGY_STATUS */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]116#define RAPL_DRAM_PERF_STATUS (1 << 4)
117 /* 0x61b MSR_DRAM_PERF_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]118#define RAPL_DRAM_POWER_INFO (1 << 5)
119 /* 0x61c MSR_DRAM_POWER_INFO */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]120
Jacob Pan91484942016-06-16 09:48:20 -0700[diff] [blame]121#define RAPL_CORES_POWER_LIMIT (1 << 6)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]122 /* 0x638 MSR_PP0_POWER_LIMIT */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]123#define RAPL_CORE_POLICY (1 << 7)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]124 /* 0x63a MSR_PP0_POLICY */
125
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]126#define RAPL_GFX (1 << 8)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]127 /* 0x640 MSR_PP1_POWER_LIMIT */
128 /* 0x641 MSR_PP1_ENERGY_STATUS */
129 /* 0x642 MSR_PP1_POLICY */
Jacob Pan91484942016-06-16 09:48:20 -0700[diff] [blame]130
131#define RAPL_CORES_ENERGY_STATUS (1 << 9)
132 /* 0x639 MSR_PP0_ENERGY_STATUS */
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]133#define RAPL_PER_CORE_ENERGY (1 << 10)
134 /* Indicates cores energy collection is per-core,
135 * not per-package. */
136#define RAPL_AMD_F17H (1 << 11)
137 /* 0xc0010299 MSR_RAPL_PWR_UNIT */
138 /* 0xc001029a MSR_CORE_ENERGY_STAT */
139 /* 0xc001029b MSR_PKG_ENERGY_STAT */
Jacob Pan91484942016-06-16 09:48:20 -0700[diff] [blame]140#define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]141#define TJMAX_DEFAULT 100
142
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]143/* MSRs that are not yet in the kernel-provided header. */
144#define MSR_RAPL_PWR_UNIT 0xc0010299
145#define MSR_CORE_ENERGY_STAT 0xc001029a
146#define MSR_PKG_ENERGY_STAT 0xc001029b
147
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]148#define MAX(a, b) ((a) > (b) ? (a) : (b))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]149
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]150/*
151 * buffer size used by sscanf() for added column names
152 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
153 */
154#define NAME_BYTES 20
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]155#define PATH_BYTES 128
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]156
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]157int backwards_count;
158char *progname;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]159
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]160#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
161cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
162size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
Len Brown0748eaf2018-06-01 12:38:29 -0400[diff] [blame]163#define MAX_ADDED_COUNTERS 8
164#define MAX_ADDED_THREAD_COUNTERS 24
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]165#define BITMASK_SIZE 32
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]166
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]167struct thread_data {
Len Brownf4fdf2b2017-05-27 21:06:55 -0700[diff] [blame]168 struct timeval tv_begin;
169 struct timeval tv_end;
Yazen Ghannamd4794f22019-03-25 17:32:42 +0000[diff] [blame]170 struct timeval tv_delta;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]171 unsigned long long tsc;
172 unsigned long long aperf;
173 unsigned long long mperf;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]174 unsigned long long c1;
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]175 unsigned long long irq_count;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]176 unsigned int smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]177 unsigned int cpu_id;
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]178 unsigned int apic_id;
179 unsigned int x2apic_id;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]180 unsigned int flags;
181#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
182#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
Len Brown0748eaf2018-06-01 12:38:29 -0400[diff] [blame]183 unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]184} *thread_even, *thread_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]185
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]186struct core_data {
187 unsigned long long c3;
188 unsigned long long c6;
189 unsigned long long c7;
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]190 unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]191 unsigned int core_temp_c;
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]192 unsigned int core_energy; /* MSR_CORE_ENERGY_STAT */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]193 unsigned int core_id;
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]194 unsigned long long counter[MAX_ADDED_COUNTERS];
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]195} *core_even, *core_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]196
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]197struct pkg_data {
198 unsigned long long pc2;
199 unsigned long long pc3;
200 unsigned long long pc6;
201 unsigned long long pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]202 unsigned long long pc8;
203 unsigned long long pc9;
204 unsigned long long pc10;
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]205 unsigned long long cpu_lpi;
206 unsigned long long sys_lpi;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]207 unsigned long long pkg_wtd_core_c0;
208 unsigned long long pkg_any_core_c0;
209 unsigned long long pkg_any_gfxe_c0;
210 unsigned long long pkg_both_core_gfxe_c0;
Len Brown9185e982016-04-06 17:16:00 -0400[diff] [blame]211 long long gfx_rc6_ms;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]212 unsigned int gfx_mhz;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]213 unsigned int package_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]214 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
215 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
216 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
217 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
218 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
219 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
220 unsigned int pkg_temp_c;
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]221 unsigned long long counter[MAX_ADDED_COUNTERS];
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]222} *package_even, *package_odd;
223
224#define ODD_COUNTERS thread_odd, core_odd, package_odd
225#define EVEN_COUNTERS thread_even, core_even, package_even
226
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]227#define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no) \
228 ((thread_base) + \
229 ((pkg_no) * \
230 topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
231 ((node_no) * topo.cores_per_node * topo.threads_per_core) + \
232 ((core_no) * topo.threads_per_core) + \
233 (thread_no))
234
235#define GET_CORE(core_base, core_no, node_no, pkg_no) \
236 ((core_base) + \
237 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
238 ((node_no) * topo.cores_per_node) + \
239 (core_no))
240
241
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]242#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
243
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]244enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]245enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]246enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
247
248struct msr_counter {
249 unsigned int msr_num;
250 char name[NAME_BYTES];
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]251 char path[PATH_BYTES];
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]252 unsigned int width;
253 enum counter_type type;
254 enum counter_format format;
255 struct msr_counter *next;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]256 unsigned int flags;
257#define FLAGS_HIDE (1 << 0)
258#define FLAGS_SHOW (1 << 1)
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]259#define SYSFS_PERCPU (1 << 1)
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]260};
261
262struct sys_counters {
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]263 unsigned int added_thread_counters;
264 unsigned int added_core_counters;
265 unsigned int added_package_counters;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]266 struct msr_counter *tp;
267 struct msr_counter *cp;
268 struct msr_counter *pp;
269} sys;
270
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]271struct system_summary {
272 struct thread_data threads;
273 struct core_data cores;
274 struct pkg_data packages;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]275} average;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]276
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]277struct cpu_topology {
278 int physical_package_id;
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]279 int die_id;
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]280 int logical_cpu_id;
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]281 int physical_node_id;
282 int logical_node_id; /* 0-based count within the package */
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]283 int physical_core_id;
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]284 int thread_id;
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]285 cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
286} *cpus;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]287
288struct topo_params {
289 int num_packages;
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]290 int num_die;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]291 int num_cpus;
292 int num_cores;
293 int max_cpu_num;
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]294 int max_node_num;
Prarit Bhargava70a9c6e2018-06-01 10:04:33 -0400[diff] [blame]295 int nodes_per_pkg;
296 int cores_per_node;
297 int threads_per_core;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]298} topo;
299
300struct timeval tv_even, tv_odd, tv_delta;
301
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]302int *irq_column_2_cpu; /* /proc/interrupts column numbers */
303int *irqs_per_cpu; /* indexed by cpu_num */
304
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]305void setup_all_buffers(void);
306
Len Brown1f81c5e2020-03-19 18:26:05 -0400[diff] [blame]307char *sys_lpi_file;
308char *sys_lpi_file_sysfs = "/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us";
309char *sys_lpi_file_debugfs = "/sys/kernel/debug/pmc_core/slp_s0_residency_usec";
310
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]311int cpu_is_not_present(int cpu)
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]312{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]313 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]314}
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]315/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]316 * run func(thread, core, package) in topology order
317 * skip non-present cpus
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]318 */
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]319
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]320int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
321 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]322{
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]323 int retval, pkg_no, core_no, thread_no, node_no;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]324
325 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
Len Browndf2f6772019-02-15 21:58:23 -0800[diff] [blame]326 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
327 for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]328 for (thread_no = 0; thread_no <
329 topo.threads_per_core; ++thread_no) {
330 struct thread_data *t;
331 struct core_data *c;
332 struct pkg_data *p;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]333
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]334 t = GET_THREAD(thread_base, thread_no,
335 core_no, node_no,
336 pkg_no);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]337
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]338 if (cpu_is_not_present(t->cpu_id))
339 continue;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]340
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]341 c = GET_CORE(core_base, core_no,
342 node_no, pkg_no);
343 p = GET_PKG(pkg_base, pkg_no);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]344
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]345 retval = func(t, c, p);
346 if (retval)
347 return retval;
348 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]349 }
350 }
351 }
352 return 0;
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]353}
354
355int cpu_migrate(int cpu)
356{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]357 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
358 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
359 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]360 return -1;
361 else
362 return 0;
363}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]364int get_msr_fd(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]365{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]366 char pathname[32];
367 int fd;
368
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]369 fd = fd_percpu[cpu];
370
371 if (fd)
372 return fd;
373
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]374 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
375 fd = open(pathname, O_RDONLY);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]376 if (fd < 0)
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]377 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]378
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]379 fd_percpu[cpu] = fd;
380
381 return fd;
382}
383
384int get_msr(int cpu, off_t offset, unsigned long long *msr)
385{
386 ssize_t retval;
387
388 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]389
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]390 if (retval != sizeof *msr)
Len Browncf4cbe52017-01-01 13:08:33 -0500[diff] [blame]391 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]392
393 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]394}
395
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]396/*
Len Brownbdd5ae32018-06-06 17:18:36 -0400[diff] [blame]397 * This list matches the column headers, except
398 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
399 * 2. Core and CPU are moved to the end, we can't have strings that contain them
400 * matching on them for --show and --hide.
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]401 */
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]402struct msr_counter bic[] = {
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]403 { 0x0, "usec" },
404 { 0x0, "Time_Of_Day_Seconds" },
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]405 { 0x0, "Package" },
Len Brownbdd5ae32018-06-06 17:18:36 -0400[diff] [blame]406 { 0x0, "Node" },
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]407 { 0x0, "Avg_MHz" },
Len Brownbdd5ae32018-06-06 17:18:36 -0400[diff] [blame]408 { 0x0, "Busy%" },
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]409 { 0x0, "Bzy_MHz" },
410 { 0x0, "TSC_MHz" },
411 { 0x0, "IRQ" },
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]412 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
Len Brownbdd5ae32018-06-06 17:18:36 -0400[diff] [blame]413 { 0x0, "sysfs" },
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]414 { 0x0, "CPU%c1" },
415 { 0x0, "CPU%c3" },
416 { 0x0, "CPU%c6" },
417 { 0x0, "CPU%c7" },
418 { 0x0, "ThreadC" },
419 { 0x0, "CoreTmp" },
420 { 0x0, "CoreCnt" },
421 { 0x0, "PkgTmp" },
422 { 0x0, "GFX%rc6" },
423 { 0x0, "GFXMHz" },
424 { 0x0, "Pkg%pc2" },
425 { 0x0, "Pkg%pc3" },
426 { 0x0, "Pkg%pc6" },
427 { 0x0, "Pkg%pc7" },
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]428 { 0x0, "Pkg%pc8" },
429 { 0x0, "Pkg%pc9" },
Len Brown4bd1f8f2018-01-28 23:42:42 -0500[diff] [blame]430 { 0x0, "Pk%pc10" },
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]431 { 0x0, "CPU%LPI" },
432 { 0x0, "SYS%LPI" },
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]433 { 0x0, "PkgWatt" },
434 { 0x0, "CorWatt" },
435 { 0x0, "GFXWatt" },
436 { 0x0, "PkgCnt" },
437 { 0x0, "RAMWatt" },
438 { 0x0, "PKG_%" },
439 { 0x0, "RAM_%" },
440 { 0x0, "Pkg_J" },
441 { 0x0, "Cor_J" },
442 { 0x0, "GFX_J" },
443 { 0x0, "RAM_J" },
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]444 { 0x0, "Mod%c6" },
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]445 { 0x0, "Totl%C0" },
446 { 0x0, "Any%C0" },
447 { 0x0, "GFX%C0" },
448 { 0x0, "CPUGFX%" },
Len Brownbdd5ae32018-06-06 17:18:36 -0400[diff] [blame]449 { 0x0, "Core" },
450 { 0x0, "CPU" },
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]451 { 0x0, "APIC" },
452 { 0x0, "X2APIC" },
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]453 { 0x0, "Die" },
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]454};
455
456#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]457#define BIC_USEC (1ULL << 0)
458#define BIC_TOD (1ULL << 1)
459#define BIC_Package (1ULL << 2)
Len Brownbdd5ae32018-06-06 17:18:36 -0400[diff] [blame]460#define BIC_Node (1ULL << 3)
461#define BIC_Avg_MHz (1ULL << 4)
462#define BIC_Busy (1ULL << 5)
463#define BIC_Bzy_MHz (1ULL << 6)
464#define BIC_TSC_MHz (1ULL << 7)
465#define BIC_IRQ (1ULL << 8)
466#define BIC_SMI (1ULL << 9)
467#define BIC_sysfs (1ULL << 10)
468#define BIC_CPU_c1 (1ULL << 11)
469#define BIC_CPU_c3 (1ULL << 12)
470#define BIC_CPU_c6 (1ULL << 13)
471#define BIC_CPU_c7 (1ULL << 14)
472#define BIC_ThreadC (1ULL << 15)
473#define BIC_CoreTmp (1ULL << 16)
474#define BIC_CoreCnt (1ULL << 17)
475#define BIC_PkgTmp (1ULL << 18)
476#define BIC_GFX_rc6 (1ULL << 19)
477#define BIC_GFXMHz (1ULL << 20)
478#define BIC_Pkgpc2 (1ULL << 21)
479#define BIC_Pkgpc3 (1ULL << 22)
480#define BIC_Pkgpc6 (1ULL << 23)
481#define BIC_Pkgpc7 (1ULL << 24)
482#define BIC_Pkgpc8 (1ULL << 25)
483#define BIC_Pkgpc9 (1ULL << 26)
484#define BIC_Pkgpc10 (1ULL << 27)
485#define BIC_CPU_LPI (1ULL << 28)
486#define BIC_SYS_LPI (1ULL << 29)
487#define BIC_PkgWatt (1ULL << 30)
488#define BIC_CorWatt (1ULL << 31)
489#define BIC_GFXWatt (1ULL << 32)
490#define BIC_PkgCnt (1ULL << 33)
491#define BIC_RAMWatt (1ULL << 34)
492#define BIC_PKG__ (1ULL << 35)
493#define BIC_RAM__ (1ULL << 36)
494#define BIC_Pkg_J (1ULL << 37)
495#define BIC_Cor_J (1ULL << 38)
496#define BIC_GFX_J (1ULL << 39)
497#define BIC_RAM_J (1ULL << 40)
498#define BIC_Mod_c6 (1ULL << 41)
499#define BIC_Totl_c0 (1ULL << 42)
500#define BIC_Any_c0 (1ULL << 43)
501#define BIC_GFX_c0 (1ULL << 44)
502#define BIC_CPUGFX (1ULL << 45)
503#define BIC_Core (1ULL << 46)
504#define BIC_CPU (1ULL << 47)
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]505#define BIC_APIC (1ULL << 48)
506#define BIC_X2APIC (1ULL << 49)
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]507#define BIC_Die (1ULL << 50)
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]508
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]509#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]510
511unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]512unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]513
514#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]515#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]516#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]517#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]518#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]519
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]520
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]521#define MAX_DEFERRED 16
522char *deferred_skip_names[MAX_DEFERRED];
523int deferred_skip_index;
524
525/*
526 * HIDE_LIST - hide this list of counters, show the rest [default]
527 * SHOW_LIST - show this list of counters, hide the rest
528 */
529enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
530
531void help(void)
532{
533 fprintf(outf,
534 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
535 "\n"
536 "Turbostat forks the specified COMMAND and prints statistics\n"
537 "when COMMAND completes.\n"
538 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
539 "to print statistics, until interrupted.\n"
Nathan Ciobanucc481652018-06-13 19:51:33 -0700[diff] [blame]540 " -a, --add add a counter\n"
541 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
542 " -c, --cpu cpu-set limit output to summary plus cpu-set:\n"
543 " {core | package | j,k,l..m,n-p }\n"
Nathan Ciobanu9ce80572018-06-13 19:51:34 -0700[diff] [blame]544 " -d, --debug displays usec, Time_Of_Day_Seconds and more debugging\n"
545 " -D, --Dump displays the raw counter values\n"
546 " -e, --enable [all | column]\n"
547 " shows all or the specified disabled column\n"
548 " -H, --hide [column|column,column,...]\n"
549 " hide the specified column(s)\n"
Nathan Ciobanucc481652018-06-13 19:51:33 -0700[diff] [blame]550 " -i, --interval sec.subsec\n"
551 " Override default 5-second measurement interval\n"
Nathan Ciobanu9ce80572018-06-13 19:51:34 -0700[diff] [blame]552 " -J, --Joules displays energy in Joules instead of Watts\n"
Nathan Ciobanucc481652018-06-13 19:51:33 -0700[diff] [blame]553 " -l, --list list column headers only\n"
554 " -n, --num_iterations num\n"
555 " number of the measurement iterations\n"
556 " -o, --out file\n"
557 " create or truncate \"file\" for all output\n"
558 " -q, --quiet skip decoding system configuration header\n"
Nathan Ciobanu9ce80572018-06-13 19:51:34 -0700[diff] [blame]559 " -s, --show [column|column,column,...]\n"
560 " show only the specified column(s)\n"
561 " -S, --Summary\n"
562 " limits output to 1-line system summary per interval\n"
563 " -T, --TCC temperature\n"
564 " sets the Thermal Control Circuit temperature in\n"
565 " degrees Celsius\n"
Nathan Ciobanucc481652018-06-13 19:51:33 -0700[diff] [blame]566 " -h, --help print this help message\n"
567 " -v, --version print version information\n"
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]568 "\n"
569 "For more help, run \"man turbostat\"\n");
570}
571
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]572/*
573 * bic_lookup
574 * for all the strings in comma separate name_list,
575 * set the approprate bit in return value.
576 */
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]577unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]578{
579 int i;
580 unsigned long long retval = 0;
581
582 while (name_list) {
583 char *comma;
584
585 comma = strchr(name_list, ',');
586
587 if (comma)
588 *comma = '\0';
589
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]590 if (!strcmp(name_list, "all"))
591 return ~0;
592
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]593 for (i = 0; i < MAX_BIC; ++i) {
594 if (!strcmp(name_list, bic[i].name)) {
595 retval |= (1ULL << i);
596 break;
597 }
598 }
599 if (i == MAX_BIC) {
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]600 if (mode == SHOW_LIST) {
601 fprintf(stderr, "Invalid counter name: %s\n", name_list);
602 exit(-1);
603 }
604 deferred_skip_names[deferred_skip_index++] = name_list;
605 if (debug)
606 fprintf(stderr, "deferred \"%s\"\n", name_list);
607 if (deferred_skip_index >= MAX_DEFERRED) {
608 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
609 MAX_DEFERRED, name_list);
610 help();
611 exit(1);
612 }
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]613 }
614
615 name_list = comma;
616 if (name_list)
617 name_list++;
618
619 }
620 return retval;
621}
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]622
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]623
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]624void print_header(char *delim)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]625{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]626 struct msr_counter *mp;
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]627 int printed = 0;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]628
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]629 if (DO_BIC(BIC_USEC))
630 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
631 if (DO_BIC(BIC_TOD))
632 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]633 if (DO_BIC(BIC_Package))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]634 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]635 if (DO_BIC(BIC_Die))
636 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
Prarit Bhargava01235042018-06-01 10:04:35 -0400[diff] [blame]637 if (DO_BIC(BIC_Node))
638 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]639 if (DO_BIC(BIC_Core))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]640 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]641 if (DO_BIC(BIC_CPU))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]642 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]643 if (DO_BIC(BIC_APIC))
644 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
645 if (DO_BIC(BIC_X2APIC))
646 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]647 if (DO_BIC(BIC_Avg_MHz))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]648 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]649 if (DO_BIC(BIC_Busy))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]650 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]651 if (DO_BIC(BIC_Bzy_MHz))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]652 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]653 if (DO_BIC(BIC_TSC_MHz))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]654 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]655
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]656 if (DO_BIC(BIC_IRQ)) {
657 if (sums_need_wide_columns)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]658 outp += sprintf(outp, "%s IRQ", (printed++ ? delim : ""));
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]659 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]660 outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]661 }
662
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]663 if (DO_BIC(BIC_SMI))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]664 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]665
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]666 for (mp = sys.tp; mp; mp = mp->next) {
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]667
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]668 if (mp->format == FORMAT_RAW) {
669 if (mp->width == 64)
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]670 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]671 else
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]672 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]673 } else {
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]674 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]675 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]676 else
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]677 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]678 }
679 }
680
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]681 if (DO_BIC(BIC_CPU_c1))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]682 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
Len Brown562855e2019-03-19 17:52:32 -0400[diff] [blame]683 if (DO_BIC(BIC_CPU_c3))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]684 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]685 if (DO_BIC(BIC_CPU_c6))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]686 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]687 if (DO_BIC(BIC_CPU_c7))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]688 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]689
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]690 if (DO_BIC(BIC_Mod_c6))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]691 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]692
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]693 if (DO_BIC(BIC_CoreTmp))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]694 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]695
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]696 if (do_rapl && !rapl_joules) {
697 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
698 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
699 } else if (do_rapl && rapl_joules) {
700 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
701 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
702 }
703
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]704 for (mp = sys.cp; mp; mp = mp->next) {
705 if (mp->format == FORMAT_RAW) {
706 if (mp->width == 64)
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]707 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]708 else
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]709 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]710 } else {
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]711 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
712 outp += sprintf(outp, "%s%8s", delim, mp->name);
713 else
714 outp += sprintf(outp, "%s%s", delim, mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]715 }
716 }
717
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]718 if (DO_BIC(BIC_PkgTmp))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]719 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]720
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]721 if (DO_BIC(BIC_GFX_rc6))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]722 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]723
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]724 if (DO_BIC(BIC_GFXMHz))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]725 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]726
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]727 if (DO_BIC(BIC_Totl_c0))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]728 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]729 if (DO_BIC(BIC_Any_c0))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]730 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]731 if (DO_BIC(BIC_GFX_c0))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]732 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]733 if (DO_BIC(BIC_CPUGFX))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]734 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]735
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]736 if (DO_BIC(BIC_Pkgpc2))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]737 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]738 if (DO_BIC(BIC_Pkgpc3))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]739 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]740 if (DO_BIC(BIC_Pkgpc6))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]741 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]742 if (DO_BIC(BIC_Pkgpc7))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]743 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]744 if (DO_BIC(BIC_Pkgpc8))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]745 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]746 if (DO_BIC(BIC_Pkgpc9))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]747 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]748 if (DO_BIC(BIC_Pkgpc10))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]749 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]750 if (DO_BIC(BIC_CPU_LPI))
751 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
752 if (DO_BIC(BIC_SYS_LPI))
753 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]754
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]755 if (do_rapl && !rapl_joules) {
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]756 if (DO_BIC(BIC_PkgWatt))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]757 outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]758 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]759 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]760 if (DO_BIC(BIC_GFXWatt))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]761 outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]762 if (DO_BIC(BIC_RAMWatt))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]763 outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]764 if (DO_BIC(BIC_PKG__))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]765 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]766 if (DO_BIC(BIC_RAM__))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]767 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]768 } else if (do_rapl && rapl_joules) {
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]769 if (DO_BIC(BIC_Pkg_J))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]770 outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]771 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]772 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]773 if (DO_BIC(BIC_GFX_J))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]774 outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]775 if (DO_BIC(BIC_RAM_J))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]776 outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]777 if (DO_BIC(BIC_PKG__))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]778 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]779 if (DO_BIC(BIC_RAM__))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]780 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]781 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]782 for (mp = sys.pp; mp; mp = mp->next) {
783 if (mp->format == FORMAT_RAW) {
784 if (mp->width == 64)
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]785 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]786 else
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]787 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]788 } else {
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]789 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
790 outp += sprintf(outp, "%s%8s", delim, mp->name);
791 else
792 outp += sprintf(outp, "%s%s", delim, mp->name);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]793 }
794 }
795
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]796 outp += sprintf(outp, "\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]797}
798
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]799int dump_counters(struct thread_data *t, struct core_data *c,
800 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]801{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]802 int i;
803 struct msr_counter *mp;
804
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]805 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]806
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]807 if (t) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]808 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
809 t->cpu_id, t->flags);
810 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
811 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
812 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
813 outp += sprintf(outp, "c1: %016llX\n", t->c1);
Len Brown6886fee2016-12-24 15:18:37 -0500[diff] [blame]814
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]815 if (DO_BIC(BIC_IRQ))
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]816 outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]817 if (DO_BIC(BIC_SMI))
Len Brown218f0e82017-02-14 22:07:52 -0500[diff] [blame]818 outp += sprintf(outp, "SMI: %d\n", t->smi_count);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]819
820 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
821 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
822 i, mp->msr_num, t->counter[i]);
823 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]824 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]825
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]826 if (c) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]827 outp += sprintf(outp, "core: %d\n", c->core_id);
828 outp += sprintf(outp, "c3: %016llX\n", c->c3);
829 outp += sprintf(outp, "c6: %016llX\n", c->c6);
830 outp += sprintf(outp, "c7: %016llX\n", c->c7);
831 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]832 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]833
834 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
835 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
836 i, mp->msr_num, c->counter[i]);
837 }
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]838 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]839 }
840
841 if (p) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]842 outp += sprintf(outp, "package: %d\n", p->package_id);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]843
844 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
845 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
846 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
847 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
848
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]849 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]850 if (DO_BIC(BIC_Pkgpc3))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]851 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]852 if (DO_BIC(BIC_Pkgpc6))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]853 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]854 if (DO_BIC(BIC_Pkgpc7))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]855 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]856 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
857 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
858 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]859 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
860 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]861 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
862 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
863 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
864 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
865 outp += sprintf(outp, "Throttle PKG: %0X\n",
866 p->rapl_pkg_perf_status);
867 outp += sprintf(outp, "Throttle RAM: %0X\n",
868 p->rapl_dram_perf_status);
869 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]870
871 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
872 outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
873 i, mp->msr_num, p->counter[i]);
874 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]875 }
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]876
877 outp += sprintf(outp, "\n");
878
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]879 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]880}
881
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]882/*
883 * column formatting convention & formats
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]884 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]885int format_counters(struct thread_data *t, struct core_data *c,
886 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]887{
Len Brown008d396e2017-02-10 00:29:51 -0500[diff] [blame]888 double interval_float, tsc;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]889 char *fmt8;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]890 int i;
891 struct msr_counter *mp;
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]892 char *delim = "\t";
893 int printed = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]894
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]895 /* if showing only 1st thread in core and this isn't one, bail out */
896 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
897 return 0;
898
899 /* if showing only 1st thread in pkg and this isn't one, bail out */
900 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
901 return 0;
902
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]903 /*if not summary line and --cpu is used */
904 if ((t != &average.threads) &&
905 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
906 return 0;
907
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]908 if (DO_BIC(BIC_USEC)) {
Len Brownf4fdf2b2017-05-27 21:06:55 -0700[diff] [blame]909 /* on each row, print how many usec each timestamp took to gather */
910 struct timeval tv;
911
912 timersub(&t->tv_end, &t->tv_begin, &tv);
913 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
914 }
915
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]916 /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
917 if (DO_BIC(BIC_TOD))
918 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
919
Yazen Ghannamd4794f22019-03-25 17:32:42 +0000[diff] [blame]920 interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]921
Len Brown008d396e2017-02-10 00:29:51 -0500[diff] [blame]922 tsc = t->tsc * tsc_tweak;
923
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]924 /* topo columns, print blanks on 1st (average) line */
925 if (t == &average.threads) {
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]926 if (DO_BIC(BIC_Package))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]927 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]928 if (DO_BIC(BIC_Die))
929 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Prarit Bhargava01235042018-06-01 10:04:35 -0400[diff] [blame]930 if (DO_BIC(BIC_Node))
931 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]932 if (DO_BIC(BIC_Core))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]933 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]934 if (DO_BIC(BIC_CPU))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]935 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]936 if (DO_BIC(BIC_APIC))
937 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
938 if (DO_BIC(BIC_X2APIC))
939 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]940 } else {
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]941 if (DO_BIC(BIC_Package)) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]942 if (p)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]943 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]944 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]945 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]946 }
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]947 if (DO_BIC(BIC_Die)) {
948 if (c)
949 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
950 else
951 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
952 }
Prarit Bhargava01235042018-06-01 10:04:35 -0400[diff] [blame]953 if (DO_BIC(BIC_Node)) {
954 if (t)
955 outp += sprintf(outp, "%s%d",
956 (printed++ ? delim : ""),
957 cpus[t->cpu_id].physical_node_id);
958 else
959 outp += sprintf(outp, "%s-",
960 (printed++ ? delim : ""));
961 }
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]962 if (DO_BIC(BIC_Core)) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]963 if (c)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]964 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]965 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]966 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]967 }
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]968 if (DO_BIC(BIC_CPU))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]969 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]970 if (DO_BIC(BIC_APIC))
971 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
972 if (DO_BIC(BIC_X2APIC))
973 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]974 }
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]975
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]976 if (DO_BIC(BIC_Avg_MHz))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]977 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]978 1.0 / units * t->aperf / interval_float);
979
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]980 if (DO_BIC(BIC_Busy))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]981 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]982
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]983 if (DO_BIC(BIC_Bzy_MHz)) {
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]984 if (has_base_hz)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]985 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]986 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]987 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
Len Brown008d396e2017-02-10 00:29:51 -0500[diff] [blame]988 tsc / units * t->aperf / t->mperf / interval_float);
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]989 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]990
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]991 if (DO_BIC(BIC_TSC_MHz))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]992 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]993
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]994 /* IRQ */
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]995 if (DO_BIC(BIC_IRQ)) {
996 if (sums_need_wide_columns)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]997 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]998 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]999 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1000 }
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1001
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]1002 /* SMI */
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1003 if (DO_BIC(BIC_SMI))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1004 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]1005
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]1006 /* Added counters */
1007 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1008 if (mp->format == FORMAT_RAW) {
1009 if (mp->width == 32)
Len Brown5f3aea52017-02-23 18:10:27 -0500[diff] [blame]1010 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]1011 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1012 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]1013 } else if (mp->format == FORMAT_DELTA) {
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1014 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1015 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1016 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1017 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]1018 } else if (mp->format == FORMAT_PERCENT) {
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]1019 if (mp->type == COUNTER_USEC)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1020 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]1021 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1022 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]1023 }
1024 }
1025
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]1026 /* C1 */
1027 if (DO_BIC(BIC_CPU_c1))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1028 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]1029
1030
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1031 /* print per-core data only for 1st thread in core */
1032 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1033 goto done;
1034
Len Brown562855e2019-03-19 17:52:32 -0400[diff] [blame]1035 if (DO_BIC(BIC_CPU_c3))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1036 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1037 if (DO_BIC(BIC_CPU_c6))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1038 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1039 if (DO_BIC(BIC_CPU_c7))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1040 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1041
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1042 /* Mod%c6 */
1043 if (DO_BIC(BIC_Mod_c6))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1044 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1045
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1046 if (DO_BIC(BIC_CoreTmp))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1047 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1048
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1049 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1050 if (mp->format == FORMAT_RAW) {
1051 if (mp->width == 32)
Len Brown5f3aea52017-02-23 18:10:27 -0500[diff] [blame]1052 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1053 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1054 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1055 } else if (mp->format == FORMAT_DELTA) {
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1056 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1057 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1058 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1059 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1060 } else if (mp->format == FORMAT_PERCENT) {
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1061 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1062 }
1063 }
1064
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]1065 /*
1066 * If measurement interval exceeds minimum RAPL Joule Counter range,
1067 * indicate that results are suspect by printing "**" in fraction place.
1068 */
1069 if (interval_float < rapl_joule_counter_range)
1070 fmt8 = "%s%.2f";
1071 else
1072 fmt8 = "%6.0f**";
1073
1074 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1075 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1076 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1077 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1078
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1079 /* print per-package data only for 1st core in package */
1080 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1081 goto done;
1082
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1083 /* PkgTmp */
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1084 if (DO_BIC(BIC_PkgTmp))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1085 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1086
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]1087 /* GFXrc6 */
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1088 if (DO_BIC(BIC_GFX_rc6)) {
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1089 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1090 outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
Len Brown9185e982016-04-06 17:16:00 -0400[diff] [blame]1091 } else {
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1092 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
Len Brown9185e982016-04-06 17:16:00 -0400[diff] [blame]1093 p->gfx_rc6_ms / 10.0 / interval_float);
1094 }
1095 }
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]1096
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1097 /* GFXMHz */
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1098 if (DO_BIC(BIC_GFXMHz))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1099 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1100
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1101 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1102 if (DO_BIC(BIC_Totl_c0))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1103 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1104 if (DO_BIC(BIC_Any_c0))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1105 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1106 if (DO_BIC(BIC_GFX_c0))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1107 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1108 if (DO_BIC(BIC_CPUGFX))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1109 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1110
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1111 if (DO_BIC(BIC_Pkgpc2))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1112 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1113 if (DO_BIC(BIC_Pkgpc3))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1114 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1115 if (DO_BIC(BIC_Pkgpc6))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1116 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1117 if (DO_BIC(BIC_Pkgpc7))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1118 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1119 if (DO_BIC(BIC_Pkgpc8))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1120 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1121 if (DO_BIC(BIC_Pkgpc9))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1122 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1123 if (DO_BIC(BIC_Pkgpc10))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1124 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1125
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]1126 if (DO_BIC(BIC_CPU_LPI))
1127 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1128 if (DO_BIC(BIC_SYS_LPI))
1129 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1130
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1131 if (DO_BIC(BIC_PkgWatt))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1132 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]1133 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1134 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1135 if (DO_BIC(BIC_GFXWatt))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1136 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1137 if (DO_BIC(BIC_RAMWatt))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1138 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1139 if (DO_BIC(BIC_Pkg_J))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1140 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]1141 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1142 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1143 if (DO_BIC(BIC_GFX_J))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1144 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1145 if (DO_BIC(BIC_RAM_J))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1146 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1147 if (DO_BIC(BIC_PKG__))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1148 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1149 if (DO_BIC(BIC_RAM__))
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1150 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1151
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1152 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1153 if (mp->format == FORMAT_RAW) {
1154 if (mp->width == 32)
Len Brown5f3aea52017-02-23 18:10:27 -0500[diff] [blame]1155 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1156 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1157 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1158 } else if (mp->format == FORMAT_DELTA) {
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1159 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1160 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1161 else
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1162 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1163 } else if (mp->format == FORMAT_PERCENT) {
Len Brown6168c2e2017-02-16 23:07:51 -0500[diff] [blame]1164 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1165 }
1166 }
1167
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1168done:
Len Brown94d6ab42018-01-27 22:39:21 -0500[diff] [blame]1169 if (*(outp - 1) != '\n')
1170 outp += sprintf(outp, "\n");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1171
1172 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1173}
1174
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1175void flush_output_stdout(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1176{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1177 FILE *filep;
1178
1179 if (outf == stderr)
1180 filep = stdout;
1181 else
1182 filep = outf;
1183
1184 fputs(output_buffer, filep);
1185 fflush(filep);
1186
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1187 outp = output_buffer;
1188}
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1189void flush_output_stderr(void)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1190{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1191 fputs(output_buffer, outf);
1192 fflush(outf);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1193 outp = output_buffer;
1194}
1195void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1196{
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]1197 static int printed;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1198
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]1199 if (!printed || !summary_only)
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]1200 print_header("\t");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1201
Len Brown9d836012018-07-20 14:47:03 -0400[diff] [blame]1202 format_counters(&average.threads, &average.cores, &average.packages);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1203
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]1204 printed = 1;
1205
1206 if (summary_only)
1207 return;
1208
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1209 for_all_cpus(format_counters, t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1210}
1211
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1212#define DELTA_WRAP32(new, old) \
1213 if (new > old) { \
1214 old = new - old; \
1215 } else { \
1216 old = 0x100000000 + new - old; \
1217 }
1218
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1219int
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1220delta_package(struct pkg_data *new, struct pkg_data *old)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1221{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1222 int i;
1223 struct msr_counter *mp;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1224
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1225
1226 if (DO_BIC(BIC_Totl_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1227 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1228 if (DO_BIC(BIC_Any_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1229 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1230 if (DO_BIC(BIC_GFX_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1231 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1232 if (DO_BIC(BIC_CPUGFX))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1233 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1234
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1235 old->pc2 = new->pc2 - old->pc2;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1236 if (DO_BIC(BIC_Pkgpc3))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1237 old->pc3 = new->pc3 - old->pc3;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1238 if (DO_BIC(BIC_Pkgpc6))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1239 old->pc6 = new->pc6 - old->pc6;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1240 if (DO_BIC(BIC_Pkgpc7))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1241 old->pc7 = new->pc7 - old->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1242 old->pc8 = new->pc8 - old->pc8;
1243 old->pc9 = new->pc9 - old->pc9;
1244 old->pc10 = new->pc10 - old->pc10;
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]1245 old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1246 old->sys_lpi = new->sys_lpi - old->sys_lpi;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1247 old->pkg_temp_c = new->pkg_temp_c;
1248
Len Brown9185e982016-04-06 17:16:00 -0400[diff] [blame]1249 /* flag an error when rc6 counter resets/wraps */
1250 if (old->gfx_rc6_ms > new->gfx_rc6_ms)
1251 old->gfx_rc6_ms = -1;
1252 else
1253 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1254
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1255 old->gfx_mhz = new->gfx_mhz;
1256
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1257 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1258 DELTA_WRAP32(new->energy_cores, old->energy_cores);
1259 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1260 DELTA_WRAP32(new->energy_dram, old->energy_dram);
1261 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1262 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1263
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1264 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1265 if (mp->format == FORMAT_RAW)
1266 old->counter[i] = new->counter[i];
1267 else
1268 old->counter[i] = new->counter[i] - old->counter[i];
1269 }
1270
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1271 return 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1272}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1273
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1274void
1275delta_core(struct core_data *new, struct core_data *old)
1276{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1277 int i;
1278 struct msr_counter *mp;
1279
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1280 old->c3 = new->c3 - old->c3;
1281 old->c6 = new->c6 - old->c6;
1282 old->c7 = new->c7 - old->c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1283 old->core_temp_c = new->core_temp_c;
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1284 old->mc6_us = new->mc6_us - old->mc6_us;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1285
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]1286 DELTA_WRAP32(new->core_energy, old->core_energy);
1287
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1288 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1289 if (mp->format == FORMAT_RAW)
1290 old->counter[i] = new->counter[i];
1291 else
1292 old->counter[i] = new->counter[i] - old->counter[i];
1293 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1294}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1295
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]1296int soft_c1_residency_display(int bic)
1297{
1298 if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr)
1299 return 0;
1300
1301 return DO_BIC_READ(bic);
1302}
1303
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]1304/*
1305 * old = new - old
1306 */
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1307int
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1308delta_thread(struct thread_data *new, struct thread_data *old,
1309 struct core_data *core_delta)
1310{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1311 int i;
1312 struct msr_counter *mp;
1313
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1314 /* we run cpuid just the 1st time, copy the results */
1315 if (DO_BIC(BIC_APIC))
1316 new->apic_id = old->apic_id;
1317 if (DO_BIC(BIC_X2APIC))
1318 new->x2apic_id = old->x2apic_id;
1319
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]1320 /*
1321 * the timestamps from start of measurement interval are in "old"
1322 * the timestamp from end of measurement interval are in "new"
1323 * over-write old w/ new so we can print end of interval values
1324 */
1325
Yazen Ghannamd4794f22019-03-25 17:32:42 +0000[diff] [blame]1326 timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta);
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]1327 old->tv_begin = new->tv_begin;
1328 old->tv_end = new->tv_end;
1329
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1330 old->tsc = new->tsc - old->tsc;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1331
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1332 /* check for TSC < 1 Mcycles over interval */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1333 if (old->tsc < (1000 * 1000))
1334 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1335 "You can disable all c-states by booting with \"idle=poll\"\n"
1336 "or just the deep ones with \"processor.max_cstate=1\"");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1337
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1338 old->c1 = new->c1 - old->c1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1339
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]1340 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1341 soft_c1_residency_display(BIC_Avg_MHz)) {
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]1342 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1343 old->aperf = new->aperf - old->aperf;
1344 old->mperf = new->mperf - old->mperf;
1345 } else {
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1346 return -1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1347 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1348 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1349
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1350
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1351 if (use_c1_residency_msr) {
1352 /*
1353 * Some models have a dedicated C1 residency MSR,
1354 * which should be more accurate than the derivation below.
1355 */
1356 } else {
1357 /*
1358 * As counter collection is not atomic,
1359 * it is possible for mperf's non-halted cycles + idle states
1360 * to exceed TSC's all cycles: show c1 = 0% in that case.
1361 */
Len Brown95149362017-04-12 19:44:51 -0400[diff] [blame]1362 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1363 old->c1 = 0;
1364 else {
1365 /* normal case, derive c1 */
Len Brown008d396e2017-02-10 00:29:51 -0500[diff] [blame]1366 old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1367 - core_delta->c6 - core_delta->c7;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1368 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1369 }
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]1370
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1371 if (old->mperf == 0) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1372 if (debug > 1)
1373 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1374 old->mperf = 1; /* divide by 0 protection */
1375 }
1376
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1377 if (DO_BIC(BIC_IRQ))
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1378 old->irq_count = new->irq_count - old->irq_count;
1379
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1380 if (DO_BIC(BIC_SMI))
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]1381 old->smi_count = new->smi_count - old->smi_count;
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1382
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1383 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1384 if (mp->format == FORMAT_RAW)
1385 old->counter[i] = new->counter[i];
1386 else
1387 old->counter[i] = new->counter[i] - old->counter[i];
1388 }
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1389 return 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1390}
1391
1392int delta_cpu(struct thread_data *t, struct core_data *c,
1393 struct pkg_data *p, struct thread_data *t2,
1394 struct core_data *c2, struct pkg_data *p2)
1395{
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1396 int retval = 0;
1397
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1398 /* calculate core delta only for 1st thread in core */
1399 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1400 delta_core(c, c2);
1401
1402 /* always calculate thread delta */
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1403 retval = delta_thread(t, t2, c2); /* c2 is core delta */
1404 if (retval)
1405 return retval;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1406
1407 /* calculate package delta only for 1st core in package */
1408 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1409 retval = delta_package(p, p2);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1410
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]1411 return retval;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1412}
1413
1414void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1415{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1416 int i;
1417 struct msr_counter *mp;
1418
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]1419 t->tv_begin.tv_sec = 0;
1420 t->tv_begin.tv_usec = 0;
1421 t->tv_end.tv_sec = 0;
1422 t->tv_end.tv_usec = 0;
Yazen Ghannamd4794f22019-03-25 17:32:42 +0000[diff] [blame]1423 t->tv_delta.tv_sec = 0;
1424 t->tv_delta.tv_usec = 0;
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]1425
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1426 t->tsc = 0;
1427 t->aperf = 0;
1428 t->mperf = 0;
1429 t->c1 = 0;
1430
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1431 t->irq_count = 0;
1432 t->smi_count = 0;
1433
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1434 /* tells format_counters to dump all fields from this set */
1435 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1436
1437 c->c3 = 0;
1438 c->c6 = 0;
1439 c->c7 = 0;
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1440 c->mc6_us = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1441 c->core_temp_c = 0;
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]1442 c->core_energy = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1443
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1444 p->pkg_wtd_core_c0 = 0;
1445 p->pkg_any_core_c0 = 0;
1446 p->pkg_any_gfxe_c0 = 0;
1447 p->pkg_both_core_gfxe_c0 = 0;
1448
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1449 p->pc2 = 0;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1450 if (DO_BIC(BIC_Pkgpc3))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1451 p->pc3 = 0;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1452 if (DO_BIC(BIC_Pkgpc6))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1453 p->pc6 = 0;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1454 if (DO_BIC(BIC_Pkgpc7))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1455 p->pc7 = 0;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1456 p->pc8 = 0;
1457 p->pc9 = 0;
1458 p->pc10 = 0;
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]1459 p->cpu_lpi = 0;
1460 p->sys_lpi = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1461
1462 p->energy_pkg = 0;
1463 p->energy_dram = 0;
1464 p->energy_cores = 0;
1465 p->energy_gfx = 0;
1466 p->rapl_pkg_perf_status = 0;
1467 p->rapl_dram_perf_status = 0;
1468 p->pkg_temp_c = 0;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1469
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]1470 p->gfx_rc6_ms = 0;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1471 p->gfx_mhz = 0;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1472 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1473 t->counter[i] = 0;
1474
1475 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1476 c->counter[i] = 0;
1477
1478 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1479 p->counter[i] = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1480}
1481int sum_counters(struct thread_data *t, struct core_data *c,
1482 struct pkg_data *p)
1483{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1484 int i;
1485 struct msr_counter *mp;
1486
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1487 /* copy un-changing apic_id's */
1488 if (DO_BIC(BIC_APIC))
1489 average.threads.apic_id = t->apic_id;
1490 if (DO_BIC(BIC_X2APIC))
1491 average.threads.x2apic_id = t->x2apic_id;
1492
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]1493 /* remember first tv_begin */
1494 if (average.threads.tv_begin.tv_sec == 0)
1495 average.threads.tv_begin = t->tv_begin;
1496
1497 /* remember last tv_end */
1498 average.threads.tv_end = t->tv_end;
1499
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1500 average.threads.tsc += t->tsc;
1501 average.threads.aperf += t->aperf;
1502 average.threads.mperf += t->mperf;
1503 average.threads.c1 += t->c1;
1504
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1505 average.threads.irq_count += t->irq_count;
1506 average.threads.smi_count += t->smi_count;
1507
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1508 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1509 if (mp->format == FORMAT_RAW)
1510 continue;
1511 average.threads.counter[i] += t->counter[i];
1512 }
1513
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1514 /* sum per-core values only for 1st thread in core */
1515 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1516 return 0;
1517
1518 average.cores.c3 += c->c3;
1519 average.cores.c6 += c->c6;
1520 average.cores.c7 += c->c7;
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1521 average.cores.mc6_us += c->mc6_us;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1522
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1523 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1524
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]1525 average.cores.core_energy += c->core_energy;
1526
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1527 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1528 if (mp->format == FORMAT_RAW)
1529 continue;
1530 average.cores.counter[i] += c->counter[i];
1531 }
1532
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1533 /* sum per-pkg values only for 1st core in pkg */
1534 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1535 return 0;
1536
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1537 if (DO_BIC(BIC_Totl_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1538 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1539 if (DO_BIC(BIC_Any_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1540 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1541 if (DO_BIC(BIC_GFX_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1542 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1543 if (DO_BIC(BIC_CPUGFX))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1544 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1545
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1546 average.packages.pc2 += p->pc2;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1547 if (DO_BIC(BIC_Pkgpc3))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1548 average.packages.pc3 += p->pc3;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1549 if (DO_BIC(BIC_Pkgpc6))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1550 average.packages.pc6 += p->pc6;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1551 if (DO_BIC(BIC_Pkgpc7))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1552 average.packages.pc7 += p->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1553 average.packages.pc8 += p->pc8;
1554 average.packages.pc9 += p->pc9;
1555 average.packages.pc10 += p->pc10;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1556
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]1557 average.packages.cpu_lpi = p->cpu_lpi;
1558 average.packages.sys_lpi = p->sys_lpi;
1559
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1560 average.packages.energy_pkg += p->energy_pkg;
1561 average.packages.energy_dram += p->energy_dram;
1562 average.packages.energy_cores += p->energy_cores;
1563 average.packages.energy_gfx += p->energy_gfx;
1564
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]1565 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1566 average.packages.gfx_mhz = p->gfx_mhz;
1567
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1568 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1569
1570 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1571 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1572
1573 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1574 if (mp->format == FORMAT_RAW)
1575 continue;
1576 average.packages.counter[i] += p->counter[i];
1577 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1578 return 0;
1579}
1580/*
1581 * sum the counters for all cpus in the system
1582 * compute the weighted average
1583 */
1584void compute_average(struct thread_data *t, struct core_data *c,
1585 struct pkg_data *p)
1586{
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1587 int i;
1588 struct msr_counter *mp;
1589
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1590 clear_counters(&average.threads, &average.cores, &average.packages);
1591
1592 for_all_cpus(sum_counters, t, c, p);
1593
Yazen Ghannamd4794f22019-03-25 17:32:42 +0000[diff] [blame]1594 /* Use the global time delta for the average. */
1595 average.threads.tv_delta = tv_delta;
1596
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1597 average.threads.tsc /= topo.num_cpus;
1598 average.threads.aperf /= topo.num_cpus;
1599 average.threads.mperf /= topo.num_cpus;
1600 average.threads.c1 /= topo.num_cpus;
1601
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1602 if (average.threads.irq_count > 9999999)
1603 sums_need_wide_columns = 1;
1604
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1605 average.cores.c3 /= topo.num_cores;
1606 average.cores.c6 /= topo.num_cores;
1607 average.cores.c7 /= topo.num_cores;
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1608 average.cores.mc6_us /= topo.num_cores;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1609
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1610 if (DO_BIC(BIC_Totl_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1611 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1612 if (DO_BIC(BIC_Any_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1613 average.packages.pkg_any_core_c0 /= topo.num_packages;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1614 if (DO_BIC(BIC_GFX_c0))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1615 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1616 if (DO_BIC(BIC_CPUGFX))
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1617 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1618
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1619 average.packages.pc2 /= topo.num_packages;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1620 if (DO_BIC(BIC_Pkgpc3))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1621 average.packages.pc3 /= topo.num_packages;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1622 if (DO_BIC(BIC_Pkgpc6))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1623 average.packages.pc6 /= topo.num_packages;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1624 if (DO_BIC(BIC_Pkgpc7))
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1625 average.packages.pc7 /= topo.num_packages;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1626
1627 average.packages.pc8 /= topo.num_packages;
1628 average.packages.pc9 /= topo.num_packages;
1629 average.packages.pc10 /= topo.num_packages;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1630
1631 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1632 if (mp->format == FORMAT_RAW)
1633 continue;
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1634 if (mp->type == COUNTER_ITEMS) {
1635 if (average.threads.counter[i] > 9999999)
1636 sums_need_wide_columns = 1;
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]1637 continue;
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1638 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1639 average.threads.counter[i] /= topo.num_cpus;
1640 }
1641 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1642 if (mp->format == FORMAT_RAW)
1643 continue;
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1644 if (mp->type == COUNTER_ITEMS) {
1645 if (average.cores.counter[i] > 9999999)
1646 sums_need_wide_columns = 1;
1647 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1648 average.cores.counter[i] /= topo.num_cores;
1649 }
1650 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1651 if (mp->format == FORMAT_RAW)
1652 continue;
Len Brown0de6c0d2017-02-15 21:45:40 -0500[diff] [blame]1653 if (mp->type == COUNTER_ITEMS) {
1654 if (average.packages.counter[i] > 9999999)
1655 sums_need_wide_columns = 1;
1656 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1657 average.packages.counter[i] /= topo.num_packages;
1658 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1659}
1660
1661static unsigned long long rdtsc(void)
1662{
1663 unsigned int low, high;
1664
1665 asm volatile("rdtsc" : "=a" (low), "=d" (high));
1666
1667 return low | ((unsigned long long)high) << 32;
1668}
1669
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1670/*
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]1671 * Open a file, and exit on failure
1672 */
1673FILE *fopen_or_die(const char *path, const char *mode)
1674{
1675 FILE *filep = fopen(path, mode);
1676
1677 if (!filep)
1678 err(1, "%s: open failed", path);
1679 return filep;
1680}
1681/*
1682 * snapshot_sysfs_counter()
1683 *
1684 * return snapshot of given counter
1685 */
1686unsigned long long snapshot_sysfs_counter(char *path)
1687{
1688 FILE *fp;
1689 int retval;
1690 unsigned long long counter;
1691
1692 fp = fopen_or_die(path, "r");
1693
1694 retval = fscanf(fp, "%lld", &counter);
1695 if (retval != 1)
1696 err(1, "snapshot_sysfs_counter(%s)", path);
1697
1698 fclose(fp);
1699
1700 return counter;
1701}
1702
1703int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1704{
1705 if (mp->msr_num != 0) {
1706 if (get_msr(cpu, mp->msr_num, counterp))
1707 return -1;
1708 } else {
Len Brown46c27972017-12-08 17:38:17 -0500[diff] [blame]1709 char path[128 + PATH_BYTES];
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]1710
1711 if (mp->flags & SYSFS_PERCPU) {
1712 sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1713 cpu, mp->path);
1714
1715 *counterp = snapshot_sysfs_counter(path);
1716 } else {
1717 *counterp = snapshot_sysfs_counter(mp->path);
1718 }
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]1719 }
1720
1721 return 0;
1722}
1723
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1724void get_apic_id(struct thread_data *t)
1725{
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]1726 unsigned int eax, ebx, ecx, edx;
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1727
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]1728 if (DO_BIC(BIC_APIC)) {
1729 eax = ebx = ecx = edx = 0;
1730 __cpuid(1, eax, ebx, ecx, edx);
1731
1732 t->apic_id = (ebx >> 24) & 0xff;
1733 }
1734
1735 if (!DO_BIC(BIC_X2APIC))
1736 return;
1737
Pu Wenc1c10cc2019-08-31 10:20:31 +0800[diff] [blame]1738 if (authentic_amd || hygon_genuine) {
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]1739 unsigned int topology_extensions;
1740
1741 if (max_extended_level < 0x8000001e)
1742 return;
1743
1744 eax = ebx = ecx = edx = 0;
1745 __cpuid(0x80000001, eax, ebx, ecx, edx);
1746 topology_extensions = ecx & (1 << 22);
1747
1748 if (topology_extensions == 0)
1749 return;
1750
1751 eax = ebx = ecx = edx = 0;
1752 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1753
1754 t->x2apic_id = eax;
1755 return;
1756 }
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1757
1758 if (!genuine_intel)
1759 return;
1760
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1761 if (max_level < 0xb)
1762 return;
1763
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1764 ecx = 0;
1765 __cpuid(0xb, eax, ebx, ecx, edx);
1766 t->x2apic_id = edx;
1767
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]1768 if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1769 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1770 t->cpu_id, t->apic_id, t->x2apic_id);
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1771}
1772
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]1773/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1774 * get_counters(...)
1775 * migrate to cpu
1776 * acquire and record local counters for that cpu
1777 */
1778int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1779{
1780 int cpu = t->cpu_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1781 unsigned long long msr;
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1782 int aperf_mperf_retry_count = 0;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1783 struct msr_counter *mp;
1784 int i;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1785
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1786 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1787 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1788 return -1;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1789 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1790
Yazen Ghannamd4794f22019-03-25 17:32:42 +0000[diff] [blame]1791 gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1792
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]1793 if (first_counter_read)
1794 get_apic_id(t);
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1795retry:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1796 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1797
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]1798 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1799 soft_c1_residency_display(BIC_Avg_MHz)) {
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1800 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1801
1802 /*
1803 * The TSC, APERF and MPERF must be read together for
1804 * APERF/MPERF and MPERF/TSC to give accurate results.
1805 *
1806 * Unfortunately, APERF and MPERF are read by
1807 * individual system call, so delays may occur
1808 * between them. If the time to read them
1809 * varies by a large amount, we re-read them.
1810 */
1811
1812 /*
1813 * This initial dummy APERF read has been seen to
1814 * reduce jitter in the subsequent reads.
1815 */
1816
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1817 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1818 return -3;
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1819
1820 t->tsc = rdtsc(); /* re-read close to APERF */
1821
1822 tsc_before = t->tsc;
1823
1824 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1825 return -3;
1826
1827 tsc_between = rdtsc();
1828
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1829 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1830 return -4;
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1831
1832 tsc_after = rdtsc();
1833
1834 aperf_time = tsc_between - tsc_before;
1835 mperf_time = tsc_after - tsc_between;
1836
1837 /*
1838 * If the system call latency to read APERF and MPERF
1839 * differ by more than 2x, then try again.
1840 */
1841 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1842 aperf_mperf_retry_count++;
1843 if (aperf_mperf_retry_count < 5)
1844 goto retry;
1845 else
1846 warnx("cpu%d jitter %lld %lld",
1847 cpu, aperf_time, mperf_time);
1848 }
1849 aperf_mperf_retry_count = 0;
1850
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]1851 t->aperf = t->aperf * aperf_mperf_multiplier;
1852 t->mperf = t->mperf * aperf_mperf_multiplier;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1853 }
1854
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1855 if (DO_BIC(BIC_IRQ))
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1856 t->irq_count = irqs_per_cpu[cpu];
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1857 if (DO_BIC(BIC_SMI)) {
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]1858 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1859 return -5;
1860 t->smi_count = msr & 0xFFFFFFFF;
1861 }
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1862 if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1863 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1864 return -6;
1865 }
1866
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1867 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]1868 if (get_mp(cpu, mp, &t->counter[i]))
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1869 return -10;
1870 }
1871
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1872 /* collect core counters only for 1st thread in core */
1873 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
Len Brownf4fdf2b2017-05-27 21:06:55 -0700[diff] [blame]1874 goto done;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1875
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]1876 if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1877 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1878 return -6;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1879 }
1880
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]1881 if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1882 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1883 return -7;
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]1884 } else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) {
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1885 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1886 return -7;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1887 }
1888
Srinivas Pandruvada1e9042b2019-08-27 10:57:14 -0700[diff] [blame]1889 if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1890 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1891 return -8;
1892
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1893 if (DO_BIC(BIC_Mod_c6))
1894 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1895 return -8;
1896
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]1897 if (DO_BIC(BIC_CoreTmp)) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1898 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1899 return -9;
1900 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1901 }
1902
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]1903 if (do_rapl & RAPL_AMD_F17H) {
1904 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
1905 return -14;
1906 c->core_energy = msr & 0xFFFFFFFF;
1907 }
1908
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1909 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]1910 if (get_mp(cpu, mp, &c->counter[i]))
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]1911 return -10;
1912 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1913
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1914 /* collect package counters only for 1st core in package */
1915 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
Len Brownf4fdf2b2017-05-27 21:06:55 -0700[diff] [blame]1916 goto done;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1917
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1918 if (DO_BIC(BIC_Totl_c0)) {
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1919 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1920 return -10;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1921 }
1922 if (DO_BIC(BIC_Any_c0)) {
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1923 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1924 return -11;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1925 }
1926 if (DO_BIC(BIC_GFX_c0)) {
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1927 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1928 return -12;
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]1929 }
1930 if (DO_BIC(BIC_CPUGFX)) {
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1931 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1932 return -13;
1933 }
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1934 if (DO_BIC(BIC_Pkgpc3))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1935 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1936 return -9;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1937 if (DO_BIC(BIC_Pkgpc6)) {
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]1938 if (do_slm_cstates) {
1939 if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1940 return -10;
1941 } else {
1942 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1943 return -10;
1944 }
1945 }
1946
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1947 if (DO_BIC(BIC_Pkgpc2))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1948 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1949 return -11;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1950 if (DO_BIC(BIC_Pkgpc7))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1951 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1952 return -12;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1953 if (DO_BIC(BIC_Pkgpc8))
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1954 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1955 return -13;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1956 if (DO_BIC(BIC_Pkgpc9))
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1957 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1958 return -13;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1959 if (DO_BIC(BIC_Pkgpc10))
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1960 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1961 return -13;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]1962
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]1963 if (DO_BIC(BIC_CPU_LPI))
1964 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1965 if (DO_BIC(BIC_SYS_LPI))
1966 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1967
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1968 if (do_rapl & RAPL_PKG) {
1969 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1970 return -13;
1971 p->energy_pkg = msr & 0xFFFFFFFF;
1972 }
Jacob Pan91484942016-06-16 09:48:20 -0700[diff] [blame]1973 if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1974 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1975 return -14;
1976 p->energy_cores = msr & 0xFFFFFFFF;
1977 }
1978 if (do_rapl & RAPL_DRAM) {
1979 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1980 return -15;
1981 p->energy_dram = msr & 0xFFFFFFFF;
1982 }
1983 if (do_rapl & RAPL_GFX) {
1984 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1985 return -16;
1986 p->energy_gfx = msr & 0xFFFFFFFF;
1987 }
1988 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1989 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1990 return -16;
1991 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1992 }
1993 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1994 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1995 return -16;
1996 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1997 }
Calvin Walton3316f992018-08-17 12:34:42 -0400[diff] [blame]1998 if (do_rapl & RAPL_AMD_F17H) {
1999 if (get_msr(cpu, MSR_PKG_ENERGY_STAT, &msr))
2000 return -13;
2001 p->energy_pkg = msr & 0xFFFFFFFF;
2002 }
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]2003 if (DO_BIC(BIC_PkgTmp)) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2004 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2005 return -17;
2006 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
2007 }
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]2008
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]2009 if (DO_BIC(BIC_GFX_rc6))
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]2010 p->gfx_rc6_ms = gfx_cur_rc6_ms;
2011
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]2012 if (DO_BIC(BIC_GFXMHz))
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]2013 p->gfx_mhz = gfx_cur_mhz;
2014
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]2015 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]2016 if (get_mp(cpu, mp, &p->counter[i]))
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]2017 return -10;
2018 }
Len Brownf4fdf2b2017-05-27 21:06:55 -0700[diff] [blame]2019done:
2020 gettimeofday(&t->tv_end, (struct timezone *)NULL);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]2021
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2022 return 0;
2023}
2024
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2025/*
2026 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2027 * If you change the values, note they are used both in comparisons
2028 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2029 */
2030
2031#define PCLUKN 0 /* Unknown */
2032#define PCLRSV 1 /* Reserved */
2033#define PCL__0 2 /* PC0 */
2034#define PCL__1 3 /* PC1 */
2035#define PCL__2 4 /* PC2 */
2036#define PCL__3 5 /* PC3 */
2037#define PCL__4 6 /* PC4 */
2038#define PCL__6 7 /* PC6 */
2039#define PCL_6N 8 /* PC6 No Retention */
2040#define PCL_6R 9 /* PC6 Retention */
2041#define PCL__7 10 /* PC7 */
2042#define PCL_7S 11 /* PC7 Shrink */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2043#define PCL__8 12 /* PC8 */
2044#define PCL__9 13 /* PC9 */
Len Brown445640a2018-12-14 20:02:27 -0500[diff] [blame]2045#define PCL_10 14 /* PC10 */
2046#define PCLUNL 15 /* Unlimited */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2047
2048int pkg_cstate_limit = PCLUKN;
2049char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
Len Brown445640a2018-12-14 20:02:27 -0500[diff] [blame]2050 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2051
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]2052int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2053int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2054int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]2055int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
Len Brownf2642882017-01-07 23:13:15 -0500[diff] [blame]2056int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]2057int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Brown445640a2018-12-14 20:02:27 -0500[diff] [blame]2058int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Artem Bityutskiy2085e122017-08-04 18:42:23 +0300[diff] [blame]2059int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2060
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]2061
2062static void
2063calculate_tsc_tweak()
2064{
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]2065 tsc_tweak = base_hz / tsc_hz;
2066}
2067
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2068static void
2069dump_nhm_platform_info(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2070{
2071 unsigned long long msr;
2072 unsigned int ratio;
2073
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]2074 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2075
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2076 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2077
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2078 ratio = (msr >> 40) & 0xFF;
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2079 fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2080 ratio, bclk, ratio * bclk);
2081
2082 ratio = (msr >> 8) & 0xFF;
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2083 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2084 ratio, bclk, ratio * bclk);
2085
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2086 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2087 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]2088 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]2089
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2090 return;
2091}
2092
2093static void
2094dump_hsw_turbo_ratio_limits(void)
2095{
2096 unsigned long long msr;
2097 unsigned int ratio;
2098
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2099 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2100
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2101 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2102
2103 ratio = (msr >> 8) & 0xFF;
2104 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2105 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2106 ratio, bclk, ratio * bclk);
2107
2108 ratio = (msr >> 0) & 0xFF;
2109 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2110 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2111 ratio, bclk, ratio * bclk);
2112 return;
2113}
2114
2115static void
2116dump_ivt_turbo_ratio_limits(void)
2117{
2118 unsigned long long msr;
2119 unsigned int ratio;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2120
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2121 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2122
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2123 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2124
2125 ratio = (msr >> 56) & 0xFF;
2126 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2127 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2128 ratio, bclk, ratio * bclk);
2129
2130 ratio = (msr >> 48) & 0xFF;
2131 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2132 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2133 ratio, bclk, ratio * bclk);
2134
2135 ratio = (msr >> 40) & 0xFF;
2136 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2137 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2138 ratio, bclk, ratio * bclk);
2139
2140 ratio = (msr >> 32) & 0xFF;
2141 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2142 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2143 ratio, bclk, ratio * bclk);
2144
2145 ratio = (msr >> 24) & 0xFF;
2146 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2147 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2148 ratio, bclk, ratio * bclk);
2149
2150 ratio = (msr >> 16) & 0xFF;
2151 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2152 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2153 ratio, bclk, ratio * bclk);
2154
2155 ratio = (msr >> 8) & 0xFF;
2156 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2157 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2158 ratio, bclk, ratio * bclk);
2159
2160 ratio = (msr >> 0) & 0xFF;
2161 if (ratio)
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2162 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2163 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2164 return;
2165}
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2166int has_turbo_ratio_group_limits(int family, int model)
2167{
2168
2169 if (!genuine_intel)
2170 return 0;
2171
2172 switch (model) {
2173 case INTEL_FAM6_ATOM_GOLDMONT:
2174 case INTEL_FAM6_SKYLAKE_X:
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]2175 case INTEL_FAM6_ATOM_GOLDMONT_D:
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2176 return 1;
2177 }
2178 return 0;
2179}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2180
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2181static void
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2182dump_turbo_ratio_limits(int family, int model)
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2183{
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2184 unsigned long long msr, core_counts;
2185 unsigned int ratio, group_size;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2186
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2187 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2188 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2189
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2190 if (has_turbo_ratio_group_limits(family, model)) {
2191 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2192 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2193 } else {
2194 core_counts = 0x0807060504030201;
2195 }
2196
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2197 ratio = (msr >> 56) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2198 group_size = (core_counts >> 56) & 0xFF;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2199 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2200 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2201 ratio, bclk, ratio * bclk, group_size);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2202
2203 ratio = (msr >> 48) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2204 group_size = (core_counts >> 48) & 0xFF;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2205 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2206 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2207 ratio, bclk, ratio * bclk, group_size);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2208
2209 ratio = (msr >> 40) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2210 group_size = (core_counts >> 40) & 0xFF;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2211 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2212 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2213 ratio, bclk, ratio * bclk, group_size);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2214
2215 ratio = (msr >> 32) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2216 group_size = (core_counts >> 32) & 0xFF;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2217 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2218 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2219 ratio, bclk, ratio * bclk, group_size);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2220
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2221 ratio = (msr >> 24) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2222 group_size = (core_counts >> 24) & 0xFF;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2223 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2224 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2225 ratio, bclk, ratio * bclk, group_size);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2226
2227 ratio = (msr >> 16) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2228 group_size = (core_counts >> 16) & 0xFF;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2229 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2230 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2231 ratio, bclk, ratio * bclk, group_size);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2232
2233 ratio = (msr >> 8) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2234 group_size = (core_counts >> 8) & 0xFF;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2235 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2236 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2237 ratio, bclk, ratio * bclk, group_size);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2238
2239 ratio = (msr >> 0) & 0xFF;
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2240 group_size = (core_counts >> 0) & 0xFF;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2241 if (ratio)
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]2242 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2243 ratio, bclk, ratio * bclk, group_size);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2244 return;
2245}
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2246
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2247static void
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]2248dump_atom_turbo_ratio_limits(void)
2249{
2250 unsigned long long msr;
2251 unsigned int ratio;
2252
2253 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2254 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2255
2256 ratio = (msr >> 0) & 0x3F;
2257 if (ratio)
2258 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2259 ratio, bclk, ratio * bclk);
2260
2261 ratio = (msr >> 8) & 0x3F;
2262 if (ratio)
2263 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2264 ratio, bclk, ratio * bclk);
2265
2266 ratio = (msr >> 16) & 0x3F;
2267 if (ratio)
2268 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2269 ratio, bclk, ratio * bclk);
2270
2271 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2272 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2273
2274 ratio = (msr >> 24) & 0x3F;
2275 if (ratio)
2276 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2277 ratio, bclk, ratio * bclk);
2278
2279 ratio = (msr >> 16) & 0x3F;
2280 if (ratio)
2281 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2282 ratio, bclk, ratio * bclk);
2283
2284 ratio = (msr >> 8) & 0x3F;
2285 if (ratio)
2286 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2287 ratio, bclk, ratio * bclk);
2288
2289 ratio = (msr >> 0) & 0x3F;
2290 if (ratio)
2291 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2292 ratio, bclk, ratio * bclk);
2293}
2294
2295static void
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2296dump_knl_turbo_ratio_limits(void)
2297{
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2298 const unsigned int buckets_no = 7;
2299
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2300 unsigned long long msr;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2301 int delta_cores, delta_ratio;
2302 int i, b_nr;
2303 unsigned int cores[buckets_no];
2304 unsigned int ratio[buckets_no];
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2305
Srinivas Pandruvadaebf59262016-07-06 16:07:56 -0700[diff] [blame]2306 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2307
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2308 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]2309 base_cpu, msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2310
2311 /**
2312 * Turbo encoding in KNL is as follows:
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2313 * [0] -- Reserved
2314 * [7:1] -- Base value of number of active cores of bucket 1.
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2315 * [15:8] -- Base value of freq ratio of bucket 1.
2316 * [20:16] -- +ve delta of number of active cores of bucket 2.
2317 * i.e. active cores of bucket 2 =
2318 * active cores of bucket 1 + delta
2319 * [23:21] -- Negative delta of freq ratio of bucket 2.
2320 * i.e. freq ratio of bucket 2 =
2321 * freq ratio of bucket 1 - delta
2322 * [28:24]-- +ve delta of number of active cores of bucket 3.
2323 * [31:29]-- -ve delta of freq ratio of bucket 3.
2324 * [36:32]-- +ve delta of number of active cores of bucket 4.
2325 * [39:37]-- -ve delta of freq ratio of bucket 4.
2326 * [44:40]-- +ve delta of number of active cores of bucket 5.
2327 * [47:45]-- -ve delta of freq ratio of bucket 5.
2328 * [52:48]-- +ve delta of number of active cores of bucket 6.
2329 * [55:53]-- -ve delta of freq ratio of bucket 6.
2330 * [60:56]-- +ve delta of number of active cores of bucket 7.
2331 * [63:61]-- -ve delta of freq ratio of bucket 7.
2332 */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2333
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2334 b_nr = 0;
2335 cores[b_nr] = (msr & 0xFF) >> 1;
2336 ratio[b_nr] = (msr >> 8) & 0xFF;
2337
2338 for (i = 16; i < 64; i += 8) {
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2339 delta_cores = (msr >> i) & 0x1F;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2340 delta_ratio = (msr >> (i + 5)) & 0x7;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2341
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2342 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2343 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2344 b_nr++;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2345 }
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2346
2347 for (i = buckets_no - 1; i >= 0; i--)
2348 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2349 fprintf(outf,
Len Brown710f2732017-01-11 22:12:25 -0500[diff] [blame]2350 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2351 ratio[i], bclk, ratio[i] * bclk, cores[i]);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2352}
2353
2354static void
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2355dump_nhm_cst_cfg(void)
2356{
2357 unsigned long long msr;
2358
Len Brown1df2e552017-01-07 23:24:57 -0500[diff] [blame]2359 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2360
Len Brown1df2e552017-01-07 23:24:57 -0500[diff] [blame]2361 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2362
Artem Bityutskiy3e8b62b2017-09-05 15:25:42 +0300[diff] [blame]2363 fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2364 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2365 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2366 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2367 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2368 (msr & (1 << 15)) ? "" : "UN",
Len Brown6c34f162016-03-13 03:21:22 -0400[diff] [blame]2369 (unsigned int)msr & 0xF,
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2370 pkg_cstate_limit_strings[pkg_cstate_limit]);
Artem Bityutskiyac980e12017-09-05 15:14:08 +0300[diff] [blame]2371
2372#define AUTOMATIC_CSTATE_CONVERSION (1UL << 16)
2373 if (has_automatic_cstate_conversion) {
2374 fprintf(outf, ", automatic c-state conversion=%s",
2375 (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2376 }
2377
2378 fprintf(outf, ")\n");
2379
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2380 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2381}
2382
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2383static void
2384dump_config_tdp(void)
2385{
2386 unsigned long long msr;
2387
2388 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2389 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]2390 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2391
2392 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2393 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2394 if (msr) {
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]2395 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2396 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2397 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2398 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2399 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2400 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2401
2402 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2403 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2404 if (msr) {
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]2405 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2406 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2407 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2408 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2409 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2410 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2411
2412 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2413 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2414 if ((msr) & 0x3)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2415 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2416 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2417 fprintf(outf, ")\n");
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]2418
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2419 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2420 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]2421 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2422 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2423 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2424}
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]2425
2426unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2427
2428void print_irtl(void)
2429{
2430 unsigned long long msr;
2431
2432 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2433 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2434 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2435 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2436
2437 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2438 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2439 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2440 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2441
2442 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2443 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2444 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2445 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2446
2447 if (!do_irtl_hsw)
2448 return;
2449
2450 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2451 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2452 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2453 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2454
2455 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2456 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2457 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2458 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2459
2460 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2461 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2462 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2463 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2464
2465}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]2466void free_fd_percpu(void)
2467{
2468 int i;
2469
Mika Westerberg01a67ad2016-04-22 11:13:23 +0300[diff] [blame]2470 for (i = 0; i < topo.max_cpu_num + 1; ++i) {
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]2471 if (fd_percpu[i] != 0)
2472 close(fd_percpu[i]);
2473 }
2474
2475 free(fd_percpu);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2476}
2477
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2478void free_all_buffers(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2479{
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2480 int i;
2481
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2482 CPU_FREE(cpu_present_set);
2483 cpu_present_set = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]2484 cpu_present_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2485
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2486 CPU_FREE(cpu_affinity_set);
2487 cpu_affinity_set = NULL;
2488 cpu_affinity_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2489
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2490 free(thread_even);
2491 free(core_even);
2492 free(package_even);
2493
2494 thread_even = NULL;
2495 core_even = NULL;
2496 package_even = NULL;
2497
2498 free(thread_odd);
2499 free(core_odd);
2500 free(package_odd);
2501
2502 thread_odd = NULL;
2503 core_odd = NULL;
2504 package_odd = NULL;
2505
2506 free(output_buffer);
2507 output_buffer = NULL;
2508 outp = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]2509
2510 free_fd_percpu();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2511
2512 free(irq_column_2_cpu);
2513 free(irqs_per_cpu);
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2514
2515 for (i = 0; i <= topo.max_cpu_num; ++i) {
2516 if (cpus[i].put_ids)
2517 CPU_FREE(cpus[i].put_ids);
2518 }
2519 free(cpus);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2520}
2521
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]2522
2523/*
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]2524 * Parse a file containing a single int.
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]2525 * Return 0 if file can not be opened
2526 * Exit if file can be opened, but can not be parsed
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]2527 */
2528int parse_int_file(const char *fmt, ...)
2529{
2530 va_list args;
2531 char path[PATH_MAX];
2532 FILE *filep;
2533 int value;
2534
2535 va_start(args, fmt);
2536 vsnprintf(path, sizeof(path), fmt, args);
2537 va_end(args);
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]2538 filep = fopen(path, "r");
2539 if (!filep)
2540 return 0;
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2541 if (fscanf(filep, "%d", &value) != 1)
2542 err(1, "%s: failed to parse number from file", path);
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]2543 fclose(filep);
2544 return value;
2545}
2546
2547/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2548 * cpu_is_first_core_in_package(cpu)
2549 * return 1 if given CPU is 1st core in package
2550 */
2551int cpu_is_first_core_in_package(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2552{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]2553 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2554}
2555
2556int get_physical_package_id(int cpu)
2557{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]2558 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2559}
2560
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]2561int get_die_id(int cpu)
2562{
2563 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2564}
2565
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2566int get_core_id(int cpu)
2567{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]2568 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2569}
2570
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]2571void set_node_data(void)
2572{
Prarit Bhargava2ffbb222018-07-26 09:08:54 -0400[diff] [blame]2573 int pkg, node, lnode, cpu, cpux;
2574 int cpu_count;
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]2575
Prarit Bhargava2ffbb222018-07-26 09:08:54 -0400[diff] [blame]2576 /* initialize logical_node_id */
2577 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2578 cpus[cpu].logical_node_id = -1;
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]2579
Prarit Bhargava2ffbb222018-07-26 09:08:54 -0400[diff] [blame]2580 cpu_count = 0;
2581 for (pkg = 0; pkg < topo.num_packages; pkg++) {
2582 lnode = 0;
2583 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2584 if (cpus[cpu].physical_package_id != pkg)
2585 continue;
2586 /* find a cpu with an unset logical_node_id */
2587 if (cpus[cpu].logical_node_id != -1)
2588 continue;
2589 cpus[cpu].logical_node_id = lnode;
2590 node = cpus[cpu].physical_node_id;
2591 cpu_count++;
2592 /*
2593 * find all matching cpus on this pkg and set
2594 * the logical_node_id
2595 */
2596 for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2597 if ((cpus[cpux].physical_package_id == pkg) &&
2598 (cpus[cpux].physical_node_id == node)) {
2599 cpus[cpux].logical_node_id = lnode;
2600 cpu_count++;
2601 }
2602 }
2603 lnode++;
2604 if (lnode > topo.nodes_per_pkg)
2605 topo.nodes_per_pkg = lnode;
2606 }
2607 if (cpu_count >= topo.max_cpu_num)
2608 break;
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]2609 }
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]2610}
2611
2612int get_physical_node_id(struct cpu_topology *thiscpu)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2613{
2614 char path[80];
2615 FILE *filep;
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2616 int i;
2617 int cpu = thiscpu->logical_cpu_id;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2618
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2619 for (i = 0; i <= topo.max_cpu_num; i++) {
2620 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2621 cpu, i);
2622 filep = fopen(path, "r");
2623 if (!filep)
2624 continue;
2625 fclose(filep);
2626 return i;
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]2627 }
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2628 return -1;
2629}
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2630
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2631int get_thread_siblings(struct cpu_topology *thiscpu)
2632{
2633 char path[80], character;
2634 FILE *filep;
2635 unsigned long map;
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]2636 int so, shift, sib_core;
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2637 int cpu = thiscpu->logical_cpu_id;
2638 int offset = topo.max_cpu_num + 1;
2639 size_t size;
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]2640 int thread_id = 0;
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2641
2642 thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]2643 if (thiscpu->thread_id < 0)
2644 thiscpu->thread_id = thread_id++;
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2645 if (!thiscpu->put_ids)
2646 return -1;
2647
2648 size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2649 CPU_ZERO_S(size, thiscpu->put_ids);
2650
2651 sprintf(path,
2652 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2653 filep = fopen_or_die(path, "r");
2654 do {
2655 offset -= BITMASK_SIZE;
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]2656 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2657 err(1, "%s: failed to parse file", path);
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2658 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2659 if ((map >> shift) & 0x1) {
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]2660 so = shift + offset;
2661 sib_core = get_core_id(so);
2662 if (sib_core == thiscpu->physical_core_id) {
2663 CPU_SET_S(so, size, thiscpu->put_ids);
2664 if ((so != cpu) &&
2665 (cpus[so].thread_id < 0))
2666 cpus[so].thread_id =
2667 thread_id++;
2668 }
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2669 }
2670 }
2671 } while (!strncmp(&character, ",", 1));
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2672 fclose(filep);
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2673
2674 return CPU_COUNT_S(size, thiscpu->put_ids);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2675}
2676
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2677/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2678 * run func(thread, core, package) in topology order
2679 * skip non-present cpus
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2680 */
2681
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2682int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2683 struct pkg_data *, struct thread_data *, struct core_data *,
2684 struct pkg_data *), struct thread_data *thread_base,
2685 struct core_data *core_base, struct pkg_data *pkg_base,
2686 struct thread_data *thread_base2, struct core_data *core_base2,
2687 struct pkg_data *pkg_base2)
2688{
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2689 int retval, pkg_no, node_no, core_no, thread_no;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2690
2691 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2692 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2693 for (core_no = 0; core_no < topo.cores_per_node;
2694 ++core_no) {
2695 for (thread_no = 0; thread_no <
2696 topo.threads_per_core; ++thread_no) {
2697 struct thread_data *t, *t2;
2698 struct core_data *c, *c2;
2699 struct pkg_data *p, *p2;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2700
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2701 t = GET_THREAD(thread_base, thread_no,
2702 core_no, node_no,
2703 pkg_no);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2704
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2705 if (cpu_is_not_present(t->cpu_id))
2706 continue;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2707
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2708 t2 = GET_THREAD(thread_base2, thread_no,
2709 core_no, node_no,
2710 pkg_no);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2711
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2712 c = GET_CORE(core_base, core_no,
2713 node_no, pkg_no);
2714 c2 = GET_CORE(core_base2, core_no,
2715 node_no,
2716 pkg_no);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2717
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2718 p = GET_PKG(pkg_base, pkg_no);
2719 p2 = GET_PKG(pkg_base2, pkg_no);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2720
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]2721 retval = func(t, c, p, t2, c2, p2);
2722 if (retval)
2723 return retval;
2724 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2725 }
2726 }
2727 }
2728 return 0;
2729}
2730
2731/*
2732 * run func(cpu) on every cpu in /proc/stat
2733 * return max_cpu number
2734 */
2735int for_all_proc_cpus(int (func)(int))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2736{
2737 FILE *fp;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2738 int cpu_num;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2739 int retval;
2740
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]2741 fp = fopen_or_die(proc_stat, "r");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2742
2743 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2744 if (retval != 0)
2745 err(1, "%s: failed to parse format", proc_stat);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2746
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2747 while (1) {
2748 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2749 if (retval != 1)
2750 break;
2751
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2752 retval = func(cpu_num);
2753 if (retval) {
2754 fclose(fp);
2755 return(retval);
2756 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2757 }
2758 fclose(fp);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2759 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2760}
2761
2762void re_initialize(void)
2763{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2764 free_all_buffers();
2765 setup_all_buffers();
2766 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2767}
2768
Prarit Bhargava843c5792018-06-01 10:04:28 -0400[diff] [blame]2769void set_max_cpu_num(void)
2770{
2771 FILE *filep;
2772 unsigned long dummy;
2773
2774 topo.max_cpu_num = 0;
2775 filep = fopen_or_die(
2776 "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2777 "r");
2778 while (fscanf(filep, "%lx,", &dummy) == 1)
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]2779 topo.max_cpu_num += BITMASK_SIZE;
Prarit Bhargava843c5792018-06-01 10:04:28 -0400[diff] [blame]2780 fclose(filep);
2781 topo.max_cpu_num--; /* 0 based */
2782}
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2783
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2784/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2785 * count_cpus()
2786 * remember the last one seen, it will be the max
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2787 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2788int count_cpus(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2789{
Prarit Bhargava843c5792018-06-01 10:04:28 -0400[diff] [blame]2790 topo.num_cpus++;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2791 return 0;
2792}
2793int mark_cpu_present(int cpu)
2794{
2795 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]2796 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2797}
2798
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]2799int init_thread_id(int cpu)
2800{
2801 cpus[cpu].thread_id = -1;
2802 return 0;
2803}
2804
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2805/*
2806 * snapshot_proc_interrupts()
2807 *
2808 * read and record summary of /proc/interrupts
2809 *
2810 * return 1 if config change requires a restart, else return 0
2811 */
2812int snapshot_proc_interrupts(void)
2813{
2814 static FILE *fp;
2815 int column, retval;
2816
2817 if (fp == NULL)
2818 fp = fopen_or_die("/proc/interrupts", "r");
2819 else
2820 rewind(fp);
2821
2822 /* read 1st line of /proc/interrupts to get cpu* name for each column */
2823 for (column = 0; column < topo.num_cpus; ++column) {
2824 int cpu_number;
2825
2826 retval = fscanf(fp, " CPU%d", &cpu_number);
2827 if (retval != 1)
2828 break;
2829
2830 if (cpu_number > topo.max_cpu_num) {
2831 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2832 return 1;
2833 }
2834
2835 irq_column_2_cpu[column] = cpu_number;
2836 irqs_per_cpu[cpu_number] = 0;
2837 }
2838
2839 /* read /proc/interrupt count lines and sum up irqs per cpu */
2840 while (1) {
2841 int column;
2842 char buf[64];
2843
2844 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
2845 if (retval != 1)
2846 break;
2847
2848 /* read the count per cpu */
2849 for (column = 0; column < topo.num_cpus; ++column) {
2850
2851 int cpu_number, irq_count;
2852
2853 retval = fscanf(fp, " %d", &irq_count);
2854 if (retval != 1)
2855 break;
2856
2857 cpu_number = irq_column_2_cpu[column];
2858 irqs_per_cpu[cpu_number] += irq_count;
2859
2860 }
2861
2862 while (getc(fp) != '\n')
2863 ; /* flush interrupt description */
2864
2865 }
2866 return 0;
2867}
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]2868/*
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]2869 * snapshot_gfx_rc6_ms()
2870 *
2871 * record snapshot of
2872 * /sys/class/drm/card0/power/rc6_residency_ms
2873 *
2874 * return 1 if config change requires a restart, else return 0
2875 */
2876int snapshot_gfx_rc6_ms(void)
2877{
2878 FILE *fp;
2879 int retval;
2880
2881 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2882
2883 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2884 if (retval != 1)
2885 err(1, "GFX rc6");
2886
2887 fclose(fp);
2888
2889 return 0;
2890}
2891/*
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]2892 * snapshot_gfx_mhz()
2893 *
2894 * record snapshot of
2895 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2896 *
2897 * return 1 if config change requires a restart, else return 0
2898 */
2899int snapshot_gfx_mhz(void)
2900{
2901 static FILE *fp;
2902 int retval;
2903
2904 if (fp == NULL)
2905 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
Len Brown22048c52017-03-04 15:42:48 -0500[diff] [blame]2906 else {
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]2907 rewind(fp);
Len Brown22048c52017-03-04 15:42:48 -0500[diff] [blame]2908 fflush(fp);
2909 }
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]2910
2911 retval = fscanf(fp, "%d", &gfx_cur_mhz);
2912 if (retval != 1)
2913 err(1, "GFX MHz");
2914
2915 return 0;
2916}
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2917
2918/*
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]2919 * snapshot_cpu_lpi()
2920 *
2921 * record snapshot of
2922 * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]2923 */
2924int snapshot_cpu_lpi_us(void)
2925{
2926 FILE *fp;
2927 int retval;
2928
2929 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2930
2931 retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
Prarit Bhargava5ea76472018-09-25 08:59:26 -0400[diff] [blame]2932 if (retval != 1) {
2933 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
2934 BIC_NOT_PRESENT(BIC_CPU_LPI);
Gustavo A. R. Silva605736c2019-04-08 11:12:40 -0500[diff] [blame]2935 fclose(fp);
Prarit Bhargava5ea76472018-09-25 08:59:26 -0400[diff] [blame]2936 return -1;
2937 }
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]2938
2939 fclose(fp);
2940
2941 return 0;
2942}
2943/*
2944 * snapshot_sys_lpi()
2945 *
Len Brown1f81c5e2020-03-19 18:26:05 -0400[diff] [blame]2946 * record snapshot of sys_lpi_file
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]2947 */
2948int snapshot_sys_lpi_us(void)
2949{
2950 FILE *fp;
2951 int retval;
2952
Len Brown1f81c5e2020-03-19 18:26:05 -0400[diff] [blame]2953 fp = fopen_or_die(sys_lpi_file, "r");
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]2954
2955 retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
Prarit Bhargava5ea76472018-09-25 08:59:26 -0400[diff] [blame]2956 if (retval != 1) {
2957 fprintf(stderr, "Disabling Low Power Idle System output\n");
2958 BIC_NOT_PRESENT(BIC_SYS_LPI);
Colin Ian King15423b92019-04-08 10:00:44 +0100[diff] [blame]2959 fclose(fp);
Prarit Bhargava5ea76472018-09-25 08:59:26 -0400[diff] [blame]2960 return -1;
2961 }
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]2962 fclose(fp);
2963
2964 return 0;
2965}
2966/*
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2967 * snapshot /proc and /sys files
2968 *
2969 * return 1 if configuration restart needed, else return 0
2970 */
2971int snapshot_proc_sysfs_files(void)
2972{
Len Brown218f0e82017-02-14 22:07:52 -0500[diff] [blame]2973 if (DO_BIC(BIC_IRQ))
2974 if (snapshot_proc_interrupts())
2975 return 1;
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2976
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]2977 if (DO_BIC(BIC_GFX_rc6))
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]2978 snapshot_gfx_rc6_ms();
2979
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]2980 if (DO_BIC(BIC_GFXMHz))
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]2981 snapshot_gfx_mhz();
2982
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]2983 if (DO_BIC(BIC_CPU_LPI))
2984 snapshot_cpu_lpi_us();
2985
2986 if (DO_BIC(BIC_SYS_LPI))
2987 snapshot_sys_lpi_us();
2988
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2989 return 0;
2990}
2991
Len Brown8aa2ed02017-07-15 14:57:37 -0400[diff] [blame]2992int exit_requested;
2993
2994static void signal_handler (int signal)
2995{
2996 switch (signal) {
2997 case SIGINT:
2998 exit_requested = 1;
2999 if (debug)
3000 fprintf(stderr, " SIGINT\n");
3001 break;
Len Brown07211962017-07-15 15:51:26 -0400[diff] [blame]3002 case SIGUSR1:
3003 if (debug > 1)
3004 fprintf(stderr, "SIGUSR1\n");
3005 break;
Len Brown8aa2ed02017-07-15 14:57:37 -0400[diff] [blame]3006 }
3007}
3008
3009void setup_signal_handler(void)
3010{
3011 struct sigaction sa;
3012
3013 memset(&sa, 0, sizeof(sa));
3014
3015 sa.sa_handler = &signal_handler;
3016
3017 if (sigaction(SIGINT, &sa, NULL) < 0)
3018 err(1, "sigaction SIGINT");
Len Brown07211962017-07-15 15:51:26 -0400[diff] [blame]3019 if (sigaction(SIGUSR1, &sa, NULL) < 0)
3020 err(1, "sigaction SIGUSR1");
Len Brown8aa2ed02017-07-15 14:57:37 -0400[diff] [blame]3021}
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3022
Artem Bityutskiy47936f92017-10-04 15:01:47 +0300[diff] [blame]3023void do_sleep(void)
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3024{
Artem Bityutskiyc026c232019-08-14 20:12:55 +0300[diff] [blame]3025 struct timeval tout;
3026 struct timespec rest;
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3027 fd_set readfds;
3028 int retval;
3029
3030 FD_ZERO(&readfds);
3031 FD_SET(0, &readfds);
3032
Artem Bityutskiyc026c232019-08-14 20:12:55 +0300[diff] [blame]3033 if (ignore_stdin) {
Artem Bityutskiy47936f92017-10-04 15:01:47 +0300[diff] [blame]3034 nanosleep(&interval_ts, NULL);
3035 return;
3036 }
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3037
Artem Bityutskiyc026c232019-08-14 20:12:55 +0300[diff] [blame]3038 tout = interval_tv;
3039 retval = select(1, &readfds, NULL, NULL, &tout);
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3040
3041 if (retval == 1) {
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3042 switch (getc(stdin)) {
3043 case 'q':
3044 exit_requested = 1;
3045 break;
Artem Bityutskiyc026c232019-08-14 20:12:55 +0300[diff] [blame]3046 case EOF:
3047 /*
3048 * 'stdin' is a pipe closed on the other end. There
3049 * won't be any further input.
3050 */
3051 ignore_stdin = 1;
3052 /* Sleep the rest of the time */
3053 rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000);
3054 rest.tv_nsec = (tout.tv_usec % 1000000) * 1000;
3055 nanosleep(&rest, NULL);
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3056 }
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3057 }
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3058}
Artem Bityutskiy47936f92017-10-04 15:01:47 +0300[diff] [blame]3059
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]3060
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3061void turbostat_loop()
3062{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3063 int retval;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]3064 int restarted = 0;
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]3065 int done_iters = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3066
Len Brown8aa2ed02017-07-15 14:57:37 -0400[diff] [blame]3067 setup_signal_handler();
3068
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3069restart:
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]3070 restarted++;
3071
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]3072 snapshot_proc_sysfs_files();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3073 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]3074 first_counter_read = 0;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3075 if (retval < -1) {
3076 exit(retval);
3077 } else if (retval == -1) {
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]3078 if (restarted > 1) {
3079 exit(retval);
3080 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3081 re_initialize();
3082 goto restart;
3083 }
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]3084 restarted = 0;
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]3085 done_iters = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3086 gettimeofday(&tv_even, (struct timezone *)NULL);
3087
3088 while (1) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3089 if (for_all_proc_cpus(cpu_is_not_present)) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3090 re_initialize();
3091 goto restart;
3092 }
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3093 do_sleep();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]3094 if (snapshot_proc_sysfs_files())
3095 goto restart;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3096 retval = for_all_cpus(get_counters, ODD_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3097 if (retval < -1) {
3098 exit(retval);
3099 } else if (retval == -1) {
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]3100 re_initialize();
3101 goto restart;
3102 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3103 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3104 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]3105 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3106 re_initialize();
3107 goto restart;
3108 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3109 compute_average(EVEN_COUNTERS);
3110 format_all_counters(EVEN_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3111 flush_output_stdout();
Len Brown8aa2ed02017-07-15 14:57:37 -0400[diff] [blame]3112 if (exit_requested)
3113 break;
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]3114 if (num_iterations && ++done_iters >= num_iterations)
3115 break;
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]3116 do_sleep();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]3117 if (snapshot_proc_sysfs_files())
3118 goto restart;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3119 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3120 if (retval < -1) {
3121 exit(retval);
3122 } else if (retval == -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3123 re_initialize();
3124 goto restart;
3125 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3126 gettimeofday(&tv_even, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3127 timersub(&tv_even, &tv_odd, &tv_delta);
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]3128 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3129 re_initialize();
3130 goto restart;
3131 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3132 compute_average(ODD_COUNTERS);
3133 format_all_counters(ODD_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3134 flush_output_stdout();
Len Brown8aa2ed02017-07-15 14:57:37 -0400[diff] [blame]3135 if (exit_requested)
3136 break;
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]3137 if (num_iterations && ++done_iters >= num_iterations)
3138 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3139 }
3140}
3141
3142void check_dev_msr()
3143{
3144 struct stat sb;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3145 char pathname[32];
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3146
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3147 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3148 if (stat(pathname, &sb))
Len Browna21d38c2015-03-24 16:37:35 -0400[diff] [blame]3149 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3150 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3151}
3152
Len Brownfcaa6812020-03-19 23:24:17 -0400[diff] [blame]3153/*
3154 * check for CAP_SYS_RAWIO
3155 * return 0 on success
3156 * return 1 on fail
3157 */
3158int check_for_cap_sys_rawio(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3159{
Len Brownfcaa6812020-03-19 23:24:17 -0400[diff] [blame]3160 cap_t caps;
3161 cap_flag_value_t cap_flag_value;
3162
3163 caps = cap_get_proc();
3164 if (caps == NULL)
3165 err(-6, "cap_get_proc\n");
3166
3167 if (cap_get_flag(caps, CAP_SYS_RAWIO, CAP_EFFECTIVE, &cap_flag_value))
3168 err(-6, "cap_get\n");
3169
3170 if (cap_flag_value != CAP_SET) {
3171 warnx("capget(CAP_SYS_RAWIO) failed,"
3172 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3173 return 1;
3174 }
3175
3176 if (cap_free(caps) == -1)
3177 err(-6, "cap_free\n");
3178
3179 return 0;
3180}
3181void check_permissions(void)
3182{
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3183 int do_exit = 0;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3184 char pathname[32];
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3185
3186 /* check for CAP_SYS_RAWIO */
Len Brownfcaa6812020-03-19 23:24:17 -0400[diff] [blame]3187 do_exit += check_for_cap_sys_rawio();
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3188
3189 /* test file permissions */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3190 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3191 if (euidaccess(pathname, R_OK)) {
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3192 do_exit++;
3193 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3194 }
3195
3196 /* if all else fails, thell them to be root */
3197 if (do_exit)
3198 if (getuid() != 0)
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3199 warnx("... or simply run as root");
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3200
3201 if (do_exit)
3202 exit(-6);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3203}
3204
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3205/*
3206 * NHM adds support for additional MSRs:
3207 *
3208 * MSR_SMI_COUNT 0x00000034
3209 *
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]3210 * MSR_PLATFORM_INFO 0x000000ce
Len Brown1df2e552017-01-07 23:24:57 -0500[diff] [blame]3211 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3212 *
Len Browncf4cbe52017-01-01 13:08:33 -0500[diff] [blame]3213 * MSR_MISC_PWR_MGMT 0x000001aa
3214 *
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3215 * MSR_PKG_C3_RESIDENCY 0x000003f8
3216 * MSR_PKG_C6_RESIDENCY 0x000003f9
3217 * MSR_CORE_C3_RESIDENCY 0x000003fc
3218 * MSR_CORE_C6_RESIDENCY 0x000003fd
3219 *
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3220 * Side effect:
Len Brown1df2e552017-01-07 23:24:57 -0500[diff] [blame]3221 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]3222 * sets has_misc_feature_control
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3223 */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3224int probe_nhm_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3225{
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3226 unsigned long long msr;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]3227 unsigned int base_ratio;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3228 int *pkg_cstate_limits;
3229
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3230 if (!genuine_intel)
3231 return 0;
3232
3233 if (family != 6)
3234 return 0;
3235
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]3236 bclk = discover_bclk(family, model);
3237
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3238 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3239 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3240 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3241 pkg_cstate_limits = nhm_pkg_cstate_limits;
3242 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3243 case INTEL_FAM6_SANDYBRIDGE: /* SNB */
3244 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */
3245 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3246 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3247 pkg_cstate_limits = snb_pkg_cstate_limits;
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]3248 has_misc_feature_control = 1;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3249 break;
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]3250 case INTEL_FAM6_HASWELL: /* HSW */
Peter Zijlstra5e741402019-08-27 21:48:23 +0200[diff] [blame]3251 case INTEL_FAM6_HASWELL_G: /* HSW */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3252 case INTEL_FAM6_HASWELL_X: /* HSX */
Ingo Molnar77e55172019-09-02 09:10:07 +0200[diff] [blame]3253 case INTEL_FAM6_HASWELL_L: /* HSW */
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]3254 case INTEL_FAM6_BROADWELL: /* BDW */
Peter Zijlstra5e741402019-08-27 21:48:23 +0200[diff] [blame]3255 case INTEL_FAM6_BROADWELL_G: /* BDW */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3256 case INTEL_FAM6_BROADWELL_X: /* BDX */
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]3257 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3258 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3259 pkg_cstate_limits = hsw_pkg_cstate_limits;
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]3260 has_misc_feature_control = 1;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3261 break;
Len Brownd8ebb442016-12-01 20:27:46 -0500[diff] [blame]3262 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3263 pkg_cstate_limits = skx_pkg_cstate_limits;
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]3264 has_misc_feature_control = 1;
Len Brownd8ebb442016-12-01 20:27:46 -0500[diff] [blame]3265 break;
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]3266 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
Len Browncf4cbe52017-01-01 13:08:33 -0500[diff] [blame]3267 no_MSR_MISC_PWR_MGMT = 1;
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]3268 case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3269 pkg_cstate_limits = slv_pkg_cstate_limits;
3270 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3271 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3272 pkg_cstate_limits = amt_pkg_cstate_limits;
Len Browncf4cbe52017-01-01 13:08:33 -0500[diff] [blame]3273 no_MSR_MISC_PWR_MGMT = 1;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3274 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3275 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3276 pkg_cstate_limits = phi_pkg_cstate_limits;
3277 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3278 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]3279 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]3280 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
Chen Yuf6708402020-03-18 18:55:48 +0800[diff] [blame]3281 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
Len Brown445640a2018-12-14 20:02:27 -0500[diff] [blame]3282 pkg_cstate_limits = glm_pkg_cstate_limits;
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]3283 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3284 default:
3285 return 0;
3286 }
Len Brown1df2e552017-01-07 23:24:57 -0500[diff] [blame]3287 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]3288 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3289
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]3290 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]3291 base_ratio = (msr >> 8) & 0xFF;
3292
3293 base_hz = base_ratio * bclk * 1000000;
3294 has_base_hz = 1;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3295 return 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3296}
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]3297/*
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]3298 * SLV client has support for unique MSRs:
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]3299 *
3300 * MSR_CC6_DEMOTION_POLICY_CONFIG
3301 * MSR_MC6_DEMOTION_POLICY_CONFIG
3302 */
3303
3304int has_slv_msrs(unsigned int family, unsigned int model)
3305{
3306 if (!genuine_intel)
3307 return 0;
3308
3309 switch (model) {
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]3310 case INTEL_FAM6_ATOM_SILVERMONT:
3311 case INTEL_FAM6_ATOM_SILVERMONT_MID:
3312 case INTEL_FAM6_ATOM_AIRMONT_MID:
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]3313 return 1;
3314 }
3315 return 0;
3316}
Len Brown7170a372017-01-27 02:13:27 -0500[diff] [blame]3317int is_dnv(unsigned int family, unsigned int model)
3318{
3319
3320 if (!genuine_intel)
3321 return 0;
3322
3323 switch (model) {
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]3324 case INTEL_FAM6_ATOM_GOLDMONT_D:
Len Brown7170a372017-01-27 02:13:27 -0500[diff] [blame]3325 return 1;
3326 }
3327 return 0;
3328}
Len Brownade0eba2017-02-10 01:56:47 -0500[diff] [blame]3329int is_bdx(unsigned int family, unsigned int model)
3330{
3331
3332 if (!genuine_intel)
3333 return 0;
3334
3335 switch (model) {
3336 case INTEL_FAM6_BROADWELL_X:
Len Brownade0eba2017-02-10 01:56:47 -0500[diff] [blame]3337 return 1;
3338 }
3339 return 0;
3340}
Len Brown34c761972017-01-27 02:36:41 -0500[diff] [blame]3341int is_skx(unsigned int family, unsigned int model)
3342{
3343
3344 if (!genuine_intel)
3345 return 0;
3346
3347 switch (model) {
3348 case INTEL_FAM6_SKYLAKE_X:
3349 return 1;
3350 }
3351 return 0;
3352}
Chen Yuf6708402020-03-18 18:55:48 +0800[diff] [blame]3353int is_ehl(unsigned int family, unsigned int model)
3354{
3355 if (!genuine_intel)
3356 return 0;
3357
3358 switch (model) {
3359 case INTEL_FAM6_ATOM_TREMONT:
3360 return 1;
3361 }
3362 return 0;
3363}
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]3364
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]3365int has_turbo_ratio_limit(unsigned int family, unsigned int model)
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3366{
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]3367 if (has_slv_msrs(family, model))
3368 return 0;
3369
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3370 switch (model) {
3371 /* Nehalem compatible, but do not include turbo-ratio limit support */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3372 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3373 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3374 return 0;
3375 default:
3376 return 1;
3377 }
3378}
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]3379int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3380{
3381 if (has_slv_msrs(family, model))
3382 return 1;
3383
3384 return 0;
3385}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]3386int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3387{
3388 if (!genuine_intel)
3389 return 0;
3390
3391 if (family != 6)
3392 return 0;
3393
3394 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3395 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3396 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]3397 return 1;
3398 default:
3399 return 0;
3400 }
3401}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3402int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3403{
3404 if (!genuine_intel)
3405 return 0;
3406
3407 if (family != 6)
3408 return 0;
3409
3410 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3411 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3412 return 1;
3413 default:
3414 return 0;
3415 }
3416}
3417
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]3418int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3419{
3420 if (!genuine_intel)
3421 return 0;
3422
3423 if (family != 6)
3424 return 0;
3425
3426 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3427 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]3428 return 1;
3429 default:
3430 return 0;
3431 }
3432}
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]3433int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3434{
3435 if (!genuine_intel)
3436 return 0;
3437
3438 if (family != 6)
3439 return 0;
3440
3441 switch (model) {
3442 case INTEL_FAM6_ATOM_GOLDMONT:
3443 case INTEL_FAM6_SKYLAKE_X:
3444 return 1;
3445 default:
3446 return 0;
3447 }
3448}
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]3449int has_config_tdp(unsigned int family, unsigned int model)
3450{
3451 if (!genuine_intel)
3452 return 0;
3453
3454 if (family != 6)
3455 return 0;
3456
3457 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3458 case INTEL_FAM6_IVYBRIDGE: /* IVB */
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]3459 case INTEL_FAM6_HASWELL: /* HSW */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3460 case INTEL_FAM6_HASWELL_X: /* HSX */
Ingo Molnar77e55172019-09-02 09:10:07 +0200[diff] [blame]3461 case INTEL_FAM6_HASWELL_L: /* HSW */
Peter Zijlstra5e741402019-08-27 21:48:23 +0200[diff] [blame]3462 case INTEL_FAM6_HASWELL_G: /* HSW */
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]3463 case INTEL_FAM6_BROADWELL: /* BDW */
Peter Zijlstra5e741402019-08-27 21:48:23 +0200[diff] [blame]3464 case INTEL_FAM6_BROADWELL_G: /* BDW */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3465 case INTEL_FAM6_BROADWELL_X: /* BDX */
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]3466 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3467 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3468 case INTEL_FAM6_SKYLAKE_X: /* SKX */
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]3469
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3470 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]3471 return 1;
3472 default:
3473 return 0;
3474 }
3475}
3476
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3477static void
Colin Ian King1b693172016-03-02 13:50:25 +0000[diff] [blame]3478dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3479{
3480 if (!do_nhm_platform_info)
3481 return;
3482
3483 dump_nhm_platform_info();
3484
3485 if (has_hsw_turbo_ratio_limit(family, model))
3486 dump_hsw_turbo_ratio_limits();
3487
3488 if (has_ivt_turbo_ratio_limit(family, model))
3489 dump_ivt_turbo_ratio_limits();
3490
Len Brown31e07522017-01-31 23:07:49 -0500[diff] [blame]3491 if (has_turbo_ratio_limit(family, model))
3492 dump_turbo_ratio_limits(family, model);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3493
Len Brown0f7887c2017-01-12 23:49:18 -0500[diff] [blame]3494 if (has_atom_turbo_ratio_limit(family, model))
3495 dump_atom_turbo_ratio_limits();
3496
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]3497 if (has_knl_turbo_ratio_limit(family, model))
3498 dump_knl_turbo_ratio_limits();
3499
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]3500 if (has_config_tdp(family, model))
3501 dump_config_tdp();
3502
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3503 dump_nhm_cst_cfg();
3504}
3505
Len Brownabdcbdb2020-03-21 00:47:47 -0400[diff] [blame]3506static void dump_sysfs_file(char *path)
3507{
3508 FILE *input;
3509 char cpuidle_buf[64];
3510
3511 input = fopen(path, "r");
3512 if (input == NULL) {
3513 if (debug)
3514 fprintf(outf, "NSFOD %s\n", path);
3515 return;
3516 }
3517 if (!fgets(cpuidle_buf, sizeof(cpuidle_buf), input))
3518 err(1, "%s: failed to read file", path);
3519 fclose(input);
3520
3521 fprintf(outf, "%s: %s", strrchr(path, '/') + 1, cpuidle_buf);
3522}
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]3523static void
3524dump_sysfs_cstate_config(void)
3525{
3526 char path[64];
3527 char name_buf[16];
3528 char desc[64];
3529 FILE *input;
3530 int state;
3531 char *sp;
3532
3533 if (!DO_BIC(BIC_sysfs))
3534 return;
3535
Len Brownabdcbdb2020-03-21 00:47:47 -0400[diff] [blame]3536 if (access("/sys/devices/system/cpu/cpuidle", R_OK)) {
3537 fprintf(outf, "cpuidle not loaded\n");
3538 return;
3539 }
3540
3541 dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_driver");
3542 dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor");
3543 dump_sysfs_file("/sys/devices/system/cpu/cpuidle/current_governor_ro");
3544
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]3545 for (state = 0; state < 10; ++state) {
3546
3547 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3548 base_cpu, state);
3549 input = fopen(path, "r");
3550 if (input == NULL)
3551 continue;
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]3552 if (!fgets(name_buf, sizeof(name_buf), input))
3553 err(1, "%s: failed to read file", path);
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]3554
3555 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3556 sp = strchr(name_buf, '-');
3557 if (!sp)
3558 sp = strchrnul(name_buf, '\n');
3559 *sp = '\0';
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]3560 fclose(input);
3561
3562 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3563 base_cpu, state);
3564 input = fopen(path, "r");
3565 if (input == NULL)
3566 continue;
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]3567 if (!fgets(desc, sizeof(desc), input))
3568 err(1, "%s: failed to read file", path);
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]3569
3570 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3571 fclose(input);
3572 }
3573}
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]3574static void
3575dump_sysfs_pstate_config(void)
3576{
3577 char path[64];
3578 char driver_buf[64];
3579 char governor_buf[64];
3580 FILE *input;
3581 int turbo;
3582
3583 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3584 base_cpu);
3585 input = fopen(path, "r");
3586 if (input == NULL) {
Prarit Bhargava0a42d232018-08-13 08:45:01 -0400[diff] [blame]3587 fprintf(outf, "NSFOD %s\n", path);
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]3588 return;
3589 }
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]3590 if (!fgets(driver_buf, sizeof(driver_buf), input))
3591 err(1, "%s: failed to read file", path);
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]3592 fclose(input);
3593
3594 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3595 base_cpu);
3596 input = fopen(path, "r");
3597 if (input == NULL) {
Prarit Bhargava0a42d232018-08-13 08:45:01 -0400[diff] [blame]3598 fprintf(outf, "NSFOD %s\n", path);
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]3599 return;
3600 }
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]3601 if (!fgets(governor_buf, sizeof(governor_buf), input))
3602 err(1, "%s: failed to read file", path);
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]3603 fclose(input);
3604
3605 fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3606 fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3607
3608 sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3609 input = fopen(path, "r");
3610 if (input != NULL) {
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]3611 if (fscanf(input, "%d", &turbo) != 1)
3612 err(1, "%s: failed to parse number from file", path);
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]3613 fprintf(outf, "cpufreq boost: %d\n", turbo);
3614 fclose(input);
3615 }
3616
3617 sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3618 input = fopen(path, "r");
3619 if (input != NULL) {
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]3620 if (fscanf(input, "%d", &turbo) != 1)
3621 err(1, "%s: failed to parse number from file", path);
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]3622 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3623 fclose(input);
3624 }
3625}
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]3626
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]3627
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3628/*
3629 * print_epb()
3630 * Decode the ENERGY_PERF_BIAS MSR
3631 */
3632int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3633{
3634 unsigned long long msr;
3635 char *epb_string;
3636 int cpu;
3637
3638 if (!has_epb)
3639 return 0;
3640
3641 cpu = t->cpu_id;
3642
3643 /* EPB is per-package */
3644 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3645 return 0;
3646
3647 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3648 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3649 return -1;
3650 }
3651
3652 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3653 return 0;
3654
Len Browne9be7dd2015-05-26 12:19:37 -0400[diff] [blame]3655 switch (msr & 0xF) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3656 case ENERGY_PERF_BIAS_PERFORMANCE:
3657 epb_string = "performance";
3658 break;
3659 case ENERGY_PERF_BIAS_NORMAL:
3660 epb_string = "balanced";
3661 break;
3662 case ENERGY_PERF_BIAS_POWERSAVE:
3663 epb_string = "powersave";
3664 break;
3665 default:
3666 epb_string = "custom";
3667 break;
3668 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3669 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3670
3671 return 0;
3672}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3673/*
3674 * print_hwp()
3675 * Decode the MSR_HWP_CAPABILITIES
3676 */
3677int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3678{
3679 unsigned long long msr;
3680 int cpu;
3681
3682 if (!has_hwp)
3683 return 0;
3684
3685 cpu = t->cpu_id;
3686
3687 /* MSR_HWP_CAPABILITIES is per-package */
3688 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3689 return 0;
3690
3691 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3692 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3693 return -1;
3694 }
3695
3696 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3697 return 0;
3698
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3699 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3700 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3701
3702 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3703 if ((msr & (1 << 0)) == 0)
3704 return 0;
3705
3706 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3707 return 0;
3708
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3709 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
Len Brown6dbd25a2017-03-04 18:18:28 -0500[diff] [blame]3710 "(high %d guar %d eff %d low %d)\n",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3711 cpu, msr,
3712 (unsigned int)HWP_HIGHEST_PERF(msr),
3713 (unsigned int)HWP_GUARANTEED_PERF(msr),
3714 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3715 (unsigned int)HWP_LOWEST_PERF(msr));
3716
3717 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3718 return 0;
3719
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3720 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
Len Brown6dbd25a2017-03-04 18:18:28 -0500[diff] [blame]3721 "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3722 cpu, msr,
3723 (unsigned int)(((msr) >> 0) & 0xff),
3724 (unsigned int)(((msr) >> 8) & 0xff),
3725 (unsigned int)(((msr) >> 16) & 0xff),
3726 (unsigned int)(((msr) >> 24) & 0xff),
3727 (unsigned int)(((msr) >> 32) & 0xff3),
3728 (unsigned int)(((msr) >> 42) & 0x1));
3729
3730 if (has_hwp_pkg) {
3731 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3732 return 0;
3733
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3734 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
Len Brown6dbd25a2017-03-04 18:18:28 -0500[diff] [blame]3735 "(min %d max %d des %d epp 0x%x window 0x%x)\n",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3736 cpu, msr,
3737 (unsigned int)(((msr) >> 0) & 0xff),
3738 (unsigned int)(((msr) >> 8) & 0xff),
3739 (unsigned int)(((msr) >> 16) & 0xff),
3740 (unsigned int)(((msr) >> 24) & 0xff),
3741 (unsigned int)(((msr) >> 32) & 0xff3));
3742 }
3743 if (has_hwp_notify) {
3744 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3745 return 0;
3746
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3747 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3748 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3749 cpu, msr,
3750 ((msr) & 0x1) ? "EN" : "Dis",
3751 ((msr) & 0x2) ? "EN" : "Dis");
3752 }
3753 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3754 return 0;
3755
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3756 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3757 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3758 cpu, msr,
3759 ((msr) & 0x1) ? "" : "No-",
3760 ((msr) & 0x2) ? "" : "No-");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3761
3762 return 0;
3763}
3764
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3765/*
3766 * print_perf_limit()
3767 */
3768int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3769{
3770 unsigned long long msr;
3771 int cpu;
3772
3773 cpu = t->cpu_id;
3774
3775 /* per-package */
3776 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3777 return 0;
3778
3779 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3780 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3781 return -1;
3782 }
3783
3784 if (do_core_perf_limit_reasons) {
3785 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3786 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3787 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]3788 (msr & 1 << 15) ? "bit15, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3789 (msr & 1 << 14) ? "bit14, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]3790 (msr & 1 << 13) ? "Transitions, " : "",
3791 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3792 (msr & 1 << 11) ? "PkgPwrL2, " : "",
3793 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3794 (msr & 1 << 9) ? "CorePwr, " : "",
3795 (msr & 1 << 8) ? "Amps, " : "",
3796 (msr & 1 << 6) ? "VR-Therm, " : "",
3797 (msr & 1 << 5) ? "Auto-HWP, " : "",
3798 (msr & 1 << 4) ? "Graphics, " : "",
3799 (msr & 1 << 2) ? "bit2, " : "",
3800 (msr & 1 << 1) ? "ThermStatus, " : "",
3801 (msr & 1 << 0) ? "PROCHOT, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3802 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]3803 (msr & 1 << 31) ? "bit31, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3804 (msr & 1 << 30) ? "bit30, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]3805 (msr & 1 << 29) ? "Transitions, " : "",
3806 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3807 (msr & 1 << 27) ? "PkgPwrL2, " : "",
3808 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3809 (msr & 1 << 25) ? "CorePwr, " : "",
3810 (msr & 1 << 24) ? "Amps, " : "",
3811 (msr & 1 << 22) ? "VR-Therm, " : "",
3812 (msr & 1 << 21) ? "Auto-HWP, " : "",
3813 (msr & 1 << 20) ? "Graphics, " : "",
3814 (msr & 1 << 18) ? "bit18, " : "",
3815 (msr & 1 << 17) ? "ThermStatus, " : "",
3816 (msr & 1 << 16) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3817
3818 }
3819 if (do_gfx_perf_limit_reasons) {
3820 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3821 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3822 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3823 (msr & 1 << 0) ? "PROCHOT, " : "",
3824 (msr & 1 << 1) ? "ThermStatus, " : "",
3825 (msr & 1 << 4) ? "Graphics, " : "",
3826 (msr & 1 << 6) ? "VR-Therm, " : "",
3827 (msr & 1 << 8) ? "Amps, " : "",
3828 (msr & 1 << 9) ? "GFXPwr, " : "",
3829 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3830 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3831 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3832 (msr & 1 << 16) ? "PROCHOT, " : "",
3833 (msr & 1 << 17) ? "ThermStatus, " : "",
3834 (msr & 1 << 20) ? "Graphics, " : "",
3835 (msr & 1 << 22) ? "VR-Therm, " : "",
3836 (msr & 1 << 24) ? "Amps, " : "",
3837 (msr & 1 << 25) ? "GFXPwr, " : "",
3838 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3839 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3840 }
3841 if (do_ring_perf_limit_reasons) {
3842 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3843 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3844 fprintf(outf, " (Active: %s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3845 (msr & 1 << 0) ? "PROCHOT, " : "",
3846 (msr & 1 << 1) ? "ThermStatus, " : "",
3847 (msr & 1 << 6) ? "VR-Therm, " : "",
3848 (msr & 1 << 8) ? "Amps, " : "",
3849 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3850 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3851 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3852 (msr & 1 << 16) ? "PROCHOT, " : "",
3853 (msr & 1 << 17) ? "ThermStatus, " : "",
3854 (msr & 1 << 22) ? "VR-Therm, " : "",
3855 (msr & 1 << 24) ? "Amps, " : "",
3856 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3857 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3858 }
3859 return 0;
3860}
3861
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3862#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
3863#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
3864
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]3865double get_tdp_intel(unsigned int model)
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3866{
3867 unsigned long long msr;
3868
3869 if (do_rapl & RAPL_PKG_POWER_INFO)
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3870 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3871 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3872
3873 switch (model) {
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]3874 case INTEL_FAM6_ATOM_SILVERMONT:
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]3875 case INTEL_FAM6_ATOM_SILVERMONT_D:
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3876 return 30.0;
3877 default:
3878 return 135.0;
3879 }
3880}
3881
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]3882double get_tdp_amd(unsigned int family)
3883{
3884 switch (family) {
3885 case 0x17:
Pu Wenc1c10cc2019-08-31 10:20:31 +0800[diff] [blame]3886 case 0x18:
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]3887 default:
3888 /* This is the max stock TDP of HEDT/Server Fam17h chips */
3889 return 250.0;
3890 }
3891}
3892
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]3893/*
3894 * rapl_dram_energy_units_probe()
3895 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3896 */
3897static double
3898rapl_dram_energy_units_probe(int model, double rapl_energy_units)
3899{
3900 /* only called for genuine_intel, family 6 */
3901
3902 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3903 case INTEL_FAM6_HASWELL_X: /* HSX */
3904 case INTEL_FAM6_BROADWELL_X: /* BDX */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3905 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]3906 return (rapl_dram_energy_units = 15.3 / 1000000);
3907 default:
3908 return (rapl_energy_units);
3909 }
3910}
3911
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]3912void rapl_probe_intel(unsigned int family, unsigned int model)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3913{
3914 unsigned long long msr;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3915 unsigned int time_unit;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3916 double tdp;
3917
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3918 if (family != 6)
3919 return;
3920
3921 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3922 case INTEL_FAM6_SANDYBRIDGE:
3923 case INTEL_FAM6_IVYBRIDGE:
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]3924 case INTEL_FAM6_HASWELL: /* HSW */
Ingo Molnar77e55172019-09-02 09:10:07 +0200[diff] [blame]3925 case INTEL_FAM6_HASWELL_L: /* HSW */
Peter Zijlstra5e741402019-08-27 21:48:23 +0200[diff] [blame]3926 case INTEL_FAM6_HASWELL_G: /* HSW */
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]3927 case INTEL_FAM6_BROADWELL: /* BDW */
Peter Zijlstra5e741402019-08-27 21:48:23 +0200[diff] [blame]3928 case INTEL_FAM6_BROADWELL_G: /* BDW */
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3929 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]3930 if (rapl_joules) {
3931 BIC_PRESENT(BIC_Pkg_J);
3932 BIC_PRESENT(BIC_Cor_J);
3933 BIC_PRESENT(BIC_GFX_J);
3934 } else {
3935 BIC_PRESENT(BIC_PkgWatt);
3936 BIC_PRESENT(BIC_CorWatt);
3937 BIC_PRESENT(BIC_GFXWatt);
3938 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3939 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3940 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]3941 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]3942 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]3943 if (rapl_joules)
3944 BIC_PRESENT(BIC_Pkg_J);
3945 else
3946 BIC_PRESENT(BIC_PkgWatt);
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]3947 break;
Chen Yuf6708402020-03-18 18:55:48 +0800[diff] [blame]3948 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
3949 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
3950 if (rapl_joules) {
3951 BIC_PRESENT(BIC_Pkg_J);
3952 BIC_PRESENT(BIC_Cor_J);
3953 BIC_PRESENT(BIC_RAM_J);
3954 BIC_PRESENT(BIC_GFX_J);
3955 } else {
3956 BIC_PRESENT(BIC_PkgWatt);
3957 BIC_PRESENT(BIC_CorWatt);
3958 BIC_PRESENT(BIC_RAMWatt);
3959 BIC_PRESENT(BIC_GFXWatt);
3960 }
3961 break;
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]3962 case INTEL_FAM6_SKYLAKE_L: /* SKL */
3963 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
Len Brown81824922017-03-04 17:23:07 -0500[diff] [blame]3964 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]3965 BIC_PRESENT(BIC_PKG__);
3966 BIC_PRESENT(BIC_RAM__);
3967 if (rapl_joules) {
3968 BIC_PRESENT(BIC_Pkg_J);
3969 BIC_PRESENT(BIC_Cor_J);
3970 BIC_PRESENT(BIC_RAM_J);
Len Brown81824922017-03-04 17:23:07 -0500[diff] [blame]3971 BIC_PRESENT(BIC_GFX_J);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]3972 } else {
3973 BIC_PRESENT(BIC_PkgWatt);
3974 BIC_PRESENT(BIC_CorWatt);
3975 BIC_PRESENT(BIC_RAMWatt);
Len Brown81824922017-03-04 17:23:07 -0500[diff] [blame]3976 BIC_PRESENT(BIC_GFXWatt);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]3977 }
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]3978 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3979 case INTEL_FAM6_HASWELL_X: /* HSX */
3980 case INTEL_FAM6_BROADWELL_X: /* BDX */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3981 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3982 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]3983 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]3984 BIC_PRESENT(BIC_PKG__);
3985 BIC_PRESENT(BIC_RAM__);
3986 if (rapl_joules) {
3987 BIC_PRESENT(BIC_Pkg_J);
3988 BIC_PRESENT(BIC_RAM_J);
3989 } else {
3990 BIC_PRESENT(BIC_PkgWatt);
3991 BIC_PRESENT(BIC_RAMWatt);
3992 }
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]3993 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]3994 case INTEL_FAM6_SANDYBRIDGE_X:
3995 case INTEL_FAM6_IVYBRIDGE_X:
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]3996 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]3997 BIC_PRESENT(BIC_PKG__);
3998 BIC_PRESENT(BIC_RAM__);
3999 if (rapl_joules) {
4000 BIC_PRESENT(BIC_Pkg_J);
4001 BIC_PRESENT(BIC_Cor_J);
4002 BIC_PRESENT(BIC_RAM_J);
4003 } else {
4004 BIC_PRESENT(BIC_PkgWatt);
4005 BIC_PRESENT(BIC_CorWatt);
4006 BIC_PRESENT(BIC_RAMWatt);
4007 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4008 break;
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]4009 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]4010 case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */
Jacob Pan91484942016-06-16 09:48:20 -0700[diff] [blame]4011 do_rapl = RAPL_PKG | RAPL_CORES;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4012 if (rapl_joules) {
4013 BIC_PRESENT(BIC_Pkg_J);
4014 BIC_PRESENT(BIC_Cor_J);
4015 } else {
4016 BIC_PRESENT(BIC_PkgWatt);
4017 BIC_PRESENT(BIC_CorWatt);
4018 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4019 break;
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]4020 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
Jacob Pan0f644902016-06-16 09:48:22 -0700[diff] [blame]4021 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4022 BIC_PRESENT(BIC_PKG__);
4023 BIC_PRESENT(BIC_RAM__);
4024 if (rapl_joules) {
4025 BIC_PRESENT(BIC_Pkg_J);
4026 BIC_PRESENT(BIC_Cor_J);
4027 BIC_PRESENT(BIC_RAM_J);
4028 } else {
4029 BIC_PRESENT(BIC_PkgWatt);
4030 BIC_PRESENT(BIC_CorWatt);
4031 BIC_PRESENT(BIC_RAMWatt);
4032 }
Jacob Pan0f644902016-06-16 09:48:22 -0700[diff] [blame]4033 break;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4034 default:
4035 return;
4036 }
4037
4038 /* units on package 0, verify later other packages match */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]4039 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4040 return;
4041
4042 rapl_power_units = 1.0 / (1 << (msr & 0xF));
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]4043 if (model == INTEL_FAM6_ATOM_SILVERMONT)
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4044 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
4045 else
4046 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4047
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]4048 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
4049
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4050 time_unit = msr >> 16 & 0xF;
4051 if (time_unit == 0)
4052 time_unit = 0xA;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4053
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4054 rapl_time_units = 1.0 / (1 << (time_unit));
4055
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4056 tdp = get_tdp_intel(model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4057
4058 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4059 if (!quiet)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4060 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4061}
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4062
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4063void rapl_probe_amd(unsigned int family, unsigned int model)
4064{
4065 unsigned long long msr;
4066 unsigned int eax, ebx, ecx, edx;
4067 unsigned int has_rapl = 0;
4068 double tdp;
4069
4070 if (max_extended_level >= 0x80000007) {
4071 __cpuid(0x80000007, eax, ebx, ecx, edx);
4072 /* RAPL (Fam 17h) */
4073 has_rapl = edx & (1 << 14);
4074 }
4075
4076 if (!has_rapl)
4077 return;
4078
4079 switch (family) {
4080 case 0x17: /* Zen, Zen+ */
Pu Wenc1c10cc2019-08-31 10:20:31 +0800[diff] [blame]4081 case 0x18: /* Hygon Dhyana */
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4082 do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
Calvin Walton3316f992018-08-17 12:34:42 -0400[diff] [blame]4083 if (rapl_joules) {
4084 BIC_PRESENT(BIC_Pkg_J);
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4085 BIC_PRESENT(BIC_Cor_J);
Calvin Walton3316f992018-08-17 12:34:42 -0400[diff] [blame]4086 } else {
4087 BIC_PRESENT(BIC_PkgWatt);
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4088 BIC_PRESENT(BIC_CorWatt);
Calvin Walton3316f992018-08-17 12:34:42 -0400[diff] [blame]4089 }
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4090 break;
4091 default:
4092 return;
4093 }
4094
4095 if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4096 return;
4097
4098 rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4099 rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4100 rapl_power_units = ldexp(1.0, -(msr & 0xf));
4101
Pu Wen9cfa8e02019-08-31 10:19:58 +0800[diff] [blame]4102 tdp = get_tdp_amd(family);
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4103
4104 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4105 if (!quiet)
4106 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4107}
4108
4109/*
4110 * rapl_probe()
4111 *
4112 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4113 */
4114void rapl_probe(unsigned int family, unsigned int model)
4115{
4116 if (genuine_intel)
4117 rapl_probe_intel(family, model);
Pu Wenc1c10cc2019-08-31 10:20:31 +0800[diff] [blame]4118 if (authentic_amd || hygon_genuine)
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4119 rapl_probe_amd(family, model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4120}
4121
Colin Ian King1b693172016-03-02 13:50:25 +0000[diff] [blame]4122void perf_limit_reasons_probe(unsigned int family, unsigned int model)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]4123{
4124 if (!genuine_intel)
4125 return;
4126
4127 if (family != 6)
4128 return;
4129
4130 switch (model) {
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]4131 case INTEL_FAM6_HASWELL: /* HSW */
Ingo Molnar77e55172019-09-02 09:10:07 +0200[diff] [blame]4132 case INTEL_FAM6_HASWELL_L: /* HSW */
Peter Zijlstra5e741402019-08-27 21:48:23 +0200[diff] [blame]4133 case INTEL_FAM6_HASWELL_G: /* HSW */
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]4134 do_gfx_perf_limit_reasons = 1;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]4135 case INTEL_FAM6_HASWELL_X: /* HSX */
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]4136 do_core_perf_limit_reasons = 1;
4137 do_ring_perf_limit_reasons = 1;
4138 default:
4139 return;
4140 }
4141}
4142
Artem Bityutskiyac980e12017-09-05 15:14:08 +0300[diff] [blame]4143void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4144{
4145 if (is_skx(family, model) || is_bdx(family, model))
4146 has_automatic_cstate_conversion = 1;
4147}
4148
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4149int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4150{
4151 unsigned long long msr;
Len Brownf4896fa52017-03-04 18:10:45 -0500[diff] [blame]4152 unsigned int dts, dts2;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4153 int cpu;
4154
4155 if (!(do_dts || do_ptm))
4156 return 0;
4157
4158 cpu = t->cpu_id;
4159
4160 /* DTS is per-core, no need to print for each thread */
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]4161 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4162 return 0;
4163
4164 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4165 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4166 return -1;
4167 }
4168
4169 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4170 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4171 return 0;
4172
4173 dts = (msr >> 16) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4174 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4175 cpu, msr, tcc_activation_temp - dts);
4176
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4177 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4178 return 0;
4179
4180 dts = (msr >> 16) & 0x7F;
4181 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4182 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4183 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4184 }
4185
4186
Len Brownf4896fa52017-03-04 18:10:45 -0500[diff] [blame]4187 if (do_dts && debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4188 unsigned int resolution;
4189
4190 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4191 return 0;
4192
4193 dts = (msr >> 16) & 0x7F;
4194 resolution = (msr >> 27) & 0xF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4195 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4196 cpu, msr, tcc_activation_temp - dts, resolution);
4197
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4198 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4199 return 0;
4200
4201 dts = (msr >> 16) & 0x7F;
4202 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4203 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4204 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4205 }
4206
4207 return 0;
4208}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]4209
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4210void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4211{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4212 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4213 cpu, label,
4214 ((msr >> 15) & 1) ? "EN" : "DIS",
4215 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4216 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4217 (((msr >> 16) & 1) ? "EN" : "DIS"));
4218
4219 return;
4220}
4221
4222int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4223{
4224 unsigned long long msr;
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4225 const char *msr_name;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4226 int cpu;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4227
4228 if (!do_rapl)
4229 return 0;
4230
4231 /* RAPL counters are per package, so print only for 1st thread/package */
4232 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4233 return 0;
4234
4235 cpu = t->cpu_id;
4236 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4237 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4238 return -1;
4239 }
4240
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4241 if (do_rapl & RAPL_AMD_F17H) {
4242 msr_name = "MSR_RAPL_PWR_UNIT";
4243 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4244 return -1;
4245 } else {
4246 msr_name = "MSR_RAPL_POWER_UNIT";
4247 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4248 return -1;
4249 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4250
Calvin Walton9392bd92018-08-17 12:34:41 -0400[diff] [blame]4251 fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4252 rapl_power_units, rapl_energy_units, rapl_time_units);
4253
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4254 if (do_rapl & RAPL_PKG_POWER_INFO) {
4255
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4256 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4257 return -5;
4258
4259
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4260 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4261 cpu, msr,
4262 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4263 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4264 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4265 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4266
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4267 }
4268 if (do_rapl & RAPL_PKG) {
4269
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4270 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4271 return -9;
4272
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4273 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4274 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4275
4276 print_power_limit_msr(cpu, msr, "PKG Limit #1");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4277 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4278 cpu,
4279 ((msr >> 47) & 1) ? "EN" : "DIS",
4280 ((msr >> 32) & 0x7FFF) * rapl_power_units,
4281 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4282 ((msr >> 48) & 1) ? "EN" : "DIS");
4283 }
4284
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]4285 if (do_rapl & RAPL_DRAM_POWER_INFO) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4286 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4287 return -6;
4288
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4289 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4290 cpu, msr,
4291 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4292 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4293 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4294 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]4295 }
4296 if (do_rapl & RAPL_DRAM) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4297 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4298 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4299 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4300 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4301
4302 print_power_limit_msr(cpu, msr, "DRAM Limit");
4303 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4304 if (do_rapl & RAPL_CORE_POLICY) {
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4305 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4306 return -7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4307
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4308 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4309 }
Jacob Pan91484942016-06-16 09:48:20 -0700[diff] [blame]4310 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4311 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4312 return -9;
4313 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4314 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4315 print_power_limit_msr(cpu, msr, "Cores Limit");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4316 }
4317 if (do_rapl & RAPL_GFX) {
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4318 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4319 return -8;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4320
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4321 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4322
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4323 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4324 return -9;
4325 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4326 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4327 print_power_limit_msr(cpu, msr, "GFX Limit");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4328 }
4329 return 0;
4330}
4331
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4332/*
4333 * SNB adds support for additional MSRs:
4334 *
4335 * MSR_PKG_C7_RESIDENCY 0x000003fa
4336 * MSR_CORE_C7_RESIDENCY 0x000003fe
4337 * MSR_PKG_C2_RESIDENCY 0x0000060d
4338 */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4339
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4340int has_snb_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4341{
4342 if (!genuine_intel)
4343 return 0;
4344
4345 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]4346 case INTEL_FAM6_SANDYBRIDGE:
4347 case INTEL_FAM6_SANDYBRIDGE_X:
Ingo Molnar77e55172019-09-02 09:10:07 +0200[diff] [blame]4348 case INTEL_FAM6_IVYBRIDGE: /* IVB */
4349 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
4350 case INTEL_FAM6_HASWELL: /* HSW */
4351 case INTEL_FAM6_HASWELL_X: /* HSW */
4352 case INTEL_FAM6_HASWELL_L: /* HSW */
4353 case INTEL_FAM6_HASWELL_G: /* HSW */
4354 case INTEL_FAM6_BROADWELL: /* BDW */
4355 case INTEL_FAM6_BROADWELL_G: /* BDW */
4356 case INTEL_FAM6_BROADWELL_X: /* BDX */
4357 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4358 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
4359 case INTEL_FAM6_SKYLAKE_X: /* SKX */
4360 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]4361 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]4362 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
Chen Yuf6708402020-03-18 18:55:48 +0800[diff] [blame]4363 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4364 return 1;
4365 }
4366 return 0;
4367}
4368
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4369/*
Len Brown570992f2019-08-31 14:16:07 -0400[diff] [blame]4370 * HSW ULT added support for C8/C9/C10 MSRs:
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4371 *
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]4372 * MSR_PKG_C8_RESIDENCY 0x00000630
4373 * MSR_PKG_C9_RESIDENCY 0x00000631
4374 * MSR_PKG_C10_RESIDENCY 0x00000632
4375 *
4376 * MSR_PKGC8_IRTL 0x00000633
4377 * MSR_PKGC9_IRTL 0x00000634
4378 * MSR_PKGC10_IRTL 0x00000635
4379 *
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4380 */
Len Brown570992f2019-08-31 14:16:07 -0400[diff] [blame]4381int has_c8910_msrs(unsigned int family, unsigned int model)
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]4382{
4383 if (!genuine_intel)
4384 return 0;
4385
4386 switch (model) {
Ingo Molnar77e55172019-09-02 09:10:07 +0200[diff] [blame]4387 case INTEL_FAM6_HASWELL_L: /* HSW */
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]4388 case INTEL_FAM6_BROADWELL: /* BDW */
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4389 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4390 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]4391 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]4392 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
Chen Yuf6708402020-03-18 18:55:48 +0800[diff] [blame]4393 case INTEL_FAM6_ATOM_TREMONT: /* EHL */
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]4394 return 1;
4395 }
4396 return 0;
4397}
4398
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]4399/*
4400 * SKL adds support for additional MSRS:
4401 *
4402 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
4403 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
4404 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
4405 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
4406 */
4407int has_skl_msrs(unsigned int family, unsigned int model)
4408{
4409 if (!genuine_intel)
4410 return 0;
4411
4412 switch (model) {
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4413 case INTEL_FAM6_SKYLAKE_L: /* SKL */
4414 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]4415 return 1;
4416 }
4417 return 0;
4418}
4419
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4420int is_slm(unsigned int family, unsigned int model)
4421{
4422 if (!genuine_intel)
4423 return 0;
4424 switch (model) {
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]4425 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]4426 case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4427 return 1;
4428 }
4429 return 0;
4430}
4431
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]4432int is_knl(unsigned int family, unsigned int model)
4433{
4434 if (!genuine_intel)
4435 return 0;
4436 switch (model) {
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]4437 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]4438 return 1;
4439 }
4440 return 0;
4441}
4442
Srinivas Pandruvada997e5392018-05-31 10:39:07 -0700[diff] [blame]4443int is_cnl(unsigned int family, unsigned int model)
4444{
4445 if (!genuine_intel)
4446 return 0;
4447
4448 switch (model) {
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4449 case INTEL_FAM6_CANNONLAKE_L: /* CNL */
Srinivas Pandruvada997e5392018-05-31 10:39:07 -0700[diff] [blame]4450 return 1;
4451 }
4452
4453 return 0;
4454}
4455
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]4456unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4457{
4458 if (is_knl(family, model))
4459 return 1024;
4460 return 1;
4461}
4462
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4463#define SLM_BCLK_FREQS 5
4464double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4465
4466double slm_bclk(void)
4467{
4468 unsigned long long msr = 3;
4469 unsigned int i;
4470 double freq;
4471
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]4472 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4473 fprintf(outf, "SLM BCLK: unknown\n");
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4474
4475 i = msr & 0xf;
4476 if (i >= SLM_BCLK_FREQS) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4477 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
Colin Ian King0a91e552016-04-25 13:03:15 +0100[diff] [blame]4478 i = 3;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4479 }
4480 freq = slm_freq_table[i];
4481
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4482 if (!quiet)
Len Brown8f6196c2017-01-07 22:40:23 -0500[diff] [blame]4483 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4484
4485 return freq;
4486}
4487
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4488double discover_bclk(unsigned int family, unsigned int model)
4489{
Chrzaniuk, Hubert121b48b2016-02-10 16:35:17 +0100[diff] [blame]4490 if (has_snb_msrs(family, model) || is_knl(family, model))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4491 return 100.00;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4492 else if (is_slm(family, model))
4493 return slm_bclk();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4494 else
4495 return 133.33;
4496}
4497
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4498/*
4499 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4500 * the Thermal Control Circuit (TCC) activates.
4501 * This is usually equal to tjMax.
4502 *
4503 * Older processors do not have this MSR, so there we guess,
4504 * but also allow cmdline over-ride with -T.
4505 *
4506 * Several MSR temperature values are in units of degrees-C
4507 * below this value, including the Digital Thermal Sensor (DTS),
4508 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4509 */
4510int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4511{
4512 unsigned long long msr;
4513 unsigned int target_c_local;
4514 int cpu;
4515
4516 /* tcc_activation_temp is used only for dts or ptm */
4517 if (!(do_dts || do_ptm))
4518 return 0;
4519
4520 /* this is a per-package concept */
4521 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4522 return 0;
4523
4524 cpu = t->cpu_id;
4525 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4526 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4527 return -1;
4528 }
4529
4530 if (tcc_activation_temp_override != 0) {
4531 tcc_activation_temp = tcc_activation_temp_override;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4532 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4533 cpu, tcc_activation_temp);
4534 return 0;
4535 }
4536
4537 /* Temperature Target MSR is Nehalem and newer only */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4538 if (!do_nhm_platform_info)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4539 goto guess;
4540
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]4541 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4542 goto guess;
4543
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]4544 target_c_local = (msr >> 16) & 0xFF;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4545
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4546 if (!quiet)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4547 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4548 cpu, msr, target_c_local);
4549
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]4550 if (!target_c_local)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4551 goto guess;
4552
4553 tcc_activation_temp = target_c_local;
4554
4555 return 0;
4556
4557guess:
4558 tcc_activation_temp = TJMAX_DEFAULT;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4559 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4560 cpu, tcc_activation_temp);
4561
4562 return 0;
4563}
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]4564
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]4565void decode_feature_control_msr(void)
4566{
4567 unsigned long long msr;
4568
Sean Christophersonf6505c82019-12-20 20:44:57 -0800[diff] [blame]4569 if (!get_msr(base_cpu, MSR_IA32_FEAT_CTL, &msr))
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]4570 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4571 base_cpu, msr,
Sean Christophersonf6505c82019-12-20 20:44:57 -0800[diff] [blame]4572 msr & FEAT_CTL_LOCKED ? "" : "UN-",
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]4573 msr & (1 << 18) ? "SGX" : "");
4574}
4575
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]4576void decode_misc_enable_msr(void)
4577{
4578 unsigned long long msr;
4579
Len Brownf26b1512017-06-23 20:45:54 -0700[diff] [blame]4580 if (!genuine_intel)
4581 return;
4582
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]4583 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
Len Browne6512622017-01-11 23:17:24 -0500[diff] [blame]4584 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]4585 base_cpu, msr,
Len Browne6512622017-01-11 23:17:24 -0500[diff] [blame]4586 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4587 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
Len Brownfd3933c2017-11-08 23:15:42 -0500[diff] [blame]4588 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
Len Browne6512622017-01-11 23:17:24 -0500[diff] [blame]4589 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4590 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]4591}
4592
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]4593void decode_misc_feature_control(void)
4594{
4595 unsigned long long msr;
4596
4597 if (!has_misc_feature_control)
4598 return;
4599
4600 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4601 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4602 base_cpu, msr,
4603 msr & (0 << 0) ? "No-" : "",
4604 msr & (1 << 0) ? "No-" : "",
4605 msr & (2 << 0) ? "No-" : "",
4606 msr & (3 << 0) ? "No-" : "");
4607}
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]4608/*
4609 * Decode MSR_MISC_PWR_MGMT
4610 *
4611 * Decode the bits according to the Nehalem documentation
4612 * bit[0] seems to continue to have same meaning going forward
4613 * bit[1] less so...
4614 */
4615void decode_misc_pwr_mgmt_msr(void)
4616{
4617 unsigned long long msr;
4618
4619 if (!do_nhm_platform_info)
4620 return;
4621
Len Browncf4cbe52017-01-01 13:08:33 -0500[diff] [blame]4622 if (no_MSR_MISC_PWR_MGMT)
4623 return;
4624
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]4625 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
Srinivas Pandruvadaddadb8a2016-11-11 14:29:48 -0800[diff] [blame]4626 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]4627 base_cpu, msr,
4628 msr & (1 << 0) ? "DIS" : "EN",
Srinivas Pandruvadaddadb8a2016-11-11 14:29:48 -0800[diff] [blame]4629 msr & (1 << 1) ? "EN" : "DIS",
4630 msr & (1 << 8) ? "EN" : "DIS");
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]4631}
Len Brown71616c82017-01-07 22:37:48 -0500[diff] [blame]4632/*
4633 * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4634 *
4635 * This MSRs are present on Silvermont processors,
4636 * Intel Atom processor E3000 series (Baytrail), and friends.
4637 */
4638void decode_c6_demotion_policy_msr(void)
4639{
4640 unsigned long long msr;
4641
4642 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4643 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4644 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4645
4646 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4647 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4648 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4649}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]4650
Len Brownf5a4c762018-12-14 16:26:37 -0500[diff] [blame]4651/*
4652 * When models are the same, for the purpose of turbostat, reuse
4653 */
4654unsigned int intel_model_duplicates(unsigned int model)
4655{
4656
4657 switch(model) {
4658 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
4659 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
4660 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
4661 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */
4662 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */
4663 return INTEL_FAM6_NEHALEM;
4664
4665 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
4666 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
4667 return INTEL_FAM6_NEHALEM_EX;
4668
4669 case INTEL_FAM6_XEON_PHI_KNM:
4670 return INTEL_FAM6_XEON_PHI_KNL;
4671
Len Brownf5a4c762018-12-14 16:26:37 -0500[diff] [blame]4672 case INTEL_FAM6_BROADWELL_X:
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]4673 case INTEL_FAM6_BROADWELL_D: /* BDX-DE */
Len Brownf5a4c762018-12-14 16:26:37 -0500[diff] [blame]4674 return INTEL_FAM6_BROADWELL_X;
4675
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4676 case INTEL_FAM6_SKYLAKE_L:
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]4677 case INTEL_FAM6_SKYLAKE:
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4678 case INTEL_FAM6_KABYLAKE_L:
Peter Zijlstrac66f78a2019-08-27 21:48:21 +0200[diff] [blame]4679 case INTEL_FAM6_KABYLAKE:
Chen Yu081c5432019-10-31 21:14:22 +0800[diff] [blame]4680 case INTEL_FAM6_COMETLAKE_L:
4681 case INTEL_FAM6_COMETLAKE:
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4682 return INTEL_FAM6_SKYLAKE_L;
Len Brown937807d2019-03-19 19:09:07 -0400[diff] [blame]4683
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4684 case INTEL_FAM6_ICELAKE_L:
Rajneesh Bhardwajd93ea562019-06-14 13:09:46 +0530[diff] [blame]4685 case INTEL_FAM6_ICELAKE_NNPI:
Chen Yu4bf71322020-01-14 12:04:55 +0800[diff] [blame]4686 case INTEL_FAM6_TIGERLAKE_L:
4687 case INTEL_FAM6_TIGERLAKE:
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4688 return INTEL_FAM6_CANNONLAKE_L;
Zhang Ruib62b3182019-04-21 16:30:22 +0800[diff] [blame]4689
Ingo Molnar77e55172019-09-02 09:10:07 +0200[diff] [blame]4690 case INTEL_FAM6_ATOM_TREMONT_D:
4691 return INTEL_FAM6_ATOM_GOLDMONT_D;
Chen Yu23274fa2020-01-14 12:06:49 +0800[diff] [blame]4692
Chen Yud7814c32020-01-14 12:09:45 +0800[diff] [blame]4693 case INTEL_FAM6_ATOM_TREMONT_L:
4694 return INTEL_FAM6_ATOM_TREMONT;
4695
Chen Yu23274fa2020-01-14 12:06:49 +0800[diff] [blame]4696 case INTEL_FAM6_ICELAKE_X:
4697 return INTEL_FAM6_SKYLAKE_X;
Len Brownf5a4c762018-12-14 16:26:37 -0500[diff] [blame]4698 }
4699 return model;
4700}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]4701void process_cpuid()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4702{
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]4703 unsigned int eax, ebx, ecx, edx;
4704 unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
Len Brownb3a34e92017-01-21 00:50:08 -0500[diff] [blame]4705 unsigned int has_turbo;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4706
4707 eax = ebx = ecx = edx = 0;
4708
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]4709 __cpuid(0, max_level, ebx, ecx, edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4710
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]4711 if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4712 genuine_intel = 1;
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]4713 else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
4714 authentic_amd = 1;
Pu Wenc1c10cc2019-08-31 10:20:31 +0800[diff] [blame]4715 else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e)
4716 hygon_genuine = 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4717
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4718 if (!quiet)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4719 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4720 (char *)&ebx, (char *)&edx, (char *)&ecx);
4721
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]4722 __cpuid(1, fms, ebx, ecx, edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4723 family = (fms >> 8) & 0xf;
4724 model = (fms >> 4) & 0xf;
4725 stepping = fms & 0xf;
Calvin Walton5aa3d1a2018-07-27 07:50:53 -0400[diff] [blame]4726 if (family == 0xf)
4727 family += (fms >> 20) & 0xff;
4728 if (family >= 6)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4729 model += ((fms >> 16) & 0xf) << 4;
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]4730 ecx_flags = ecx;
4731 edx_flags = edx;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4732
4733 /*
4734 * check max extended function levels of CPUID.
4735 * This is needed to check for invariant TSC.
4736 * This check is valid for both Intel and AMD.
4737 */
4738 ebx = ecx = edx = 0;
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]4739 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4740
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]4741 if (!quiet) {
4742 fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4743 max_level, max_extended_level, family, model, stepping, family, model, stepping);
4744 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
4745 ecx_flags & (1 << 0) ? "SSE3" : "-",
4746 ecx_flags & (1 << 3) ? "MONITOR" : "-",
4747 ecx_flags & (1 << 6) ? "SMX" : "-",
4748 ecx_flags & (1 << 7) ? "EIST" : "-",
4749 ecx_flags & (1 << 8) ? "TM2" : "-",
4750 edx_flags & (1 << 4) ? "TSC" : "-",
4751 edx_flags & (1 << 5) ? "MSR" : "-",
4752 edx_flags & (1 << 22) ? "ACPI-TM" : "-",
4753 edx_flags & (1 << 28) ? "HT" : "-",
4754 edx_flags & (1 << 29) ? "TM" : "-");
4755 }
Len Brownf5a4c762018-12-14 16:26:37 -0500[diff] [blame]4756 if (genuine_intel)
4757 model = intel_model_duplicates(model);
Len Brown34041552018-08-07 20:22:28 -0400[diff] [blame]4758
4759 if (!(edx_flags & (1 << 5)))
4760 errx(1, "CPUID: no MSR");
4761
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]4762 if (max_extended_level >= 0x80000007) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4763
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4764 /*
4765 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4766 * this check is valid for both Intel and AMD
4767 */
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]4768 __cpuid(0x80000007, eax, ebx, ecx, edx);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4769 has_invariant_tsc = edx & (1 << 8);
4770 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4771
4772 /*
4773 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4774 * this check is valid for both Intel and AMD
4775 */
4776
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]4777 __cpuid(0x6, eax, ebx, ecx, edx);
Thomas Renninger8209e052011-01-21 15:11:19 +0100[diff] [blame]4778 has_aperf = ecx & (1 << 0);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4779 if (has_aperf) {
4780 BIC_PRESENT(BIC_Avg_MHz);
4781 BIC_PRESENT(BIC_Busy);
4782 BIC_PRESENT(BIC_Bzy_MHz);
4783 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4784 do_dts = eax & (1 << 0);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4785 if (do_dts)
4786 BIC_PRESENT(BIC_CoreTmp);
Len Brownb3a34e92017-01-21 00:50:08 -0500[diff] [blame]4787 has_turbo = eax & (1 << 1);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4788 do_ptm = eax & (1 << 6);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4789 if (do_ptm)
4790 BIC_PRESENT(BIC_PkgTmp);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]4791 has_hwp = eax & (1 << 7);
4792 has_hwp_notify = eax & (1 << 8);
4793 has_hwp_activity_window = eax & (1 << 9);
4794 has_hwp_epp = eax & (1 << 10);
4795 has_hwp_pkg = eax & (1 << 11);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4796 has_epb = ecx & (1 << 3);
4797
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4798 if (!quiet)
Len Brownb3a34e92017-01-21 00:50:08 -0500[diff] [blame]4799 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]4800 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4801 has_aperf ? "" : "No-",
Len Brownb3a34e92017-01-21 00:50:08 -0500[diff] [blame]4802 has_turbo ? "" : "No-",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]4803 do_dts ? "" : "No-",
4804 do_ptm ? "" : "No-",
4805 has_hwp ? "" : "No-",
4806 has_hwp_notify ? "" : "No-",
4807 has_hwp_activity_window ? "" : "No-",
4808 has_hwp_epp ? "" : "No-",
4809 has_hwp_pkg ? "" : "No-",
4810 has_epb ? "" : "No-");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4811
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4812 if (!quiet)
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]4813 decode_misc_enable_msr();
4814
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]4815
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4816 if (max_level >= 0x7 && !quiet) {
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]4817 int has_sgx;
4818
4819 ecx = 0;
4820
4821 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4822
4823 has_sgx = ebx & (1 << 2);
4824 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4825
4826 if (has_sgx)
4827 decode_feature_control_msr();
4828 }
4829
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]4830 if (max_level >= 0x15) {
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]4831 unsigned int eax_crystal;
4832 unsigned int ebx_tsc;
4833
4834 /*
4835 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4836 */
4837 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]4838 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]4839
4840 if (ebx_tsc != 0) {
4841
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4842 if (!quiet && (ebx != 0))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4843 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]4844 eax_crystal, ebx_tsc, crystal_hz);
4845
4846 if (crystal_hz == 0)
4847 switch(model) {
Peter Zijlstraaf239c42019-08-27 21:48:22 +0200[diff] [blame]4848 case INTEL_FAM6_SKYLAKE_L: /* SKL */
Len Browne8efbc82016-04-06 17:15:57 -0400[diff] [blame]4849 crystal_hz = 24000000; /* 24.0 MHz */
4850 break;
Peter Zijlstra5ebb34e2019-08-27 21:48:24 +0200[diff] [blame]4851 case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */
Len Brownec53e592016-04-06 17:15:58 -0400[diff] [blame]4852 crystal_hz = 25000000; /* 25.0 MHz */
4853 break;
Len Brown869ce69e2016-06-16 23:22:37 -0400[diff] [blame]4854 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
Peter Zijlstraf2c4db12018-08-07 10:17:27 -0700[diff] [blame]4855 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
Len Browne8efbc82016-04-06 17:15:57 -0400[diff] [blame]4856 crystal_hz = 19200000; /* 19.2 MHz */
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]4857 break;
4858 default:
4859 crystal_hz = 0;
4860 }
4861
4862 if (crystal_hz) {
4863 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4864 if (!quiet)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4865 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]4866 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
4867 }
4868 }
4869 }
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]4870 if (max_level >= 0x16) {
4871 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4872
4873 /*
4874 * CPUID 16H Base MHz, Max MHz, Bus MHz
4875 */
4876 base_mhz = max_mhz = bus_mhz = edx = 0;
4877
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]4878 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4879 if (!quiet)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]4880 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]4881 base_mhz, max_mhz, bus_mhz);
4882 }
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]4883
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]4884 if (has_aperf)
4885 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4886
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4887 BIC_PRESENT(BIC_IRQ);
4888 BIC_PRESENT(BIC_TSC_MHz);
4889
4890 if (probe_nhm_msrs(family, model)) {
4891 do_nhm_platform_info = 1;
4892 BIC_PRESENT(BIC_CPU_c1);
4893 BIC_PRESENT(BIC_CPU_c3);
4894 BIC_PRESENT(BIC_CPU_c6);
4895 BIC_PRESENT(BIC_SMI);
4896 }
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]4897 do_snb_cstates = has_snb_msrs(family, model);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4898
4899 if (do_snb_cstates)
4900 BIC_PRESENT(BIC_CPU_c7);
4901
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]4902 do_irtl_snb = has_snb_msrs(family, model);
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]4903 if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4904 BIC_PRESENT(BIC_Pkgpc2);
4905 if (pkg_cstate_limit >= PCL__3)
4906 BIC_PRESENT(BIC_Pkgpc3);
4907 if (pkg_cstate_limit >= PCL__6)
4908 BIC_PRESENT(BIC_Pkgpc6);
4909 if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4910 BIC_PRESENT(BIC_Pkgpc7);
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]4911 if (has_slv_msrs(family, model)) {
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]4912 BIC_NOT_PRESENT(BIC_Pkgpc2);
4913 BIC_NOT_PRESENT(BIC_Pkgpc3);
4914 BIC_PRESENT(BIC_Pkgpc6);
4915 BIC_NOT_PRESENT(BIC_Pkgpc7);
Len Brown0539ba112017-02-10 00:27:20 -0500[diff] [blame]4916 BIC_PRESENT(BIC_Mod_c6);
4917 use_c1_residency_msr = 1;
4918 }
Len Brown7170a372017-01-27 02:13:27 -0500[diff] [blame]4919 if (is_dnv(family, model)) {
4920 BIC_PRESENT(BIC_CPU_c1);
4921 BIC_NOT_PRESENT(BIC_CPU_c3);
4922 BIC_NOT_PRESENT(BIC_Pkgpc3);
4923 BIC_NOT_PRESENT(BIC_CPU_c7);
4924 BIC_NOT_PRESENT(BIC_Pkgpc7);
4925 use_c1_residency_msr = 1;
4926 }
Len Brown34c761972017-01-27 02:36:41 -0500[diff] [blame]4927 if (is_skx(family, model)) {
4928 BIC_NOT_PRESENT(BIC_CPU_c3);
4929 BIC_NOT_PRESENT(BIC_Pkgpc3);
4930 BIC_NOT_PRESENT(BIC_CPU_c7);
4931 BIC_NOT_PRESENT(BIC_Pkgpc7);
4932 }
Len Brownade0eba2017-02-10 01:56:47 -0500[diff] [blame]4933 if (is_bdx(family, model)) {
4934 BIC_NOT_PRESENT(BIC_CPU_c7);
4935 BIC_NOT_PRESENT(BIC_Pkgpc7);
4936 }
Len Brown570992f2019-08-31 14:16:07 -0400[diff] [blame]4937 if (has_c8910_msrs(family, model)) {
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]4938 BIC_PRESENT(BIC_Pkgpc8);
4939 BIC_PRESENT(BIC_Pkgpc9);
4940 BIC_PRESENT(BIC_Pkgpc10);
4941 }
Len Brown570992f2019-08-31 14:16:07 -0400[diff] [blame]4942 do_irtl_hsw = has_c8910_msrs(family, model);
Len Browna99d8732017-05-20 20:11:55 -0400[diff] [blame]4943 if (has_skl_msrs(family, model)) {
4944 BIC_PRESENT(BIC_Totl_c0);
4945 BIC_PRESENT(BIC_Any_c0);
4946 BIC_PRESENT(BIC_GFX_c0);
4947 BIC_PRESENT(BIC_CPUGFX);
4948 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]4949 do_slm_cstates = is_slm(family, model);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]4950 do_knl_cstates = is_knl(family, model);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4951
Chen Yuf6708402020-03-18 18:55:48 +0800[diff] [blame]4952 if (do_slm_cstates || do_knl_cstates || is_cnl(family, model) ||
4953 is_ehl(family, model))
Len Brown562855e2019-03-19 17:52:32 -0400[diff] [blame]4954 BIC_NOT_PRESENT(BIC_CPU_c3);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]4955
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4956 if (!quiet)
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]4957 decode_misc_pwr_mgmt_msr();
4958
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4959 if (!quiet && has_slv_msrs(family, model))
Len Brown71616c82017-01-07 22:37:48 -0500[diff] [blame]4960 decode_c6_demotion_policy_msr();
4961
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4962 rapl_probe(family, model);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]4963 perf_limit_reasons_probe(family, model);
Artem Bityutskiyac980e12017-09-05 15:14:08 +0300[diff] [blame]4964 automatic_cstate_conversion_probe(family, model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]4965
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4966 if (!quiet)
Colin Ian King1b693172016-03-02 13:50:25 +0000[diff] [blame]4967 dump_cstate_pstate_config_info(family, model);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]4968
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]4969 if (!quiet)
4970 dump_sysfs_cstate_config();
Len Brown7293fcc2017-02-22 00:11:12 -0500[diff] [blame]4971 if (!quiet)
4972 dump_sysfs_pstate_config();
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]4973
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]4974 if (has_skl_msrs(family, model))
4975 calculate_tsc_tweak();
4976
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4977 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4978 BIC_PRESENT(BIC_GFX_rc6);
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]4979
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]4980 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4981 BIC_PRESENT(BIC_GFXMHz);
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]4982
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]4983 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4984 BIC_PRESENT(BIC_CPU_LPI);
4985 else
4986 BIC_NOT_PRESENT(BIC_CPU_LPI);
4987
Len Brown1f81c5e2020-03-19 18:26:05 -0400[diff] [blame]4988 if (!access(sys_lpi_file_sysfs, R_OK)) {
4989 sys_lpi_file = sys_lpi_file_sysfs;
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]4990 BIC_PRESENT(BIC_SYS_LPI);
Len Brown1f81c5e2020-03-19 18:26:05 -0400[diff] [blame]4991 } else if (!access(sys_lpi_file_debugfs, R_OK)) {
4992 sys_lpi_file = sys_lpi_file_debugfs;
4993 BIC_PRESENT(BIC_SYS_LPI);
4994 } else {
4995 sys_lpi_file_sysfs = NULL;
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]4996 BIC_NOT_PRESENT(BIC_SYS_LPI);
Len Brown1f81c5e2020-03-19 18:26:05 -0400[diff] [blame]4997 }
Len Brownbe0e54c2018-06-01 12:35:53 -0400[diff] [blame]4998
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]4999 if (!quiet)
Len Brown33148d62017-01-21 01:26:16 -0500[diff] [blame]5000 decode_misc_feature_control();
5001
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]5002 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5003}
5004
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5005/*
5006 * in /dev/cpu/ return success for names that are numbers
5007 * ie. filter out ".", "..", "microcode".
5008 */
5009int dir_filter(const struct dirent *dirp)
5010{
5011 if (isdigit(dirp->d_name[0]))
5012 return 1;
5013 else
5014 return 0;
5015}
5016
5017int open_dev_cpu_msr(int dummy1)
5018{
5019 return 0;
5020}
5021
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5022void topology_probe()
5023{
5024 int i;
5025 int max_core_id = 0;
5026 int max_package_id = 0;
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]5027 int max_die_id = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5028 int max_siblings = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5029
5030 /* Initialize num_cpus, max_cpu_num */
Prarit Bhargava843c5792018-06-01 10:04:28 -0400[diff] [blame]5031 set_max_cpu_num();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5032 topo.num_cpus = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5033 for_all_proc_cpus(count_cpus);
5034 if (!summary_only && topo.num_cpus > 1)
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5035 BIC_PRESENT(BIC_CPU);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5036
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5037 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5038 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5039
5040 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]5041 if (cpus == NULL)
5042 err(1, "calloc cpus");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5043
5044 /*
5045 * Allocate and initialize cpu_present_set
5046 */
5047 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]5048 if (cpu_present_set == NULL)
5049 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5050 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5051 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
5052 for_all_proc_cpus(mark_cpu_present);
5053
5054 /*
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]5055 * Validate that all cpus in cpu_subset are also in cpu_present_set
5056 */
5057 for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
5058 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
5059 if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
5060 err(1, "cpu%d not present", i);
5061 }
5062
5063 /*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5064 * Allocate and initialize cpu_affinity_set
5065 */
5066 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]5067 if (cpu_affinity_set == NULL)
5068 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5069 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
5070 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
5071
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5072 for_all_proc_cpus(init_thread_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5073
5074 /*
5075 * For online cpus
5076 * find max_core_id, max_package_id
5077 */
5078 for (i = 0; i <= topo.max_cpu_num; ++i) {
5079 int siblings;
5080
5081 if (cpu_is_not_present(i)) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5082 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5083 fprintf(outf, "cpu%d NOT PRESENT\n", i);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5084 continue;
5085 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5086
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]5087 cpus[i].logical_cpu_id = i;
5088
5089 /* get package information */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5090 cpus[i].physical_package_id = get_physical_package_id(i);
5091 if (cpus[i].physical_package_id > max_package_id)
5092 max_package_id = cpus[i].physical_package_id;
5093
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]5094 /* get die information */
5095 cpus[i].die_id = get_die_id(i);
5096 if (cpus[i].die_id > max_die_id)
5097 max_die_id = cpus[i].die_id;
5098
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]5099 /* get numa node information */
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]5100 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
5101 if (cpus[i].physical_node_id > topo.max_node_num)
5102 topo.max_node_num = cpus[i].physical_node_id;
Len Brown0e2d8f02018-06-01 22:08:58 -0400[diff] [blame]5103
5104 /* get core information */
5105 cpus[i].physical_core_id = get_core_id(i);
5106 if (cpus[i].physical_core_id > max_core_id)
5107 max_core_id = cpus[i].physical_core_id;
5108
5109 /* get thread information */
5110 siblings = get_thread_siblings(&cpus[i]);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5111 if (siblings > max_siblings)
5112 max_siblings = siblings;
Artem Bityutskiy4f206a02018-07-25 11:52:06 +0300[diff] [blame]5113 if (cpus[i].thread_id == 0)
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5114 topo.num_cores++;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5115 }
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]5116
Prarit Bhargava70a9c6e2018-06-01 10:04:33 -0400[diff] [blame]5117 topo.cores_per_node = max_core_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5118 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5119 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
Prarit Bhargava70a9c6e2018-06-01 10:04:33 -0400[diff] [blame]5120 max_core_id, topo.cores_per_node);
5121 if (!summary_only && topo.cores_per_node > 1)
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5122 BIC_PRESENT(BIC_Core);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5123
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]5124 topo.num_die = max_die_id + 1;
5125 if (debug > 1)
5126 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5127 max_die_id, topo.num_die);
5128 if (!summary_only && topo.num_die > 1)
5129 BIC_PRESENT(BIC_Die);
5130
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5131 topo.num_packages = max_package_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5132 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5133 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5134 max_package_id, topo.num_packages);
Len Brown7da6e3e2017-02-21 23:43:41 -0500[diff] [blame]5135 if (!summary_only && topo.num_packages > 1)
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5136 BIC_PRESENT(BIC_Package);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5137
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]5138 set_node_data();
5139 if (debug > 1)
Prarit Bhargava70a9c6e2018-06-01 10:04:33 -0400[diff] [blame]5140 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
Prarit Bhargava01235042018-06-01 10:04:35 -0400[diff] [blame]5141 if (!summary_only && topo.nodes_per_pkg > 1)
5142 BIC_PRESENT(BIC_Node);
Prarit Bhargavaef605742018-06-01 10:04:30 -0400[diff] [blame]5143
Prarit Bhargava70a9c6e2018-06-01 10:04:33 -0400[diff] [blame]5144 topo.threads_per_core = max_siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5145 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5146 fprintf(outf, "max_siblings %d\n", max_siblings);
Prarit Bhargava2ffbb222018-07-26 09:08:54 -0400[diff] [blame]5147
5148 if (debug < 1)
5149 return;
5150
5151 for (i = 0; i <= topo.max_cpu_num; ++i) {
Len Brown0ec712e2018-09-21 22:26:57 -0400[diff] [blame]5152 if (cpu_is_not_present(i))
5153 continue;
Prarit Bhargava2ffbb222018-07-26 09:08:54 -0400[diff] [blame]5154 fprintf(outf,
Len Brown6de68fe2019-02-14 19:17:40 -0800[diff] [blame]5155 "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5156 i, cpus[i].physical_package_id, cpus[i].die_id,
Prarit Bhargava2ffbb222018-07-26 09:08:54 -0400[diff] [blame]5157 cpus[i].physical_node_id,
5158 cpus[i].logical_node_id,
5159 cpus[i].physical_core_id,
5160 cpus[i].thread_id);
5161 }
5162
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5163}
5164
5165void
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5166allocate_counters(struct thread_data **t, struct core_data **c,
5167 struct pkg_data **p)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5168{
5169 int i;
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5170 int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5171 topo.num_packages;
5172 int num_threads = topo.threads_per_core * num_cores;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5173
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5174 *t = calloc(num_threads, sizeof(struct thread_data));
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5175 if (*t == NULL)
5176 goto error;
5177
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5178 for (i = 0; i < num_threads; i++)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5179 (*t)[i].cpu_id = -1;
5180
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5181 *c = calloc(num_cores, sizeof(struct core_data));
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5182 if (*c == NULL)
5183 goto error;
5184
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5185 for (i = 0; i < num_cores; i++)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5186 (*c)[i].core_id = -1;
5187
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]5188 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5189 if (*p == NULL)
5190 goto error;
5191
5192 for (i = 0; i < topo.num_packages; i++)
5193 (*p)[i].package_id = i;
5194
5195 return;
5196error:
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]5197 err(1, "calloc counters");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5198}
5199/*
5200 * init_counter()
5201 *
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5202 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5203 */
5204void init_counter(struct thread_data *thread_base, struct core_data *core_base,
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5205 struct pkg_data *pkg_base, int cpu_id)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5206{
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5207 int pkg_id = cpus[cpu_id].physical_package_id;
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5208 int node_id = cpus[cpu_id].logical_node_id;
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5209 int core_id = cpus[cpu_id].physical_core_id;
5210 int thread_id = cpus[cpu_id].thread_id;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5211 struct thread_data *t;
5212 struct core_data *c;
5213 struct pkg_data *p;
5214
Nathan Ciobanu42dd4522018-06-08 15:15:12 -0700[diff] [blame]5215
5216 /* Workaround for systems where physical_node_id==-1
5217 * and logical_node_id==(-1 - topo.num_cpus)
5218 */
5219 if (node_id < 0)
5220 node_id = 0;
5221
Prarit Bhargava40f5cfe2018-06-01 10:04:34 -0400[diff] [blame]5222 t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5223 c = GET_CORE(core_base, core_id, node_id, pkg_id);
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5224 p = GET_PKG(pkg_base, pkg_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5225
5226 t->cpu_id = cpu_id;
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5227 if (thread_id == 0) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5228 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5229 if (cpu_is_first_core_in_package(cpu_id))
5230 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5231 }
5232
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5233 c->core_id = core_id;
5234 p->package_id = pkg_id;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5235}
5236
5237
5238int initialize_counters(int cpu_id)
5239{
Prarit Bhargava8cb48b32018-06-01 10:04:31 -0400[diff] [blame]5240 init_counter(EVEN_COUNTERS, cpu_id);
5241 init_counter(ODD_COUNTERS, cpu_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5242 return 0;
5243}
5244
5245void allocate_output_buffer()
5246{
Naoya Horiguchieeb71c92019-04-03 16:02:14 +0900[diff] [blame]5247 output_buffer = calloc(1, (1 + topo.num_cpus) * 2048);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5248 outp = output_buffer;
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]5249 if (outp == NULL)
5250 err(-1, "calloc output buffer");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5251}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]5252void allocate_fd_percpu(void)
5253{
Mika Westerberg01a67ad2016-04-22 11:13:23 +0300[diff] [blame]5254 fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]5255 if (fd_percpu == NULL)
5256 err(-1, "calloc fd_percpu");
5257}
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]5258void allocate_irq_buffers(void)
5259{
5260 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5261 if (irq_column_2_cpu == NULL)
5262 err(-1, "calloc %d", topo.num_cpus);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5263
Mika Westerberg01a67ad2016-04-22 11:13:23 +0300[diff] [blame]5264 irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]5265 if (irqs_per_cpu == NULL)
Mika Westerberg01a67ad2016-04-22 11:13:23 +0300[diff] [blame]5266 err(-1, "calloc %d", topo.max_cpu_num + 1);
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]5267}
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5268void setup_all_buffers(void)
5269{
5270 topology_probe();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]5271 allocate_irq_buffers();
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]5272 allocate_fd_percpu();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5273 allocate_counters(&thread_even, &core_even, &package_even);
5274 allocate_counters(&thread_odd, &core_odd, &package_odd);
5275 allocate_output_buffer();
5276 for_all_proc_cpus(initialize_counters);
5277}
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]5278
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]5279void set_base_cpu(void)
5280{
5281 base_cpu = sched_getcpu();
5282 if (base_cpu < 0)
5283 err(-ENODEV, "No valid cpus found");
5284
5285 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5286 fprintf(outf, "base_cpu = %d\n", base_cpu);
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]5287}
5288
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5289void turbostat_init()
5290{
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]5291 setup_all_buffers();
5292 set_base_cpu();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5293 check_dev_msr();
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]5294 check_permissions();
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]5295 process_cpuid();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5296
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5297
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5298 if (!quiet)
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]5299 for_all_cpus(print_hwp, ODD_COUNTERS);
5300
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5301 if (!quiet)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]5302 for_all_cpus(print_epb, ODD_COUNTERS);
5303
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5304 if (!quiet)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]5305 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5306
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5307 if (!quiet)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]5308 for_all_cpus(print_rapl, ODD_COUNTERS);
5309
5310 for_all_cpus(set_temperature_target, ODD_COUNTERS);
5311
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5312 if (!quiet)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]5313 for_all_cpus(print_thermal, ODD_COUNTERS);
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]5314
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5315 if (!quiet && do_irtl_snb)
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]5316 print_irtl();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5317}
5318
5319int fork_it(char **argv)
5320{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5321 pid_t child_pid;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]5322 int status;
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]5323
Len Brown218f0e82017-02-14 22:07:52 -0500[diff] [blame]5324 snapshot_proc_sysfs_files();
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]5325 status = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]5326 first_counter_read = 0;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]5327 if (status)
5328 exit(status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5329 /* clear affinity side-effect of get_counters() */
5330 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5331 gettimeofday(&tv_even, (struct timezone *)NULL);
5332
5333 child_pid = fork();
5334 if (!child_pid) {
5335 /* child */
5336 execvp(argv[0], argv);
Len Brown0815a3d2017-02-23 17:00:51 -0500[diff] [blame]5337 err(errno, "exec %s", argv[0]);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5338 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5339
5340 /* parent */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]5341 if (child_pid == -1)
5342 err(1, "fork");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5343
5344 signal(SIGINT, SIG_IGN);
5345 signal(SIGQUIT, SIG_IGN);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]5346 if (waitpid(child_pid, &status, 0) == -1)
5347 err(status, "waitpid");
David Arcari2a954962019-02-12 09:34:39 -0500[diff] [blame]5348
5349 if (WIFEXITED(status))
5350 status = WEXITSTATUS(status);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5351 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5352 /*
5353 * n.b. fork_it() does not check for errors from for_all_cpus()
5354 * because re-starting is problematic when forking
5355 */
Len Brown218f0e82017-02-14 22:07:52 -0500[diff] [blame]5356 snapshot_proc_sysfs_files();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]5357 for_all_cpus(get_counters, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5358 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5359 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownba3dec92016-04-22 20:31:46 -0400[diff] [blame]5360 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5361 fprintf(outf, "%s: Counter reset detected\n", progname);
5362 else {
5363 compute_average(EVEN_COUNTERS);
5364 format_all_counters(EVEN_COUNTERS);
5365 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5366
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5367 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5368
5369 flush_output_stderr();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5370
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]5371 return status;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5372}
5373
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]5374int get_and_dump_counters(void)
5375{
5376 int status;
5377
Len Brown218f0e82017-02-14 22:07:52 -0500[diff] [blame]5378 snapshot_proc_sysfs_files();
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]5379 status = for_all_cpus(get_counters, ODD_COUNTERS);
5380 if (status)
5381 return status;
5382
5383 status = for_all_cpus(dump_counters, ODD_COUNTERS);
5384 if (status)
5385 return status;
5386
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5387 flush_output_stdout();
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]5388
5389 return status;
5390}
5391
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5392void print_version() {
Len Brownb95fffb2019-11-17 21:18:31 -0500[diff] [blame]5393 fprintf(outf, "turbostat version 20.03.20"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5394 " - Len Brown <lenb@kernel.org>\n");
5395}
5396
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]5397int add_counter(unsigned int msr_num, char *path, char *name,
5398 unsigned int width, enum counter_scope scope,
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5399 enum counter_type type, enum counter_format format, int flags)
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5400{
5401 struct msr_counter *msrp;
5402
5403 msrp = calloc(1, sizeof(struct msr_counter));
5404 if (msrp == NULL) {
5405 perror("calloc");
5406 exit(1);
5407 }
5408
5409 msrp->msr_num = msr_num;
Len Brownd8d005b2020-03-19 18:33:12 -0400[diff] [blame]5410 strncpy(msrp->name, name, NAME_BYTES - 1);
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]5411 if (path)
Len Brownd8d005b2020-03-19 18:33:12 -0400[diff] [blame]5412 strncpy(msrp->path, path, PATH_BYTES - 1);
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5413 msrp->width = width;
5414 msrp->type = type;
5415 msrp->format = format;
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5416 msrp->flags = flags;
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5417
5418 switch (scope) {
5419
5420 case SCOPE_CPU:
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5421 msrp->next = sys.tp;
5422 sys.tp = msrp;
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]5423 sys.added_thread_counters++;
Len Brown0748eaf2018-06-01 12:38:29 -0400[diff] [blame]5424 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]5425 fprintf(stderr, "exceeded max %d added thread counters\n",
5426 MAX_ADDED_COUNTERS);
5427 exit(-1);
5428 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5429 break;
5430
5431 case SCOPE_CORE:
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5432 msrp->next = sys.cp;
5433 sys.cp = msrp;
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]5434 sys.added_core_counters++;
5435 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5436 fprintf(stderr, "exceeded max %d added core counters\n",
5437 MAX_ADDED_COUNTERS);
5438 exit(-1);
5439 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5440 break;
5441
5442 case SCOPE_PACKAGE:
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5443 msrp->next = sys.pp;
5444 sys.pp = msrp;
Len Brown678a3bd2017-02-09 22:22:13 -0500[diff] [blame]5445 sys.added_package_counters++;
5446 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5447 fprintf(stderr, "exceeded max %d added package counters\n",
5448 MAX_ADDED_COUNTERS);
5449 exit(-1);
5450 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5451 break;
5452 }
5453
5454 return 0;
5455}
5456
5457void parse_add_command(char *add_command)
5458{
5459 int msr_num = 0;
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]5460 char *path = NULL;
Len Brown0f47c082017-01-27 00:50:45 -0500[diff] [blame]5461 char name_buffer[NAME_BYTES] = "";
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5462 int width = 64;
5463 int fail = 0;
5464 enum counter_scope scope = SCOPE_CPU;
5465 enum counter_type type = COUNTER_CYCLES;
5466 enum counter_format format = FORMAT_DELTA;
5467
5468 while (add_command) {
5469
5470 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5471 goto next;
5472
5473 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5474 goto next;
5475
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]5476 if (*add_command == '/') {
5477 path = add_command;
5478 goto next;
5479 }
5480
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5481 if (sscanf(add_command, "u%d", &width) == 1) {
5482 if ((width == 32) || (width == 64))
5483 goto next;
5484 width = 64;
5485 }
5486 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5487 scope = SCOPE_CPU;
5488 goto next;
5489 }
5490 if (!strncmp(add_command, "core", strlen("core"))) {
5491 scope = SCOPE_CORE;
5492 goto next;
5493 }
5494 if (!strncmp(add_command, "package", strlen("package"))) {
5495 scope = SCOPE_PACKAGE;
5496 goto next;
5497 }
5498 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5499 type = COUNTER_CYCLES;
5500 goto next;
5501 }
5502 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5503 type = COUNTER_SECONDS;
5504 goto next;
5505 }
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5506 if (!strncmp(add_command, "usec", strlen("usec"))) {
5507 type = COUNTER_USEC;
5508 goto next;
5509 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5510 if (!strncmp(add_command, "raw", strlen("raw"))) {
5511 format = FORMAT_RAW;
5512 goto next;
5513 }
5514 if (!strncmp(add_command, "delta", strlen("delta"))) {
5515 format = FORMAT_DELTA;
5516 goto next;
5517 }
5518 if (!strncmp(add_command, "percent", strlen("percent"))) {
5519 format = FORMAT_PERCENT;
5520 goto next;
5521 }
5522
5523 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */
5524 char *eos;
5525
5526 eos = strchr(name_buffer, ',');
5527 if (eos)
5528 *eos = '\0';
5529 goto next;
5530 }
5531
5532next:
5533 add_command = strchr(add_command, ',');
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]5534 if (add_command) {
5535 *add_command = '\0';
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5536 add_command++;
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]5537 }
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5538
5539 }
Len Brown495c76542017-02-08 02:41:51 -0500[diff] [blame]5540 if ((msr_num == 0) && (path == NULL)) {
5541 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5542 fail++;
5543 }
5544
5545 /* generate default column header */
5546 if (*name_buffer == '\0') {
Len Brown5f3aea52017-02-23 18:10:27 -0500[diff] [blame]5547 if (width == 32)
5548 sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5549 else
5550 sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5551 }
5552
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5553 if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5554 fail++;
5555
5556 if (fail) {
5557 help();
5558 exit(1);
5559 }
5560}
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5561
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]5562int is_deferred_skip(char *name)
5563{
5564 int i;
5565
5566 for (i = 0; i < deferred_skip_index; ++i)
5567 if (!strcmp(name, deferred_skip_names[i]))
5568 return 1;
5569 return 0;
5570}
5571
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5572void probe_sysfs(void)
5573{
5574 char path[64];
5575 char name_buf[16];
5576 FILE *input;
5577 int state;
5578 char *sp;
5579
5580 if (!DO_BIC(BIC_sysfs))
5581 return;
5582
Len Brown0748eaf2018-06-01 12:38:29 -0400[diff] [blame]5583 for (state = 10; state >= 0; --state) {
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5584
5585 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5586 base_cpu, state);
5587 input = fopen(path, "r");
5588 if (input == NULL)
5589 continue;
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]5590 if (!fgets(name_buf, sizeof(name_buf), input))
5591 err(1, "%s: failed to read file", path);
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5592
5593 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5594 sp = strchr(name_buf, '-');
5595 if (!sp)
5596 sp = strchrnul(name_buf, '\n');
5597 *sp = '%';
5598 *(sp + 1) = '\0';
5599
5600 fclose(input);
5601
5602 sprintf(path, "cpuidle/state%d/time", state);
5603
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]5604 if (is_deferred_skip(name_buf))
5605 continue;
5606
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5607 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5608 FORMAT_PERCENT, SYSFS_PERCPU);
5609 }
5610
Len Brown0748eaf2018-06-01 12:38:29 -0400[diff] [blame]5611 for (state = 10; state >= 0; --state) {
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5612
5613 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5614 base_cpu, state);
5615 input = fopen(path, "r");
5616 if (input == NULL)
5617 continue;
Ben Hutchings8173c332019-03-20 23:01:03 -0400[diff] [blame]5618 if (!fgets(name_buf, sizeof(name_buf), input))
5619 err(1, "%s: failed to read file", path);
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5620 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5621 sp = strchr(name_buf, '-');
5622 if (!sp)
5623 sp = strchrnul(name_buf, '\n');
5624 *sp = '\0';
5625 fclose(input);
5626
5627 sprintf(path, "cpuidle/state%d/usage", state);
5628
Len Browndd778a52017-02-21 23:21:13 -0500[diff] [blame]5629 if (is_deferred_skip(name_buf))
5630 continue;
5631
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5632 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5633 FORMAT_DELTA, SYSFS_PERCPU);
5634 }
5635
5636}
5637
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]5638
5639/*
5640 * parse cpuset with following syntax
5641 * 1,2,4..6,8-10 and set bits in cpu_subset
5642 */
5643void parse_cpu_command(char *optarg)
5644{
5645 unsigned int start, end;
5646 char *next;
5647
Len Brown4e4e1e72017-02-21 22:33:42 -0500[diff] [blame]5648 if (!strcmp(optarg, "core")) {
5649 if (cpu_subset)
5650 goto error;
5651 show_core_only++;
5652 return;
5653 }
5654 if (!strcmp(optarg, "package")) {
5655 if (cpu_subset)
5656 goto error;
5657 show_pkg_only++;
5658 return;
5659 }
5660 if (show_core_only || show_pkg_only)
5661 goto error;
5662
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]5663 cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5664 if (cpu_subset == NULL)
5665 err(3, "CPU_ALLOC");
5666 cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5667
5668 CPU_ZERO_S(cpu_subset_size, cpu_subset);
5669
5670 next = optarg;
5671
5672 while (next && *next) {
5673
5674 if (*next == '-') /* no negative cpu numbers */
5675 goto error;
5676
5677 start = strtoul(next, &next, 10);
5678
5679 if (start >= CPU_SUBSET_MAXCPUS)
5680 goto error;
5681 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5682
5683 if (*next == '\0')
5684 break;
5685
5686 if (*next == ',') {
5687 next += 1;
5688 continue;
5689 }
5690
5691 if (*next == '-') {
5692 next += 1; /* start range */
5693 } else if (*next == '.') {
5694 next += 1;
5695 if (*next == '.')
5696 next += 1; /* start range */
5697 else
5698 goto error;
5699 }
5700
5701 end = strtoul(next, &next, 10);
5702 if (end <= start)
5703 goto error;
5704
5705 while (++start <= end) {
5706 if (start >= CPU_SUBSET_MAXCPUS)
5707 goto error;
5708 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5709 }
5710
5711 if (*next == ',')
5712 next += 1;
5713 else if (*next != '\0')
5714 goto error;
5715 }
5716
5717 return;
5718
5719error:
Len Brown4e4e1e72017-02-21 22:33:42 -0500[diff] [blame]5720 fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5721 help();
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]5722 exit(-1);
5723}
5724
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5725
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5726void cmdline(int argc, char **argv)
5727{
5728 int opt;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5729 int option_index = 0;
5730 static struct option long_options[] = {
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5731 {"add", required_argument, 0, 'a'},
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]5732 {"cpu", required_argument, 0, 'c'},
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5733 {"Dump", no_argument, 0, 'D'},
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5734 {"debug", no_argument, 0, 'd'}, /* internal, not documented */
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]5735 {"enable", required_argument, 0, 'e'},
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5736 {"interval", required_argument, 0, 'i'},
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]5737 {"num_iterations", required_argument, 0, 'n'},
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5738 {"help", no_argument, 0, 'h'},
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5739 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5740 {"Joules", no_argument, 0, 'J'},
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]5741 {"list", no_argument, 0, 'l'},
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5742 {"out", required_argument, 0, 'o'},
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5743 {"quiet", no_argument, 0, 'q'},
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5744 {"show", required_argument, 0, 's'},
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5745 {"Summary", no_argument, 0, 'S'},
5746 {"TCC", required_argument, 0, 'T'},
5747 {"version", no_argument, 0, 'v' },
5748 {0, 0, 0, 0 }
5749 };
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5750
5751 progname = argv[0];
5752
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]5753 while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5754 long_options, &option_index)) != -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5755 switch (opt) {
Len Brown388e9c82016-12-22 23:57:55 -0500[diff] [blame]5756 case 'a':
5757 parse_add_command(optarg);
5758 break;
Len Brown1ef7d212017-02-10 23:54:15 -0500[diff] [blame]5759 case 'c':
5760 parse_cpu_command(optarg);
5761 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5762 case 'D':
5763 dump_only++;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]5764 break;
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]5765 case 'e':
5766 /* --enable specified counter */
Len Brown4c2122d2018-06-06 17:44:48 -0400[diff] [blame]5767 bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]5768 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5769 case 'd':
5770 debug++;
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]5771 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]5772 break;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5773 case 'H':
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]5774 /*
5775 * --hide: do not show those specified
5776 * multiple invocations simply clear more bits in enabled mask
5777 */
5778 bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5779 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5780 case 'h':
5781 default:
5782 help();
5783 exit(1);
5784 case 'i':
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]5785 {
5786 double interval = strtod(optarg, NULL);
5787
5788 if (interval < 0.001) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5789 fprintf(outf, "interval %f seconds is too small\n",
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]5790 interval);
5791 exit(2);
5792 }
5793
Artem Bityutskiy47936f92017-10-04 15:01:47 +0300[diff] [blame]5794 interval_tv.tv_sec = interval_ts.tv_sec = interval;
Len Brownb9ad8ee2017-07-19 19:28:37 -0400[diff] [blame]5795 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
Artem Bityutskiy47936f92017-10-04 15:01:47 +0300[diff] [blame]5796 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]5797 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]5798 break;
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]5799 case 'J':
5800 rapl_joules++;
5801 break;
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]5802 case 'l':
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]5803 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]5804 list_header_only++;
5805 quiet++;
5806 break;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5807 case 'o':
5808 outf = fopen_or_die(optarg, "w");
5809 break;
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5810 case 'q':
5811 quiet = 1;
5812 break;
Chen Yu023fe0a2018-04-26 08:41:03 +0800[diff] [blame]5813 case 'n':
5814 num_iterations = strtod(optarg, NULL);
5815
5816 if (num_iterations <= 0) {
5817 fprintf(outf, "iterations %d should be positive number\n",
5818 num_iterations);
5819 exit(2);
5820 }
5821 break;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5822 case 's':
Len Brown3f44a5c2017-10-17 15:42:56 -0400[diff] [blame]5823 /*
5824 * --show: show only those specified
5825 * The 1st invocation will clear and replace the enabled mask
5826 * subsequent invocations can add to it.
5827 */
5828 if (shown == 0)
5829 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5830 else
5831 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5832 shown = 1;
Len Brown812db3f2017-02-10 00:25:41 -0500[diff] [blame]5833 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5834 case 'S':
5835 summary_only++;
5836 break;
5837 case 'T':
5838 tcc_activation_temp_override = atoi(optarg);
5839 break;
5840 case 'v':
5841 print_version();
5842 exit(0);
5843 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5844 }
5845 }
5846}
5847
5848int main(int argc, char **argv)
5849{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]5850 outf = stderr;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5851 cmdline(argc, argv);
5852
Len Brown96e47152017-01-21 02:26:00 -0500[diff] [blame]5853 if (!quiet)
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]5854 print_version();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5855
Len Brown41618e62017-02-09 18:25:22 -0500[diff] [blame]5856 probe_sysfs();
5857
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5858 turbostat_init();
5859
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]5860 /* dump counters and exit */
5861 if (dump_only)
5862 return get_and_dump_counters();
5863
Len Brownc8ade362017-02-15 17:15:11 -0500[diff] [blame]5864 /* list header and exit */
5865 if (list_header_only) {
5866 print_header(",");
5867 flush_output_stdout();
5868 return 0;
5869 }
5870
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]5871 /*
5872 * if any params left, it must be a command to fork
5873 */
5874 if (argc - optind)
5875 return fork_it(argv + optind);
5876 else
5877 turbostat_loop();
5878
5879 return 0;
5880}