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Stephen Boyde1bd55e2018-12-11 09:57:48 -08001// SPDX-License-Identifier: GPL-2.0
Prashant Gaikwadece70092013-03-20 17:30:34 +05302/*
3 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
Prashant Gaikwadece70092013-03-20 17:30:34 +05304 */
5
Prashant Gaikwadece70092013-03-20 17:30:34 +05306#include <linux/clk-provider.h>
7#include <linux/err.h>
8#include <linux/slab.h>
9
Prashant Gaikwadece70092013-03-20 17:30:34 +053010static u8 clk_composite_get_parent(struct clk_hw *hw)
11{
12 struct clk_composite *composite = to_clk_composite(hw);
13 const struct clk_ops *mux_ops = composite->mux_ops;
14 struct clk_hw *mux_hw = composite->mux_hw;
15
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +010016 __clk_hw_set_clk(mux_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +053017
18 return mux_ops->get_parent(mux_hw);
19}
20
21static int clk_composite_set_parent(struct clk_hw *hw, u8 index)
22{
23 struct clk_composite *composite = to_clk_composite(hw);
24 const struct clk_ops *mux_ops = composite->mux_ops;
25 struct clk_hw *mux_hw = composite->mux_hw;
26
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +010027 __clk_hw_set_clk(mux_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +053028
29 return mux_ops->set_parent(mux_hw, index);
30}
31
32static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
33 unsigned long parent_rate)
34{
35 struct clk_composite *composite = to_clk_composite(hw);
Mike Turquetted3a1c7b2013-04-11 11:31:36 -070036 const struct clk_ops *rate_ops = composite->rate_ops;
37 struct clk_hw *rate_hw = composite->rate_hw;
Prashant Gaikwadece70092013-03-20 17:30:34 +053038
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +010039 __clk_hw_set_clk(rate_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +053040
Mike Turquetted3a1c7b2013-04-11 11:31:36 -070041 return rate_ops->recalc_rate(rate_hw, parent_rate);
Prashant Gaikwadece70092013-03-20 17:30:34 +053042}
43
Boris Brezillon0817b622015-07-07 20:48:08 +020044static int clk_composite_determine_rate(struct clk_hw *hw,
45 struct clk_rate_request *req)
Emilio López107f3192013-09-14 21:37:59 -030046{
47 struct clk_composite *composite = to_clk_composite(hw);
48 const struct clk_ops *rate_ops = composite->rate_ops;
49 const struct clk_ops *mux_ops = composite->mux_ops;
50 struct clk_hw *rate_hw = composite->rate_hw;
51 struct clk_hw *mux_hw = composite->mux_hw;
Stephen Boyd2f508a92015-07-30 17:20:57 -070052 struct clk_hw *parent;
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020053 unsigned long parent_rate;
54 long tmp_rate, best_rate = 0;
55 unsigned long rate_diff;
56 unsigned long best_rate_diff = ULONG_MAX;
Boris Brezillon0817b622015-07-07 20:48:08 +020057 long rate;
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020058 int i;
Emilio López107f3192013-09-14 21:37:59 -030059
60 if (rate_hw && rate_ops && rate_ops->determine_rate) {
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +010061 __clk_hw_set_clk(rate_hw, hw);
Boris Brezillon0817b622015-07-07 20:48:08 +020062 return rate_ops->determine_rate(rate_hw, req);
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020063 } else if (rate_hw && rate_ops && rate_ops->round_rate &&
64 mux_hw && mux_ops && mux_ops->set_parent) {
Boris Brezillon0817b622015-07-07 20:48:08 +020065 req->best_parent_hw = NULL;
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020066
Stephen Boyd98d8a602015-06-29 16:56:30 -070067 if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) {
Stephen Boyd2f508a92015-07-30 17:20:57 -070068 parent = clk_hw_get_parent(mux_hw);
69 req->best_parent_hw = parent;
70 req->best_parent_rate = clk_hw_get_rate(parent);
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020071
Boris Brezillon0817b622015-07-07 20:48:08 +020072 rate = rate_ops->round_rate(rate_hw, req->rate,
73 &req->best_parent_rate);
74 if (rate < 0)
75 return rate;
76
77 req->rate = rate;
78 return 0;
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020079 }
80
Stephen Boyd497295a2015-06-25 16:53:23 -070081 for (i = 0; i < clk_hw_get_num_parents(mux_hw); i++) {
Stephen Boyd2f508a92015-07-30 17:20:57 -070082 parent = clk_hw_get_parent_by_index(mux_hw, i);
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020083 if (!parent)
84 continue;
85
Stephen Boyd2f508a92015-07-30 17:20:57 -070086 parent_rate = clk_hw_get_rate(parent);
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020087
Boris Brezillon0817b622015-07-07 20:48:08 +020088 tmp_rate = rate_ops->round_rate(rate_hw, req->rate,
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020089 &parent_rate);
90 if (tmp_rate < 0)
91 continue;
92
Boris Brezillon0817b622015-07-07 20:48:08 +020093 rate_diff = abs(req->rate - tmp_rate);
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020094
Boris Brezillon0817b622015-07-07 20:48:08 +020095 if (!rate_diff || !req->best_parent_hw
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020096 || best_rate_diff > rate_diff) {
Stephen Boyd2f508a92015-07-30 17:20:57 -070097 req->best_parent_hw = parent;
Boris Brezillon0817b622015-07-07 20:48:08 +020098 req->best_parent_rate = parent_rate;
Boris BREZILLON3eb635f2014-07-03 01:56:45 +020099 best_rate_diff = rate_diff;
100 best_rate = tmp_rate;
101 }
102
103 if (!rate_diff)
Boris Brezillon0817b622015-07-07 20:48:08 +0200104 return 0;
Boris BREZILLON3eb635f2014-07-03 01:56:45 +0200105 }
106
Boris Brezillon0817b622015-07-07 20:48:08 +0200107 req->rate = best_rate;
108 return 0;
Emilio López107f3192013-09-14 21:37:59 -0300109 } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +0100110 __clk_hw_set_clk(mux_hw, hw);
Boris Brezillon0817b622015-07-07 20:48:08 +0200111 return mux_ops->determine_rate(mux_hw, req);
Emilio López107f3192013-09-14 21:37:59 -0300112 } else {
113 pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
Boris Brezillon57d866e2015-07-09 22:39:38 +0200114 return -EINVAL;
Emilio López107f3192013-09-14 21:37:59 -0300115 }
116}
117
Prashant Gaikwadece70092013-03-20 17:30:34 +0530118static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
119 unsigned long *prate)
120{
121 struct clk_composite *composite = to_clk_composite(hw);
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700122 const struct clk_ops *rate_ops = composite->rate_ops;
123 struct clk_hw *rate_hw = composite->rate_hw;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530124
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +0100125 __clk_hw_set_clk(rate_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530126
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700127 return rate_ops->round_rate(rate_hw, rate, prate);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530128}
129
130static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate,
131 unsigned long parent_rate)
132{
133 struct clk_composite *composite = to_clk_composite(hw);
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700134 const struct clk_ops *rate_ops = composite->rate_ops;
135 struct clk_hw *rate_hw = composite->rate_hw;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530136
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +0100137 __clk_hw_set_clk(rate_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530138
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700139 return rate_ops->set_rate(rate_hw, rate, parent_rate);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530140}
141
Finley Xiao9e52cec2016-04-12 16:43:39 +0800142static int clk_composite_set_rate_and_parent(struct clk_hw *hw,
143 unsigned long rate,
144 unsigned long parent_rate,
145 u8 index)
146{
147 struct clk_composite *composite = to_clk_composite(hw);
148 const struct clk_ops *rate_ops = composite->rate_ops;
149 const struct clk_ops *mux_ops = composite->mux_ops;
150 struct clk_hw *rate_hw = composite->rate_hw;
151 struct clk_hw *mux_hw = composite->mux_hw;
152 unsigned long temp_rate;
153
154 __clk_hw_set_clk(rate_hw, hw);
155 __clk_hw_set_clk(mux_hw, hw);
156
157 temp_rate = rate_ops->recalc_rate(rate_hw, parent_rate);
158 if (temp_rate > rate) {
159 rate_ops->set_rate(rate_hw, rate, parent_rate);
160 mux_ops->set_parent(mux_hw, index);
161 } else {
162 mux_ops->set_parent(mux_hw, index);
163 rate_ops->set_rate(rate_hw, rate, parent_rate);
164 }
165
166 return 0;
167}
168
Prashant Gaikwadece70092013-03-20 17:30:34 +0530169static int clk_composite_is_enabled(struct clk_hw *hw)
170{
171 struct clk_composite *composite = to_clk_composite(hw);
172 const struct clk_ops *gate_ops = composite->gate_ops;
173 struct clk_hw *gate_hw = composite->gate_hw;
174
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +0100175 __clk_hw_set_clk(gate_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530176
177 return gate_ops->is_enabled(gate_hw);
178}
179
180static int clk_composite_enable(struct clk_hw *hw)
181{
182 struct clk_composite *composite = to_clk_composite(hw);
183 const struct clk_ops *gate_ops = composite->gate_ops;
184 struct clk_hw *gate_hw = composite->gate_hw;
185
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +0100186 __clk_hw_set_clk(gate_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530187
188 return gate_ops->enable(gate_hw);
189}
190
191static void clk_composite_disable(struct clk_hw *hw)
192{
193 struct clk_composite *composite = to_clk_composite(hw);
194 const struct clk_ops *gate_ops = composite->gate_ops;
195 struct clk_hw *gate_hw = composite->gate_hw;
196
Javier Martinez Canillas4e907ef2015-02-12 14:58:30 +0100197 __clk_hw_set_clk(gate_hw, hw);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530198
199 gate_ops->disable(gate_hw);
200}
201
Michael Walle73ef6572020-01-03 00:10:59 +0100202static struct clk_hw *__clk_hw_register_composite(struct device *dev,
203 const char *name, const char * const *parent_names,
204 const struct clk_parent_data *pdata, int num_parents,
Prashant Gaikwadece70092013-03-20 17:30:34 +0530205 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700206 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
Prashant Gaikwadece70092013-03-20 17:30:34 +0530207 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
208 unsigned long flags)
209{
Stephen Boyd49cb3922016-02-07 00:20:31 -0800210 struct clk_hw *hw;
Manivannan Sadhasivamcc819cf2019-11-15 21:58:55 +0530211 struct clk_init_data init = {};
Prashant Gaikwadece70092013-03-20 17:30:34 +0530212 struct clk_composite *composite;
213 struct clk_ops *clk_composite_ops;
Stephen Boyd49cb3922016-02-07 00:20:31 -0800214 int ret;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530215
216 composite = kzalloc(sizeof(*composite), GFP_KERNEL);
Stephen Boydd122db72015-05-14 16:47:10 -0700217 if (!composite)
Prashant Gaikwadece70092013-03-20 17:30:34 +0530218 return ERR_PTR(-ENOMEM);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530219
220 init.name = name;
Stephen Boyd90b6c5c2019-04-25 10:57:37 -0700221 init.flags = flags;
Michael Walle73ef6572020-01-03 00:10:59 +0100222 if (parent_names)
223 init.parent_names = parent_names;
224 else
225 init.parent_data = pdata;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530226 init.num_parents = num_parents;
Stephen Boyd49cb3922016-02-07 00:20:31 -0800227 hw = &composite->hw;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530228
229 clk_composite_ops = &composite->ops;
230
231 if (mux_hw && mux_ops) {
Heiko Stübner0c02cf22014-07-03 01:57:30 +0200232 if (!mux_ops->get_parent) {
Stephen Boyd49cb3922016-02-07 00:20:31 -0800233 hw = ERR_PTR(-EINVAL);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530234 goto err;
235 }
236
237 composite->mux_hw = mux_hw;
238 composite->mux_ops = mux_ops;
239 clk_composite_ops->get_parent = clk_composite_get_parent;
Heiko Stübner0c02cf22014-07-03 01:57:30 +0200240 if (mux_ops->set_parent)
241 clk_composite_ops->set_parent = clk_composite_set_parent;
Emilio López107f3192013-09-14 21:37:59 -0300242 if (mux_ops->determine_rate)
243 clk_composite_ops->determine_rate = clk_composite_determine_rate;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530244 }
245
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700246 if (rate_hw && rate_ops) {
Mike Turquettef363e212013-04-11 11:31:37 -0700247 if (!rate_ops->recalc_rate) {
Stephen Boyd49cb3922016-02-07 00:20:31 -0800248 hw = ERR_PTR(-EINVAL);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530249 goto err;
250 }
Mike Turquette5a994e12014-07-03 01:58:14 +0200251 clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530252
Mike Turquette5a994e12014-07-03 01:58:14 +0200253 if (rate_ops->determine_rate)
254 clk_composite_ops->determine_rate =
255 clk_composite_determine_rate;
256 else if (rate_ops->round_rate)
257 clk_composite_ops->round_rate =
258 clk_composite_round_rate;
259
260 /* .set_rate requires either .round_rate or .determine_rate */
261 if (rate_ops->set_rate) {
262 if (rate_ops->determine_rate || rate_ops->round_rate)
263 clk_composite_ops->set_rate =
264 clk_composite_set_rate;
265 else
266 WARN(1, "%s: missing round_rate op is required\n",
267 __func__);
Mike Turquettef363e212013-04-11 11:31:37 -0700268 }
269
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700270 composite->rate_hw = rate_hw;
271 composite->rate_ops = rate_ops;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530272 }
273
Finley Xiao9e52cec2016-04-12 16:43:39 +0800274 if (mux_hw && mux_ops && rate_hw && rate_ops) {
275 if (mux_ops->set_parent && rate_ops->set_rate)
276 clk_composite_ops->set_rate_and_parent =
277 clk_composite_set_rate_and_parent;
278 }
279
Prashant Gaikwadece70092013-03-20 17:30:34 +0530280 if (gate_hw && gate_ops) {
281 if (!gate_ops->is_enabled || !gate_ops->enable ||
282 !gate_ops->disable) {
Stephen Boyd49cb3922016-02-07 00:20:31 -0800283 hw = ERR_PTR(-EINVAL);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530284 goto err;
285 }
286
287 composite->gate_hw = gate_hw;
288 composite->gate_ops = gate_ops;
289 clk_composite_ops->is_enabled = clk_composite_is_enabled;
290 clk_composite_ops->enable = clk_composite_enable;
291 clk_composite_ops->disable = clk_composite_disable;
292 }
293
294 init.ops = clk_composite_ops;
295 composite->hw.init = &init;
296
Stephen Boyd49cb3922016-02-07 00:20:31 -0800297 ret = clk_hw_register(dev, hw);
298 if (ret) {
299 hw = ERR_PTR(ret);
Prashant Gaikwadece70092013-03-20 17:30:34 +0530300 goto err;
Stephen Boyd49cb3922016-02-07 00:20:31 -0800301 }
Prashant Gaikwadece70092013-03-20 17:30:34 +0530302
303 if (composite->mux_hw)
Stephen Boyd49cb3922016-02-07 00:20:31 -0800304 composite->mux_hw->clk = hw->clk;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530305
Mike Turquetted3a1c7b2013-04-11 11:31:36 -0700306 if (composite->rate_hw)
Stephen Boyd49cb3922016-02-07 00:20:31 -0800307 composite->rate_hw->clk = hw->clk;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530308
309 if (composite->gate_hw)
Stephen Boyd49cb3922016-02-07 00:20:31 -0800310 composite->gate_hw->clk = hw->clk;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530311
Stephen Boyd49cb3922016-02-07 00:20:31 -0800312 return hw;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530313
314err:
315 kfree(composite);
Stephen Boyd49cb3922016-02-07 00:20:31 -0800316 return hw;
317}
318
Michael Walle73ef6572020-01-03 00:10:59 +0100319struct clk_hw *clk_hw_register_composite(struct device *dev, const char *name,
320 const char * const *parent_names, int num_parents,
321 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
322 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
323 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
324 unsigned long flags)
325{
326 return __clk_hw_register_composite(dev, name, parent_names, NULL,
327 num_parents, mux_hw, mux_ops,
328 rate_hw, rate_ops, gate_hw,
329 gate_ops, flags);
330}
Anson Huangd7d75182020-07-30 09:22:50 +0800331EXPORT_SYMBOL_GPL(clk_hw_register_composite);
Michael Walle73ef6572020-01-03 00:10:59 +0100332
333struct clk_hw *clk_hw_register_composite_pdata(struct device *dev,
334 const char *name,
335 const struct clk_parent_data *parent_data,
336 int num_parents,
337 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
338 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
339 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
340 unsigned long flags)
341{
342 return __clk_hw_register_composite(dev, name, NULL, parent_data,
343 num_parents, mux_hw, mux_ops,
344 rate_hw, rate_ops, gate_hw,
345 gate_ops, flags);
346}
347
Stephen Boyd49cb3922016-02-07 00:20:31 -0800348struct clk *clk_register_composite(struct device *dev, const char *name,
349 const char * const *parent_names, int num_parents,
350 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
351 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
352 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
353 unsigned long flags)
354{
355 struct clk_hw *hw;
356
357 hw = clk_hw_register_composite(dev, name, parent_names, num_parents,
358 mux_hw, mux_ops, rate_hw, rate_ops, gate_hw, gate_ops,
359 flags);
360 if (IS_ERR(hw))
361 return ERR_CAST(hw);
362 return hw->clk;
Prashant Gaikwadece70092013-03-20 17:30:34 +0530363}
Maxime Ripard92a39d92016-03-23 17:38:24 +0100364
Michael Walle73ef6572020-01-03 00:10:59 +0100365struct clk *clk_register_composite_pdata(struct device *dev, const char *name,
366 const struct clk_parent_data *parent_data,
367 int num_parents,
368 struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
369 struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
370 struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
371 unsigned long flags)
372{
373 struct clk_hw *hw;
374
375 hw = clk_hw_register_composite_pdata(dev, name, parent_data,
376 num_parents, mux_hw, mux_ops, rate_hw, rate_ops,
377 gate_hw, gate_ops, flags);
378 if (IS_ERR(hw))
379 return ERR_CAST(hw);
380 return hw->clk;
381}
382
Maxime Ripard92a39d92016-03-23 17:38:24 +0100383void clk_unregister_composite(struct clk *clk)
384{
385 struct clk_composite *composite;
386 struct clk_hw *hw;
387
388 hw = __clk_get_hw(clk);
389 if (!hw)
390 return;
391
392 composite = to_clk_composite(hw);
393
394 clk_unregister(clk);
395 kfree(composite);
396}
Manivannan Sadhasivamd8549bc2019-11-15 21:58:56 +0530397
398void clk_hw_unregister_composite(struct clk_hw *hw)
399{
400 struct clk_composite *composite;
401
402 composite = to_clk_composite(hw);
403
404 clk_hw_unregister(hw);
405 kfree(composite);
406}
407EXPORT_SYMBOL_GPL(clk_hw_unregister_composite);