Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 1 | /* |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 2 | * x86 FPU boot time init code: |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 3 | */ |
Ingo Molnar | 78f7f1e | 2015-04-24 02:54:44 +0200 | [diff] [blame] | 4 | #include <asm/fpu/internal.h> |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 5 | #include <asm/tlbflush.h> |
yu-cheng yu | 4f81cba | 2016-01-06 14:24:51 -0800 | [diff] [blame^] | 6 | #include <asm/setup.h> |
| 7 | #include <asm/cmdline.h> |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 8 | |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 9 | #include <linux/sched.h> |
yu-cheng yu | 4f81cba | 2016-01-06 14:24:51 -0800 | [diff] [blame^] | 10 | #include <linux/init.h> |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 11 | |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 12 | /* |
| 13 | * Initialize the TS bit in CR0 according to the style of context-switches |
| 14 | * we are using: |
| 15 | */ |
Ingo Molnar | 41e7841 | 2015-04-26 15:32:40 +0200 | [diff] [blame] | 16 | static void fpu__init_cpu_ctx_switch(void) |
| 17 | { |
Borislav Petkov | 362f924 | 2015-12-07 10:39:41 +0100 | [diff] [blame] | 18 | if (!boot_cpu_has(X86_FEATURE_EAGER_FPU)) |
Ingo Molnar | 41e7841 | 2015-04-26 15:32:40 +0200 | [diff] [blame] | 19 | stts(); |
| 20 | else |
| 21 | clts(); |
| 22 | } |
| 23 | |
| 24 | /* |
| 25 | * Initialize the registers found in all CPUs, CR0 and CR4: |
| 26 | */ |
| 27 | static void fpu__init_cpu_generic(void) |
| 28 | { |
| 29 | unsigned long cr0; |
| 30 | unsigned long cr4_mask = 0; |
| 31 | |
| 32 | if (cpu_has_fxsr) |
| 33 | cr4_mask |= X86_CR4_OSFXSR; |
| 34 | if (cpu_has_xmm) |
| 35 | cr4_mask |= X86_CR4_OSXMMEXCPT; |
| 36 | if (cr4_mask) |
| 37 | cr4_set_bits(cr4_mask); |
| 38 | |
| 39 | cr0 = read_cr0(); |
| 40 | cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */ |
| 41 | if (!cpu_has_fpu) |
| 42 | cr0 |= X86_CR0_EM; |
| 43 | write_cr0(cr0); |
Ingo Molnar | b1276c4 | 2015-04-29 10:58:03 +0200 | [diff] [blame] | 44 | |
| 45 | /* Flush out any pending x87 state: */ |
Ingo Molnar | 5fc9603 | 2015-08-22 09:52:06 +0200 | [diff] [blame] | 46 | #ifdef CONFIG_MATH_EMULATION |
| 47 | if (!cpu_has_fpu) |
| 48 | fpstate_init_soft(¤t->thread.fpu.state.soft); |
| 49 | else |
| 50 | #endif |
| 51 | asm volatile ("fninit"); |
Ingo Molnar | 41e7841 | 2015-04-26 15:32:40 +0200 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | /* |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 55 | * Enable all supported FPU features. Called when a CPU is brought online: |
Ingo Molnar | 41e7841 | 2015-04-26 15:32:40 +0200 | [diff] [blame] | 56 | */ |
| 57 | void fpu__init_cpu(void) |
| 58 | { |
| 59 | fpu__init_cpu_generic(); |
| 60 | fpu__init_cpu_xstate(); |
| 61 | fpu__init_cpu_ctx_switch(); |
| 62 | } |
| 63 | |
Ingo Molnar | 4d16409 | 2015-04-22 13:44:25 +0200 | [diff] [blame] | 64 | /* |
Ingo Molnar | dd86388 | 2015-04-26 15:07:18 +0200 | [diff] [blame] | 65 | * The earliest FPU detection code. |
| 66 | * |
| 67 | * Set the X86_FEATURE_FPU CPU-capability bit based on |
| 68 | * trying to execute an actual sequence of FPU instructions: |
Ingo Molnar | 2e2f3da | 2015-04-26 14:40:54 +0200 | [diff] [blame] | 69 | */ |
| 70 | static void fpu__init_system_early_generic(struct cpuinfo_x86 *c) |
| 71 | { |
| 72 | unsigned long cr0; |
| 73 | u16 fsw, fcw; |
| 74 | |
| 75 | fsw = fcw = 0xffff; |
| 76 | |
| 77 | cr0 = read_cr0(); |
| 78 | cr0 &= ~(X86_CR0_TS | X86_CR0_EM); |
| 79 | write_cr0(cr0); |
| 80 | |
| 81 | asm volatile("fninit ; fnstsw %0 ; fnstcw %1" |
| 82 | : "+m" (fsw), "+m" (fcw)); |
| 83 | |
| 84 | if (fsw == 0 && (fcw & 0x103f) == 0x003f) |
| 85 | set_cpu_cap(c, X86_FEATURE_FPU); |
| 86 | else |
| 87 | clear_cpu_cap(c, X86_FEATURE_FPU); |
Ingo Molnar | e83ab9a | 2015-04-26 14:43:44 +0200 | [diff] [blame] | 88 | |
| 89 | #ifndef CONFIG_MATH_EMULATION |
| 90 | if (!cpu_has_fpu) { |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 91 | pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n"); |
Ingo Molnar | e83ab9a | 2015-04-26 14:43:44 +0200 | [diff] [blame] | 92 | for (;;) |
| 93 | asm volatile("hlt"); |
| 94 | } |
| 95 | #endif |
Ingo Molnar | 2e2f3da | 2015-04-26 14:40:54 +0200 | [diff] [blame] | 96 | } |
| 97 | |
| 98 | /* |
Ingo Molnar | 4d16409 | 2015-04-22 13:44:25 +0200 | [diff] [blame] | 99 | * Boot time FPU feature detection code: |
| 100 | */ |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 101 | unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu; |
Ingo Molnar | 91a8c2a | 2015-04-24 10:49:11 +0200 | [diff] [blame] | 102 | |
Ingo Molnar | 3223187 | 2015-05-04 09:52:42 +0200 | [diff] [blame] | 103 | static void __init fpu__init_system_mxcsr(void) |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 104 | { |
Ingo Molnar | 91a8c2a | 2015-04-24 10:49:11 +0200 | [diff] [blame] | 105 | unsigned int mask = 0; |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 106 | |
| 107 | if (cpu_has_fxsr) { |
Ingo Molnar | b96fecb | 2015-07-04 09:58:19 +0200 | [diff] [blame] | 108 | /* Static because GCC does not get 16-byte stack alignment right: */ |
| 109 | static struct fxregs_state fxregs __initdata; |
Ingo Molnar | 91a8c2a | 2015-04-24 10:49:11 +0200 | [diff] [blame] | 110 | |
Ingo Molnar | b96fecb | 2015-07-04 09:58:19 +0200 | [diff] [blame] | 111 | asm volatile("fxsave %0" : "+m" (fxregs)); |
Ingo Molnar | 91a8c2a | 2015-04-24 10:49:11 +0200 | [diff] [blame] | 112 | |
Ingo Molnar | b96fecb | 2015-07-04 09:58:19 +0200 | [diff] [blame] | 113 | mask = fxregs.mxcsr_mask; |
Ingo Molnar | 91a8c2a | 2015-04-24 10:49:11 +0200 | [diff] [blame] | 114 | |
| 115 | /* |
| 116 | * If zero then use the default features mask, |
| 117 | * which has all features set, except the |
| 118 | * denormals-are-zero feature bit: |
| 119 | */ |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 120 | if (mask == 0) |
| 121 | mask = 0x0000ffbf; |
| 122 | } |
| 123 | mxcsr_feature_mask &= mask; |
| 124 | } |
| 125 | |
Ingo Molnar | 7218e8b | 2015-04-26 14:35:54 +0200 | [diff] [blame] | 126 | /* |
| 127 | * Once per bootup FPU initialization sequences that will run on most x86 CPUs: |
| 128 | */ |
Ingo Molnar | 3223187 | 2015-05-04 09:52:42 +0200 | [diff] [blame] | 129 | static void __init fpu__init_system_generic(void) |
Ingo Molnar | 7218e8b | 2015-04-26 14:35:54 +0200 | [diff] [blame] | 130 | { |
| 131 | /* |
| 132 | * Set up the legacy init FPU context. (xstate init might overwrite this |
| 133 | * with a more modern format, if the CPU supports it.) |
| 134 | */ |
Ingo Molnar | 6f57502 | 2015-04-30 11:07:06 +0200 | [diff] [blame] | 135 | fpstate_init_fxstate(&init_fpstate.fxsave); |
Ingo Molnar | 7218e8b | 2015-04-26 14:35:54 +0200 | [diff] [blame] | 136 | |
| 137 | fpu__init_system_mxcsr(); |
| 138 | } |
| 139 | |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 140 | /* |
| 141 | * Size of the FPU context state. All tasks in the system use the |
| 142 | * same context size, regardless of what portion they use. |
| 143 | * This is inherent to the XSAVE architecture which puts all state |
| 144 | * components into a single, continuous memory block: |
| 145 | */ |
Ingo Molnar | 41e7841 | 2015-04-26 15:32:40 +0200 | [diff] [blame] | 146 | unsigned int xstate_size; |
| 147 | EXPORT_SYMBOL_GPL(xstate_size); |
| 148 | |
Jiri Olsa | 25ec02f | 2015-12-21 15:25:30 +0100 | [diff] [blame] | 149 | /* Get alignment of the TYPE. */ |
| 150 | #define TYPE_ALIGN(TYPE) offsetof(struct { char x; TYPE test; }, test) |
| 151 | |
| 152 | /* |
| 153 | * Enforce that 'MEMBER' is the last field of 'TYPE'. |
| 154 | * |
| 155 | * Align the computed size with alignment of the TYPE, |
| 156 | * because that's how C aligns structs. |
| 157 | */ |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 158 | #define CHECK_MEMBER_AT_END_OF(TYPE, MEMBER) \ |
Jiri Olsa | 25ec02f | 2015-12-21 15:25:30 +0100 | [diff] [blame] | 159 | BUILD_BUG_ON(sizeof(TYPE) != ALIGN(offsetofend(TYPE, MEMBER), \ |
| 160 | TYPE_ALIGN(TYPE))) |
Dave Hansen | 0c8c0f0 | 2015-07-17 12:28:11 +0200 | [diff] [blame] | 161 | |
| 162 | /* |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 163 | * We append the 'struct fpu' to the task_struct: |
Dave Hansen | 0c8c0f0 | 2015-07-17 12:28:11 +0200 | [diff] [blame] | 164 | */ |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 165 | static void __init fpu__init_task_struct_size(void) |
Dave Hansen | 0c8c0f0 | 2015-07-17 12:28:11 +0200 | [diff] [blame] | 166 | { |
| 167 | int task_size = sizeof(struct task_struct); |
| 168 | |
| 169 | /* |
| 170 | * Subtract off the static size of the register state. |
| 171 | * It potentially has a bunch of padding. |
| 172 | */ |
| 173 | task_size -= sizeof(((struct task_struct *)0)->thread.fpu.state); |
| 174 | |
| 175 | /* |
| 176 | * Add back the dynamically-calculated register state |
| 177 | * size. |
| 178 | */ |
| 179 | task_size += xstate_size; |
| 180 | |
| 181 | /* |
| 182 | * We dynamically size 'struct fpu', so we require that |
| 183 | * it be at the end of 'thread_struct' and that |
| 184 | * 'thread_struct' be at the end of 'task_struct'. If |
| 185 | * you hit a compile error here, check the structure to |
| 186 | * see if something got added to the end. |
| 187 | */ |
| 188 | CHECK_MEMBER_AT_END_OF(struct fpu, state); |
| 189 | CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu); |
| 190 | CHECK_MEMBER_AT_END_OF(struct task_struct, thread); |
| 191 | |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 192 | arch_task_struct_size = task_size; |
Dave Hansen | 0c8c0f0 | 2015-07-17 12:28:11 +0200 | [diff] [blame] | 193 | } |
| 194 | |
Ingo Molnar | 41e7841 | 2015-04-26 15:32:40 +0200 | [diff] [blame] | 195 | /* |
| 196 | * Set up the xstate_size based on the legacy FPU context size. |
| 197 | * |
| 198 | * We set this up first, and later it will be overwritten by |
| 199 | * fpu__init_system_xstate() if the CPU knows about xstates. |
| 200 | */ |
Ingo Molnar | 3223187 | 2015-05-04 09:52:42 +0200 | [diff] [blame] | 201 | static void __init fpu__init_system_xstate_size_legacy(void) |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 202 | { |
Rasmus Villemoes | e49a449 | 2015-11-13 15:18:31 +0100 | [diff] [blame] | 203 | static int on_boot_cpu __initdata = 1; |
Ingo Molnar | e97131a | 2015-05-05 11:34:49 +0200 | [diff] [blame] | 204 | |
| 205 | WARN_ON_FPU(!on_boot_cpu); |
| 206 | on_boot_cpu = 0; |
| 207 | |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 208 | /* |
| 209 | * Note that xstate_size might be overwriten later during |
Ingo Molnar | c42103b | 2015-04-25 06:52:53 +0200 | [diff] [blame] | 210 | * fpu__init_system_xstate(). |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 211 | */ |
| 212 | |
| 213 | if (!cpu_has_fpu) { |
| 214 | /* |
| 215 | * Disable xsave as we do not support it if i387 |
| 216 | * emulation is enabled. |
| 217 | */ |
| 218 | setup_clear_cpu_cap(X86_FEATURE_XSAVE); |
| 219 | setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); |
Ingo Molnar | c47ada3 | 2015-04-30 17:15:32 +0200 | [diff] [blame] | 220 | xstate_size = sizeof(struct swregs_state); |
Ingo Molnar | 6a13320 | 2015-04-25 04:29:26 +0200 | [diff] [blame] | 221 | } else { |
| 222 | if (cpu_has_fxsr) |
Ingo Molnar | c47ada3 | 2015-04-30 17:15:32 +0200 | [diff] [blame] | 223 | xstate_size = sizeof(struct fxregs_state); |
Ingo Molnar | 6a13320 | 2015-04-25 04:29:26 +0200 | [diff] [blame] | 224 | else |
Ingo Molnar | c47ada3 | 2015-04-30 17:15:32 +0200 | [diff] [blame] | 225 | xstate_size = sizeof(struct fregs_state); |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 226 | } |
Ingo Molnar | 6f56a8d | 2015-05-20 11:59:45 +0200 | [diff] [blame] | 227 | /* |
| 228 | * Quirk: we don't yet handle the XSAVES* instructions |
| 229 | * correctly, as we don't correctly convert between |
| 230 | * standard and compacted format when interfacing |
| 231 | * with user-space - so disable it for now. |
| 232 | * |
| 233 | * The difference is small: with recent CPUs the |
| 234 | * compacted format is only marginally smaller than |
| 235 | * the standard FPU state format. |
| 236 | * |
| 237 | * ( This is easy to backport while we are fixing |
| 238 | * XSAVES* support. ) |
| 239 | */ |
| 240 | setup_clear_cpu_cap(X86_FEATURE_XSAVES); |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 241 | } |
| 242 | |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 243 | /* |
| 244 | * FPU context switching strategies: |
| 245 | * |
| 246 | * Against popular belief, we don't do lazy FPU saves, due to the |
| 247 | * task migration complications it brings on SMP - we only do |
| 248 | * lazy FPU restores. |
| 249 | * |
| 250 | * 'lazy' is the traditional strategy, which is based on setting |
| 251 | * CR0::TS to 1 during context-switch (instead of doing a full |
| 252 | * restore of the FPU state), which causes the first FPU instruction |
| 253 | * after the context switch (whenever it is executed) to fault - at |
| 254 | * which point we lazily restore the FPU state into FPU registers. |
| 255 | * |
| 256 | * Tasks are of course under no obligation to execute FPU instructions, |
| 257 | * so it can easily happen that another context-switch occurs without |
| 258 | * a single FPU instruction being executed. If we eventually switch |
| 259 | * back to the original task (that still owns the FPU) then we have |
| 260 | * not only saved the restores along the way, but we also have the |
| 261 | * FPU ready to be used for the original task. |
| 262 | * |
| 263 | * 'eager' switching is used on modern CPUs, there we switch the FPU |
| 264 | * state during every context switch, regardless of whether the task |
| 265 | * has used FPU instructions in that time slice or not. This is done |
| 266 | * because modern FPU context saving instructions are able to optimize |
| 267 | * state saving and restoration in hardware: they can detect both |
| 268 | * unused and untouched FPU state and optimize accordingly. |
| 269 | * |
| 270 | * [ Note that even in 'lazy' mode we might optimize context switches |
| 271 | * to use 'eager' restores, if we detect that a task is using the FPU |
| 272 | * frequently. See the fpu->counter logic in fpu/internal.h for that. ] |
| 273 | */ |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 274 | static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO; |
| 275 | |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 276 | /* |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 277 | * Pick the FPU context switching strategy: |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 278 | */ |
Ingo Molnar | 3223187 | 2015-05-04 09:52:42 +0200 | [diff] [blame] | 279 | static void __init fpu__init_system_ctx_switch(void) |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 280 | { |
Rasmus Villemoes | e49a449 | 2015-11-13 15:18:31 +0100 | [diff] [blame] | 281 | static bool on_boot_cpu __initdata = 1; |
Ingo Molnar | e97131a | 2015-05-05 11:34:49 +0200 | [diff] [blame] | 282 | |
| 283 | WARN_ON_FPU(!on_boot_cpu); |
| 284 | on_boot_cpu = 0; |
| 285 | |
| 286 | WARN_ON_FPU(current->thread.fpu.fpstate_active); |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 287 | current_thread_info()->status = 0; |
| 288 | |
| 289 | /* Auto enable eagerfpu for xsaveopt */ |
Borislav Petkov | 362f924 | 2015-12-07 10:39:41 +0100 | [diff] [blame] | 290 | if (boot_cpu_has(X86_FEATURE_XSAVEOPT) && eagerfpu != DISABLE) |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 291 | eagerfpu = ENABLE; |
| 292 | |
Dave Hansen | d91cab7 | 2015-09-02 16:31:26 -0700 | [diff] [blame] | 293 | if (xfeatures_mask & XFEATURE_MASK_EAGER) { |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 294 | if (eagerfpu == DISABLE) { |
| 295 | pr_err("x86/fpu: eagerfpu switching disabled, disabling the following xstate features: 0x%llx.\n", |
Dave Hansen | d91cab7 | 2015-09-02 16:31:26 -0700 | [diff] [blame] | 296 | xfeatures_mask & XFEATURE_MASK_EAGER); |
| 297 | xfeatures_mask &= ~XFEATURE_MASK_EAGER; |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 298 | } else { |
| 299 | eagerfpu = ENABLE; |
| 300 | } |
| 301 | } |
| 302 | |
| 303 | if (eagerfpu == ENABLE) |
| 304 | setup_force_cpu_cap(X86_FEATURE_EAGER_FPU); |
| 305 | |
Ingo Molnar | 3223187 | 2015-05-04 09:52:42 +0200 | [diff] [blame] | 306 | printk(KERN_INFO "x86/fpu: Using '%s' FPU context switches.\n", eagerfpu == ENABLE ? "eager" : "lazy"); |
Ingo Molnar | 6f5d265 | 2015-04-25 20:11:05 +0200 | [diff] [blame] | 307 | } |
| 308 | |
Ingo Molnar | e35f6f1 | 2015-04-25 04:34:48 +0200 | [diff] [blame] | 309 | /* |
yu-cheng yu | 4f81cba | 2016-01-06 14:24:51 -0800 | [diff] [blame^] | 310 | * We parse fpu parameters early because fpu__init_system() is executed |
| 311 | * before parse_early_param(). |
| 312 | */ |
| 313 | static void __init fpu__init_parse_early_param(void) |
| 314 | { |
| 315 | /* |
| 316 | * No need to check "eagerfpu=auto" again, since it is the |
| 317 | * initial default. |
| 318 | */ |
| 319 | if (cmdline_find_option_bool(boot_command_line, "eagerfpu=off")) |
| 320 | eagerfpu = DISABLE; |
| 321 | else if (cmdline_find_option_bool(boot_command_line, "eagerfpu=on")) |
| 322 | eagerfpu = ENABLE; |
| 323 | |
| 324 | if (cmdline_find_option_bool(boot_command_line, "no387")) |
| 325 | setup_clear_cpu_cap(X86_FEATURE_FPU); |
| 326 | |
| 327 | if (cmdline_find_option_bool(boot_command_line, "nofxsr")) { |
| 328 | setup_clear_cpu_cap(X86_FEATURE_FXSR); |
| 329 | setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT); |
| 330 | setup_clear_cpu_cap(X86_FEATURE_XMM); |
| 331 | } |
| 332 | |
| 333 | if (cmdline_find_option_bool(boot_command_line, "noxsave")) |
| 334 | fpu__xstate_clear_all_cpu_caps(); |
| 335 | |
| 336 | if (cmdline_find_option_bool(boot_command_line, "noxsaveopt")) |
| 337 | setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); |
| 338 | |
| 339 | if (cmdline_find_option_bool(boot_command_line, "noxsaves")) |
| 340 | setup_clear_cpu_cap(X86_FEATURE_XSAVES); |
| 341 | } |
| 342 | |
| 343 | /* |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 344 | * Called on the boot CPU once per system bootup, to set up the initial |
| 345 | * FPU state that is later cloned into all processes: |
Ingo Molnar | e35f6f1 | 2015-04-25 04:34:48 +0200 | [diff] [blame] | 346 | */ |
Ingo Molnar | 3223187 | 2015-05-04 09:52:42 +0200 | [diff] [blame] | 347 | void __init fpu__init_system(struct cpuinfo_x86 *c) |
Ingo Molnar | e35f6f1 | 2015-04-25 04:34:48 +0200 | [diff] [blame] | 348 | { |
yu-cheng yu | 4f81cba | 2016-01-06 14:24:51 -0800 | [diff] [blame^] | 349 | fpu__init_parse_early_param(); |
Ingo Molnar | dd86388 | 2015-04-26 15:07:18 +0200 | [diff] [blame] | 350 | fpu__init_system_early_generic(c); |
| 351 | |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 352 | /* |
| 353 | * The FPU has to be operational for some of the |
| 354 | * later FPU init activities: |
| 355 | */ |
Ingo Molnar | e35f6f1 | 2015-04-25 04:34:48 +0200 | [diff] [blame] | 356 | fpu__init_cpu(); |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 357 | |
Ingo Molnar | 2507e1c | 2015-04-25 08:35:53 +0200 | [diff] [blame] | 358 | /* |
Ingo Molnar | ae02679 | 2015-04-26 15:36:46 +0200 | [diff] [blame] | 359 | * But don't leave CR0::TS set yet, as some of the FPU setup |
| 360 | * methods depend on being able to execute FPU instructions |
| 361 | * that will fault on a set TS, such as the FXSAVE in |
| 362 | * fpu__init_system_mxcsr(). |
Ingo Molnar | 530b37e | 2015-04-25 08:27:44 +0200 | [diff] [blame] | 363 | */ |
| 364 | clts(); |
| 365 | |
Ingo Molnar | 7218e8b | 2015-04-26 14:35:54 +0200 | [diff] [blame] | 366 | fpu__init_system_generic(); |
Ingo Molnar | 7638b74 | 2015-04-26 15:23:37 +0200 | [diff] [blame] | 367 | fpu__init_system_xstate_size_legacy(); |
Ingo Molnar | c42103b | 2015-04-25 06:52:53 +0200 | [diff] [blame] | 368 | fpu__init_system_xstate(); |
Ingo Molnar | 5aaeb5c | 2015-07-17 12:28:12 +0200 | [diff] [blame] | 369 | fpu__init_task_struct_size(); |
Ingo Molnar | 997578b | 2015-04-26 10:35:57 +0200 | [diff] [blame] | 370 | |
Ingo Molnar | 011545b | 2015-04-26 08:28:31 +0200 | [diff] [blame] | 371 | fpu__init_system_ctx_switch(); |
Ingo Molnar | 0c86753 | 2015-04-22 10:53:34 +0200 | [diff] [blame] | 372 | } |