Thomas Gleixner | 2504ba9 | 2019-06-03 07:44:51 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Brijesh Singh | 535dac4 | 2016-01-14 10:31:11 -0600 | [diff] [blame] | 2 | /* |
| 3 | * AMD Seattle AHCI SATA driver |
| 4 | * |
| 5 | * Copyright (c) 2015, Advanced Micro Devices |
| 6 | * Author: Brijesh Singh <brijesh.singh@amd.com> |
| 7 | * |
| 8 | * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov |
Brijesh Singh | 535dac4 | 2016-01-14 10:31:11 -0600 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/pm.h> |
| 14 | #include <linux/device.h> |
| 15 | #include <linux/of_device.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/libata.h> |
| 18 | #include <linux/ahci_platform.h> |
| 19 | #include <linux/acpi.h> |
| 20 | #include <linux/pci_ids.h> |
| 21 | #include "ahci.h" |
| 22 | |
| 23 | /* SGPIO Control Register definition |
| 24 | * |
| 25 | * Bit Type Description |
| 26 | * 31 RW OD7.2 (activity) |
| 27 | * 30 RW OD7.1 (locate) |
| 28 | * 29 RW OD7.0 (fault) |
| 29 | * 28...8 RW OD6.2...OD0.0 (3bits per port, 1 bit per LED) |
| 30 | * 7 RO SGPIO feature flag |
| 31 | * 6:4 RO Reserved |
| 32 | * 3:0 RO Number of ports (0 means no port supported) |
| 33 | */ |
| 34 | #define ACTIVITY_BIT_POS(x) (8 + (3 * x)) |
| 35 | #define LOCATE_BIT_POS(x) (ACTIVITY_BIT_POS(x) + 1) |
| 36 | #define FAULT_BIT_POS(x) (LOCATE_BIT_POS(x) + 1) |
| 37 | |
| 38 | #define ACTIVITY_MASK 0x00010000 |
| 39 | #define LOCATE_MASK 0x00080000 |
| 40 | #define FAULT_MASK 0x00400000 |
| 41 | |
| 42 | #define DRV_NAME "ahci-seattle" |
| 43 | |
| 44 | static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state, |
| 45 | ssize_t size); |
| 46 | |
| 47 | struct seattle_plat_data { |
| 48 | void __iomem *sgpio_ctrl; |
| 49 | }; |
| 50 | |
| 51 | static struct ata_port_operations ahci_port_ops = { |
| 52 | .inherits = &ahci_ops, |
| 53 | }; |
| 54 | |
| 55 | static const struct ata_port_info ahci_port_info = { |
| 56 | .flags = AHCI_FLAG_COMMON, |
| 57 | .pio_mask = ATA_PIO4, |
| 58 | .udma_mask = ATA_UDMA6, |
| 59 | .port_ops = &ahci_port_ops, |
| 60 | }; |
| 61 | |
| 62 | static struct ata_port_operations ahci_seattle_ops = { |
| 63 | .inherits = &ahci_ops, |
| 64 | .transmit_led_message = seattle_transmit_led_message, |
| 65 | }; |
| 66 | |
| 67 | static const struct ata_port_info ahci_port_seattle_info = { |
| 68 | .flags = AHCI_FLAG_COMMON | ATA_FLAG_EM | ATA_FLAG_SW_ACTIVITY, |
| 69 | .link_flags = ATA_LFLAG_SW_ACTIVITY, |
| 70 | .pio_mask = ATA_PIO4, |
| 71 | .udma_mask = ATA_UDMA6, |
| 72 | .port_ops = &ahci_seattle_ops, |
| 73 | }; |
| 74 | |
| 75 | static struct scsi_host_template ahci_platform_sht = { |
| 76 | AHCI_SHT(DRV_NAME), |
| 77 | }; |
| 78 | |
| 79 | static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state, |
| 80 | ssize_t size) |
| 81 | { |
| 82 | struct ahci_host_priv *hpriv = ap->host->private_data; |
| 83 | struct ahci_port_priv *pp = ap->private_data; |
| 84 | struct seattle_plat_data *plat_data = hpriv->plat_data; |
| 85 | unsigned long flags; |
| 86 | int pmp; |
| 87 | struct ahci_em_priv *emp; |
| 88 | u32 val; |
| 89 | |
| 90 | /* get the slot number from the message */ |
| 91 | pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8; |
| 92 | if (pmp >= EM_MAX_SLOTS) |
| 93 | return -EINVAL; |
| 94 | emp = &pp->em_priv[pmp]; |
| 95 | |
| 96 | val = ioread32(plat_data->sgpio_ctrl); |
| 97 | if (state & ACTIVITY_MASK) |
| 98 | val |= 1 << ACTIVITY_BIT_POS((ap->port_no)); |
| 99 | else |
| 100 | val &= ~(1 << ACTIVITY_BIT_POS((ap->port_no))); |
| 101 | |
| 102 | if (state & LOCATE_MASK) |
| 103 | val |= 1 << LOCATE_BIT_POS((ap->port_no)); |
| 104 | else |
| 105 | val &= ~(1 << LOCATE_BIT_POS((ap->port_no))); |
| 106 | |
| 107 | if (state & FAULT_MASK) |
| 108 | val |= 1 << FAULT_BIT_POS((ap->port_no)); |
| 109 | else |
| 110 | val &= ~(1 << FAULT_BIT_POS((ap->port_no))); |
| 111 | |
| 112 | iowrite32(val, plat_data->sgpio_ctrl); |
| 113 | |
| 114 | spin_lock_irqsave(ap->lock, flags); |
| 115 | |
| 116 | /* save off new led state for port/slot */ |
| 117 | emp->led_state = state; |
| 118 | |
| 119 | spin_unlock_irqrestore(ap->lock, flags); |
| 120 | |
| 121 | return size; |
| 122 | } |
| 123 | |
| 124 | static const struct ata_port_info *ahci_seattle_get_port_info( |
| 125 | struct platform_device *pdev, struct ahci_host_priv *hpriv) |
| 126 | { |
| 127 | struct device *dev = &pdev->dev; |
| 128 | struct seattle_plat_data *plat_data; |
| 129 | u32 val; |
| 130 | |
| 131 | plat_data = devm_kzalloc(dev, sizeof(*plat_data), GFP_KERNEL); |
Wei Yongjun | f52a4c7 | 2016-06-14 00:26:49 +0000 | [diff] [blame] | 132 | if (!plat_data) |
Brijesh Singh | 535dac4 | 2016-01-14 10:31:11 -0600 | [diff] [blame] | 133 | return &ahci_port_info; |
| 134 | |
| 135 | plat_data->sgpio_ctrl = devm_ioremap_resource(dev, |
| 136 | platform_get_resource(pdev, IORESOURCE_MEM, 1)); |
| 137 | if (IS_ERR(plat_data->sgpio_ctrl)) |
| 138 | return &ahci_port_info; |
| 139 | |
| 140 | val = ioread32(plat_data->sgpio_ctrl); |
| 141 | |
| 142 | if (!(val & 0xf)) |
| 143 | return &ahci_port_info; |
| 144 | |
| 145 | hpriv->em_loc = 0; |
| 146 | hpriv->em_buf_sz = 4; |
| 147 | hpriv->em_msg_type = EM_MSG_TYPE_LED; |
| 148 | hpriv->plat_data = plat_data; |
| 149 | |
| 150 | dev_info(dev, "SGPIO LED control is enabled.\n"); |
| 151 | return &ahci_port_seattle_info; |
| 152 | } |
| 153 | |
| 154 | static int ahci_seattle_probe(struct platform_device *pdev) |
| 155 | { |
| 156 | int rc; |
| 157 | struct ahci_host_priv *hpriv; |
| 158 | |
Kunihiko Hayashi | 16af2d6 | 2018-08-22 21:13:01 +0900 | [diff] [blame] | 159 | hpriv = ahci_platform_get_resources(pdev, 0); |
Brijesh Singh | 535dac4 | 2016-01-14 10:31:11 -0600 | [diff] [blame] | 160 | if (IS_ERR(hpriv)) |
| 161 | return PTR_ERR(hpriv); |
| 162 | |
| 163 | rc = ahci_platform_enable_resources(hpriv); |
| 164 | if (rc) |
| 165 | return rc; |
| 166 | |
| 167 | rc = ahci_platform_init_host(pdev, hpriv, |
| 168 | ahci_seattle_get_port_info(pdev, hpriv), |
| 169 | &ahci_platform_sht); |
| 170 | if (rc) |
| 171 | goto disable_resources; |
| 172 | |
| 173 | return 0; |
| 174 | disable_resources: |
| 175 | ahci_platform_disable_resources(hpriv); |
| 176 | return rc; |
| 177 | } |
| 178 | |
| 179 | static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend, |
| 180 | ahci_platform_resume); |
| 181 | |
| 182 | static const struct acpi_device_id ahci_acpi_match[] = { |
| 183 | { "AMDI0600", 0 }, |
| 184 | {} |
| 185 | }; |
| 186 | MODULE_DEVICE_TABLE(acpi, ahci_acpi_match); |
| 187 | |
| 188 | static struct platform_driver ahci_seattle_driver = { |
| 189 | .probe = ahci_seattle_probe, |
| 190 | .remove = ata_platform_remove_one, |
| 191 | .driver = { |
| 192 | .name = DRV_NAME, |
| 193 | .acpi_match_table = ahci_acpi_match, |
| 194 | .pm = &ahci_pm_ops, |
| 195 | }, |
| 196 | }; |
| 197 | module_platform_driver(ahci_seattle_driver); |
| 198 | |
| 199 | MODULE_DESCRIPTION("Seattle AHCI SATA platform driver"); |
| 200 | MODULE_AUTHOR("Brijesh Singh <brijesh.singh@amd.com>"); |
| 201 | MODULE_LICENSE("GPL"); |
| 202 | MODULE_ALIAS("platform:" DRV_NAME); |