| Matthias Brugger | 9a4c880 | 2015-01-13 13:28:56 +0100 | [diff] [blame] | 1 | Mediatek SoCs Watchdog timer |
| 2 | |
| 3 | Required properties: |
| 4 | |
| Erin Lo | 02eca17 | 2015-10-20 14:34:30 +0800 | [diff] [blame] | 5 | - compatible should contain: |
| Matthias Brugger | 275e859 | 2017-07-20 12:22:44 +0200 | [diff] [blame] | 6 | "mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701 |
| 7 | "mediatek,mt6589-wdt": for MT6589 |
| Matthias Brugger | f4fdb9c | 2017-07-20 12:22:45 +0200 | [diff] [blame] | 8 | "mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797 |
| Linus Torvalds | 939ae58 | 2017-09-14 13:28:30 -0700 | [diff] [blame] | 9 | "mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622 |
| 10 | "mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623 |
| Ryder Lee | 4d9c6e9 | 2018-11-07 15:10:36 +0800 | [diff] [blame^] | 11 | "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629 |
| Erin Lo | 02eca17 | 2015-10-20 14:34:30 +0800 | [diff] [blame] | 12 | |
| Matthias Brugger | 9a4c880 | 2015-01-13 13:28:56 +0100 | [diff] [blame] | 13 | - reg : Specifies base physical address and size of the registers. |
| 14 | |
| Marcus Folkesson | b82e695 | 2018-02-11 21:08:45 +0100 | [diff] [blame] | 15 | Optional properties: |
| 16 | - timeout-sec: contains the watchdog timeout in seconds. |
| 17 | |
| Matthias Brugger | 9a4c880 | 2015-01-13 13:28:56 +0100 | [diff] [blame] | 18 | Example: |
| 19 | |
| Marco Franchi | 48c926c | 2017-11-08 14:27:48 -0200 | [diff] [blame] | 20 | wdt: watchdog@10000000 { |
| Matthias Brugger | 9a4c880 | 2015-01-13 13:28:56 +0100 | [diff] [blame] | 21 | compatible = "mediatek,mt6589-wdt"; |
| 22 | reg = <0x10000000 0x18>; |
| Marcus Folkesson | b82e695 | 2018-02-11 21:08:45 +0100 | [diff] [blame] | 23 | timeout-sec = <10>; |
| Matthias Brugger | 9a4c880 | 2015-01-13 13:28:56 +0100 | [diff] [blame] | 24 | }; |