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Santosh Shilimkard5e9fe82013-06-10 11:33:31 -04001/*
2 * Copyright 2013 Texas Instruments, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
Santosh Shilimkareb788f42013-08-05 13:13:07 -04009#include <dt-bindings/interrupt-controller/arm-gic.h>
Grygorii Strashko970c2252014-02-10 18:41:18 +020010#include <dt-bindings/gpio/gpio.h>
Santosh Shilimkareb788f42013-08-05 13:13:07 -040011
Santosh Shilimkar226d1c52013-08-05 13:17:15 -040012#include "skeleton.dtsi"
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040013
14/ {
15 model = "Texas Instruments Keystone 2 SoC";
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040016 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&gic>;
19
20 aliases {
21 serial0 = &uart0;
22 };
23
24 memory {
25 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
26 };
27
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040028 gic: interrupt-controller {
29 compatible = "arm,cortex-a15-gic";
30 #interrupt-cells = <3>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040031 interrupt-controller;
32 reg = <0x0 0x02561000 0x0 0x1000>,
Santosh Shilimkara18b4aa2013-11-09 14:33:13 -050033 <0x0 0x02562000 0x0 0x2000>,
34 <0x0 0x02564000 0x0 0x1000>,
35 <0x0 0x02566000 0x0 0x2000>;
Santosh Shilimkar0ee15442013-11-09 14:36:00 -050036 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
37 IRQ_TYPE_LEVEL_HIGH)>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040038 };
39
40 timer {
41 compatible = "arm,armv7-timer";
Santosh Shilimkareb788f42013-08-05 13:13:07 -040042 interrupts =
43 <GIC_PPI 13
44 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
45 <GIC_PPI 14
46 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
47 <GIC_PPI 11
48 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
49 <GIC_PPI 10
50 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040051 };
52
53 pmu {
54 compatible = "arm,cortex-a15-pmu";
Santosh Shilimkareb788f42013-08-05 13:13:07 -040055 interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
56 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
57 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
58 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040059 };
60
61 soc {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "ti,keystone","simple-bus";
65 interrupt-parent = <&gic>;
66 ranges = <0x0 0x0 0x0 0xc0000000>;
Grygorii Strashko4d46596d2014-02-12 19:20:16 +020067 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040068
69 rstctrl: reset-controller {
70 compatible = "ti,keystone-reset";
71 reg = <0x023100e8 4>; /* pll reset control reg */
72 };
73
Santosh Shilimkarfeeea8f2013-07-09 12:51:51 -040074 /include/ "keystone-clocks.dtsi"
75
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040076 uart0: serial@02530c00 {
77 compatible = "ns16550a";
78 current-speed = <115200>;
79 reg-shift = <2>;
80 reg-io-width = <4>;
81 reg = <0x02530c00 0x100>;
Santosh Shilimkarf023bd12013-07-19 19:11:39 -040082 clocks = <&clkuart0>;
Santosh Shilimkareb788f42013-08-05 13:13:07 -040083 interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040084 };
85
86 uart1: serial@02531000 {
87 compatible = "ns16550a";
88 current-speed = <115200>;
89 reg-shift = <2>;
90 reg-io-width = <4>;
91 reg = <0x02531000 0x100>;
Santosh Shilimkarf023bd12013-07-19 19:11:39 -040092 clocks = <&clkuart1>;
Santosh Shilimkareb788f42013-08-05 13:13:07 -040093 interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -040094 };
95
Santosh Shilimkar6120ac22013-07-23 20:07:07 -040096 i2c0: i2c@2530000 {
97 compatible = "ti,davinci-i2c";
98 reg = <0x02530000 0x400>;
99 clock-frequency = <100000>;
100 clocks = <&clki2c>;
101 interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
102 #address-cells = <1>;
103 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400104 };
105
106 i2c1: i2c@2530400 {
107 compatible = "ti,davinci-i2c";
108 reg = <0x02530400 0x400>;
109 clock-frequency = <100000>;
110 clocks = <&clki2c>;
111 interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
Grygorii Strashko39535052014-04-08 14:46:06 +0300112 #address-cells = <1>;
113 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400114 };
115
116 i2c2: i2c@2530800 {
117 compatible = "ti,davinci-i2c";
118 reg = <0x02530800 0x400>;
119 clock-frequency = <100000>;
120 clocks = <&clki2c>;
121 interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
Grygorii Strashko39535052014-04-08 14:46:06 +0300122 #address-cells = <1>;
123 #size-cells = <0>;
Santosh Shilimkar6120ac22013-07-23 20:07:07 -0400124 };
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400125
126 spi0: spi@21000400 {
127 compatible = "ti,dm6441-spi";
128 reg = <0x21000400 0x200>;
129 num-cs = <4>;
130 ti,davinci-spi-intr-line = <0>;
131 interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
132 clocks = <&clkspi>;
Grygorii Strashko509046a2014-04-28 15:20:22 +0300133 #address-cells = <1>;
134 #size-cells = <0>;
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400135 };
136
137 spi1: spi@21000600 {
138 compatible = "ti,dm6441-spi";
139 reg = <0x21000600 0x200>;
140 num-cs = <4>;
141 ti,davinci-spi-intr-line = <0>;
142 interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
143 clocks = <&clkspi>;
Grygorii Strashko509046a2014-04-28 15:20:22 +0300144 #address-cells = <1>;
145 #size-cells = <0>;
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400146 };
147
148 spi2: spi@21000800 {
149 compatible = "ti,dm6441-spi";
150 reg = <0x21000800 0x200>;
151 num-cs = <4>;
152 ti,davinci-spi-intr-line = <0>;
153 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
154 clocks = <&clkspi>;
Grygorii Strashko509046a2014-04-28 15:20:22 +0300155 #address-cells = <1>;
156 #size-cells = <0>;
Santosh Shilimkarb3bd6c52013-07-23 20:25:23 -0400157 };
WingMan Kwok08c36762013-12-09 14:43:23 -0500158
159 usb_phy: usb_phy@2620738 {
160 compatible = "ti,keystone-usbphy";
161 #address-cells = <1>;
162 #size-cells = <1>;
163 reg = <0x2620738 32>;
164 status = "disabled";
165 };
WingMan Kwok73207952013-12-09 17:25:12 -0500166
167 usb: usb@2680000 {
168 compatible = "ti,keystone-dwc3";
169 #address-cells = <1>;
170 #size-cells = <1>;
171 reg = <0x2680000 0x10000>;
172 clocks = <&clkusb>;
173 clock-names = "usb";
174 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
175 ranges;
176 status = "disabled";
177
178 dwc3@2690000 {
179 compatible = "synopsys,dwc3";
180 reg = <0x2690000 0x70000>;
181 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
182 usb-phy = <&usb_phy>, <&usb_phy>;
183 };
184 };
Ivan Khoronzhuk20d89312013-10-16 23:15:32 +0300185
186 wdt: wdt@022f0080 {
187 compatible = "ti,keystone-wdt","ti,davinci-wdt";
188 reg = <0x022f0080 0x80>;
189 clocks = <&clkwdtimer0>;
190 };
Ivan Khoronzhuk2b4f76b2013-11-28 21:23:56 +0200191
192 clock_event: timer@22f0000 {
193 compatible = "ti,keystone-timer";
194 reg = <0x022f0000 0x80>;
195 interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
196 clocks = <&clktimer15>;
197 };
Grygorii Strashko970c2252014-02-10 18:41:18 +0200198
199 gpio0: gpio@260bf00 {
200 compatible = "ti,keystone-gpio";
201 reg = <0x0260bf00 0x100>;
202 gpio-controller;
203 #gpio-cells = <2>;
204 /* HW Interrupts mapped to GPIO pins */
205 interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
206 <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
207 <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
208 <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
209 <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
210 <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
211 <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
212 <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
213 <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
214 <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
215 <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
216 <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
217 <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
218 <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
219 <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
220 <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
221 <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
222 <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
223 <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
224 <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
225 <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
226 <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
227 <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
228 <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
229 <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
230 <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
231 <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
232 <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
233 <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
234 <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
235 <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
236 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
237 clocks = <&clkgpio>;
238 clock-names = "gpio";
239 ti,ngpio = <32>;
240 ti,davinci-gpio-unbanked = <32>;
241 };
Ivan Khoronzhuk82c04f72014-02-28 21:05:24 -0500242
243 aemif: aemif@21000A00 {
244 compatible = "ti,keystone-aemif", "ti,davinci-aemif";
245 #address-cells = <2>;
246 #size-cells = <1>;
247 clocks = <&clkaemif>;
248 clock-names = "aemif";
249 clock-ranges;
250
251 reg = <0x21000A00 0x00000100>;
252 ranges = <0 0 0x30000000 0x10000000
253 1 0 0x21000A00 0x00000100>;
254 };
Santosh Shilimkard5e9fe82013-06-10 11:33:31 -0400255 };
256};