blob: 328bde09d5bf0531d2dd447edbe47b847582d5da [file] [log] [blame]
Mark Brownf2644a22009-04-07 19:20:14 +01001/*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
Mark Brown656baae2012-05-23 12:39:07 +01004 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
Mark Brownf2644a22009-04-07 19:20:14 +01006 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
Zidan Wang75aa8862015-01-07 15:31:44 +080018#include <linux/clk.h>
Mark Brownf2644a22009-04-07 19:20:14 +010019#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090020#include <linux/slab.h>
Mark Brownf2644a22009-04-07 19:20:14 +010021#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
Mark Brownf2644a22009-04-07 19:20:14 +010025#include <sound/initval.h>
26#include <sound/tlv.h>
Mark Brownb6877a42010-03-03 11:43:38 +000027#include <sound/wm8960.h>
Mark Brownf2644a22009-04-07 19:20:14 +010028
29#include "wm8960.h"
30
Mark Brownf2644a22009-04-07 19:20:14 +010031/* R25 - Power 1 */
Mark Brown913d7b42010-03-03 13:47:03 +000032#define WM8960_VMID_MASK 0x180
Mark Brownf2644a22009-04-07 19:20:14 +010033#define WM8960_VREF 0x40
34
Mark Brown913d7b42010-03-03 13:47:03 +000035/* R26 - Power 2 */
36#define WM8960_PWR2_LOUT1 0x40
37#define WM8960_PWR2_ROUT1 0x20
38#define WM8960_PWR2_OUT3 0x02
39
Mark Brownf2644a22009-04-07 19:20:14 +010040/* R28 - Anti-pop 1 */
41#define WM8960_POBCTRL 0x80
42#define WM8960_BUFDCOPEN 0x10
43#define WM8960_BUFIOEN 0x08
44#define WM8960_SOFT_ST 0x04
45#define WM8960_HPSTBY 0x01
46
47/* R29 - Anti-pop 2 */
48#define WM8960_DISOP 0x40
Mark Brown913d7b42010-03-03 13:47:03 +000049#define WM8960_DRES_MASK 0x30
Mark Brownf2644a22009-04-07 19:20:14 +010050
Zidan Wang3176bf22015-08-11 19:25:15 +080051static bool is_pll_freq_available(unsigned int source, unsigned int target);
52static int wm8960_set_pll(struct snd_soc_codec *codec,
53 unsigned int freq_in, unsigned int freq_out);
Mark Brownf2644a22009-04-07 19:20:14 +010054/*
55 * wm8960 register cache
56 * We can't read the WM8960 register space when we are
57 * using 2 wire for device control, so we cache them instead.
58 */
Mark Brown0ebe36c2012-09-10 19:23:57 +080059static const struct reg_default wm8960_reg_defaults[] = {
Mark Brownb3df0262013-02-26 23:35:46 +000060 { 0x0, 0x00a7 },
61 { 0x1, 0x00a7 },
Mark Brown0ebe36c2012-09-10 19:23:57 +080062 { 0x2, 0x0000 },
63 { 0x3, 0x0000 },
64 { 0x4, 0x0000 },
65 { 0x5, 0x0008 },
66 { 0x6, 0x0000 },
67 { 0x7, 0x000a },
68 { 0x8, 0x01c0 },
69 { 0x9, 0x0000 },
70 { 0xa, 0x00ff },
71 { 0xb, 0x00ff },
72
73 { 0x10, 0x0000 },
74 { 0x11, 0x007b },
75 { 0x12, 0x0100 },
76 { 0x13, 0x0032 },
77 { 0x14, 0x0000 },
78 { 0x15, 0x00c3 },
79 { 0x16, 0x00c3 },
80 { 0x17, 0x01c0 },
81 { 0x18, 0x0000 },
82 { 0x19, 0x0000 },
83 { 0x1a, 0x0000 },
84 { 0x1b, 0x0000 },
85 { 0x1c, 0x0000 },
86 { 0x1d, 0x0000 },
87
88 { 0x20, 0x0100 },
89 { 0x21, 0x0100 },
90 { 0x22, 0x0050 },
91
92 { 0x25, 0x0050 },
93 { 0x26, 0x0000 },
94 { 0x27, 0x0000 },
95 { 0x28, 0x0000 },
96 { 0x29, 0x0000 },
97 { 0x2a, 0x0040 },
98 { 0x2b, 0x0000 },
99 { 0x2c, 0x0000 },
100 { 0x2d, 0x0050 },
101 { 0x2e, 0x0050 },
102 { 0x2f, 0x0000 },
103 { 0x30, 0x0002 },
104 { 0x31, 0x0037 },
105
106 { 0x33, 0x0080 },
107 { 0x34, 0x0008 },
108 { 0x35, 0x0031 },
109 { 0x36, 0x0026 },
110 { 0x37, 0x00e9 },
Mark Brownf2644a22009-04-07 19:20:14 +0100111};
112
Mark Brown0ebe36c2012-09-10 19:23:57 +0800113static bool wm8960_volatile(struct device *dev, unsigned int reg)
114{
115 switch (reg) {
116 case WM8960_RESET:
117 return true;
118 default:
119 return false;
120 }
121}
122
Mark Brownf2644a22009-04-07 19:20:14 +0100123struct wm8960_priv {
Zidan Wang75aa8862015-01-07 15:31:44 +0800124 struct clk *mclk;
Mark Brown0ebe36c2012-09-10 19:23:57 +0800125 struct regmap *regmap;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000126 int (*set_bias_level)(struct snd_soc_codec *,
127 enum snd_soc_bias_level level);
Mark Brown913d7b42010-03-03 13:47:03 +0000128 struct snd_soc_dapm_widget *lout1;
129 struct snd_soc_dapm_widget *rout1;
130 struct snd_soc_dapm_widget *out3;
Mark Brownafd6d362010-07-05 13:58:16 +0900131 bool deemph;
Zidan Wang3176bf22015-08-11 19:25:15 +0800132 int lrclk;
Zidan Wang0e50b512015-05-12 14:58:08 +0800133 int bclk;
134 int sysclk;
Zidan Wang3176bf22015-08-11 19:25:15 +0800135 int clk_id;
136 int freq_in;
137 bool is_stream_in_use[2];
Zidan Wange2280c902014-11-20 19:07:48 +0800138 struct wm8960_data pdata;
Mark Brownf2644a22009-04-07 19:20:14 +0100139};
140
Zidan Wang3ad5e862014-11-27 16:53:08 +0800141#define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
Mark Brownf2644a22009-04-07 19:20:14 +0100142
143/* enumerated controls */
Mark Brownf2644a22009-04-07 19:20:14 +0100144static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
145 "Right Inverted", "Stereo Inversion"};
146static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
147static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
148static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
149static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
Zidan Wang4a5893c2015-12-24 14:58:03 +0800150static const char *wm8960_adc_data_output_sel[] = {
151 "Left Data = Left ADC; Right Data = Right ADC",
152 "Left Data = Left ADC; Right Data = Left ADC",
153 "Left Data = Right ADC; Right Data = Right ADC",
154 "Left Data = Right ADC; Right Data = Left ADC",
155};
Mark Brownf2644a22009-04-07 19:20:14 +0100156
157static const struct soc_enum wm8960_enum[] = {
Mark Brownf2644a22009-04-07 19:20:14 +0100158 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
159 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
160 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
161 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
162 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
163 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
Zidan Wang4a5893c2015-12-24 14:58:03 +0800164 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
Mark Brownf2644a22009-04-07 19:20:14 +0100165};
166
Mark Brownafd6d362010-07-05 13:58:16 +0900167static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
168
169static int wm8960_set_deemph(struct snd_soc_codec *codec)
170{
171 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
172 int val, i, best;
173
174 /* If we're using deemphasis select the nearest available sample
175 * rate.
176 */
177 if (wm8960->deemph) {
178 best = 1;
179 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
Zidan Wang3176bf22015-08-11 19:25:15 +0800180 if (abs(deemph_settings[i] - wm8960->lrclk) <
181 abs(deemph_settings[best] - wm8960->lrclk))
Mark Brownafd6d362010-07-05 13:58:16 +0900182 best = i;
183 }
184
185 val = best << 1;
186 } else {
187 val = 0;
188 }
189
190 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
191
192 return snd_soc_update_bits(codec, WM8960_DACCTL1,
193 0x6, val);
194}
195
196static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
197 struct snd_ctl_elem_value *ucontrol)
198{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100199 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownafd6d362010-07-05 13:58:16 +0900200 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
201
Takashi Iwaib4a18c82015-03-10 12:39:14 +0100202 ucontrol->value.integer.value[0] = wm8960->deemph;
Dmitry Artamonow3f343f82010-12-08 23:36:17 +0300203 return 0;
Mark Brownafd6d362010-07-05 13:58:16 +0900204}
205
206static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
207 struct snd_ctl_elem_value *ucontrol)
208{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100209 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownafd6d362010-07-05 13:58:16 +0900210 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Dan Carpenterc1fe81f2015-10-13 10:09:19 +0300211 unsigned int deemph = ucontrol->value.integer.value[0];
Mark Brownafd6d362010-07-05 13:58:16 +0900212
213 if (deemph > 1)
214 return -EINVAL;
215
216 wm8960->deemph = deemph;
217
218 return wm8960_set_deemph(codec);
219}
220
Zidan Wang3758ff52015-09-09 19:29:10 +0800221static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800222static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
Zidan Wang3758ff52015-09-09 19:29:10 +0800223static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
Mark Brownf2644a22009-04-07 19:20:14 +0100224static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
225static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800226static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
227static const unsigned int micboost_tlv[] = {
228 TLV_DB_RANGE_HEAD(2),
229 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
230 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
231};
Mark Brownf2644a22009-04-07 19:20:14 +0100232
233static const struct snd_kcontrol_new wm8960_snd_controls[] = {
234SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800235 0, 63, 0, inpga_tlv),
Mark Brownf2644a22009-04-07 19:20:14 +0100236SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
237 6, 1, 0),
238SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
239 7, 1, 0),
240
Mark Brown21eb2692013-02-26 23:36:37 +0000241SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800242 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000243SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800244 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000245SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800246 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000247SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800248 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
249SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
Zidan Wang8524bb02015-09-18 17:19:43 +0800250 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
Zidan Wang7e90f9b2015-09-09 19:29:11 +0800251SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
Zidan Wang8524bb02015-09-18 17:19:43 +0800252 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
Mark Brown21eb2692013-02-26 23:36:37 +0000253
Mark Brownf2644a22009-04-07 19:20:14 +0100254SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
255 0, 255, 0, dac_tlv),
256
257SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
258 0, 127, 0, out_tlv),
259SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
260 7, 1, 0),
261
262SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
263 0, 127, 0, out_tlv),
264SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
265 7, 1, 0),
266SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
267SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
268
269SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
Mark Brown4faaa8d2010-07-05 13:54:32 +0900270SOC_ENUM("ADC Polarity", wm8960_enum[0]),
Mark Brownf2644a22009-04-07 19:20:14 +0100271SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
272
Zidan Wanga077e812015-06-11 19:14:36 +0800273SOC_ENUM("DAC Polarity", wm8960_enum[1]),
Mark Brownafd6d362010-07-05 13:58:16 +0900274SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
275 wm8960_get_deemph, wm8960_put_deemph),
Mark Brownf2644a22009-04-07 19:20:14 +0100276
Mark Brown4faaa8d2010-07-05 13:54:32 +0900277SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
278SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
Mark Brownf2644a22009-04-07 19:20:14 +0100279SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
280SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
281
Mark Brown4faaa8d2010-07-05 13:54:32 +0900282SOC_ENUM("ALC Function", wm8960_enum[4]),
Mark Brownf2644a22009-04-07 19:20:14 +0100283SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
284SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
285SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
286SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
Mark Brown4faaa8d2010-07-05 13:54:32 +0900287SOC_ENUM("ALC Mode", wm8960_enum[5]),
Mark Brownf2644a22009-04-07 19:20:14 +0100288SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
289SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
290
291SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
292SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
293
Ma Haijunc324aac2013-08-14 09:15:38 +0800294SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
295 0, 255, 0, adc_tlv),
Mark Brownf2644a22009-04-07 19:20:14 +0100296
297SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
298 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
299SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
300 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
301SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
302 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
303SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
304 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
Zidan Wang4a5893c2015-12-24 14:58:03 +0800305
306SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
Mark Brownf2644a22009-04-07 19:20:14 +0100307};
308
309static const struct snd_kcontrol_new wm8960_lin_boost[] = {
310SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
311SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
312SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
313};
314
315static const struct snd_kcontrol_new wm8960_lin[] = {
316SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
317};
318
319static const struct snd_kcontrol_new wm8960_rin_boost[] = {
320SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
321SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
322SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
323};
324
325static const struct snd_kcontrol_new wm8960_rin[] = {
326SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
327};
328
329static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
330SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
331SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
332SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
333};
334
335static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
336SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
337SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
338SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
339};
340
341static const struct snd_kcontrol_new wm8960_mono_out[] = {
342SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
343SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
344};
345
346static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
347SND_SOC_DAPM_INPUT("LINPUT1"),
348SND_SOC_DAPM_INPUT("RINPUT1"),
349SND_SOC_DAPM_INPUT("LINPUT2"),
350SND_SOC_DAPM_INPUT("RINPUT2"),
351SND_SOC_DAPM_INPUT("LINPUT3"),
352SND_SOC_DAPM_INPUT("RINPUT3"),
353
Mark Brown187774c2011-10-27 09:46:17 +0200354SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
Mark Brownf2644a22009-04-07 19:20:14 +0100355
356SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
357 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
358SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
359 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
360
361SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
362 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
363SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
364 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
365
Mark Brown44426de2013-02-26 23:36:48 +0000366SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
367SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
Mark Brownf2644a22009-04-07 19:20:14 +0100368
369SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
370SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
371
372SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
373 &wm8960_loutput_mixer[0],
374 ARRAY_SIZE(wm8960_loutput_mixer)),
375SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
376 &wm8960_routput_mixer[0],
377 ARRAY_SIZE(wm8960_routput_mixer)),
378
Mark Brownf2644a22009-04-07 19:20:14 +0100379SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
380SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
381
382SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
383SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
384
385SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
386SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
387
388SND_SOC_DAPM_OUTPUT("SPK_LP"),
389SND_SOC_DAPM_OUTPUT("SPK_LN"),
390SND_SOC_DAPM_OUTPUT("HP_L"),
391SND_SOC_DAPM_OUTPUT("HP_R"),
392SND_SOC_DAPM_OUTPUT("SPK_RP"),
393SND_SOC_DAPM_OUTPUT("SPK_RN"),
394SND_SOC_DAPM_OUTPUT("OUT3"),
395};
396
Mark Brown913d7b42010-03-03 13:47:03 +0000397static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
398SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
399 &wm8960_mono_out[0],
400 ARRAY_SIZE(wm8960_mono_out)),
401};
402
403/* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
404static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
405SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
406};
407
Mark Brownf2644a22009-04-07 19:20:14 +0100408static const struct snd_soc_dapm_route audio_paths[] = {
409 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
410 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
411 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
412
413 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
414 { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
415 { "Left Input Mixer", NULL, "LINPUT2" },
416 { "Left Input Mixer", NULL, "LINPUT3" },
417
418 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
419 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
420 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
421
422 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
423 { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
424 { "Right Input Mixer", NULL, "RINPUT2" },
Zidan Wang85e36a1f2015-05-12 14:58:36 +0800425 { "Right Input Mixer", NULL, "RINPUT3" },
Mark Brownf2644a22009-04-07 19:20:14 +0100426
427 { "Left ADC", NULL, "Left Input Mixer" },
428 { "Right ADC", NULL, "Right Input Mixer" },
429
430 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
431 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
432 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
433
434 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
435 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
436 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
437
Mark Brownf2644a22009-04-07 19:20:14 +0100438 { "LOUT1 PGA", NULL, "Left Output Mixer" },
439 { "ROUT1 PGA", NULL, "Right Output Mixer" },
440
441 { "HP_L", NULL, "LOUT1 PGA" },
442 { "HP_R", NULL, "ROUT1 PGA" },
443
444 { "Left Speaker PGA", NULL, "Left Output Mixer" },
445 { "Right Speaker PGA", NULL, "Right Output Mixer" },
446
447 { "Left Speaker Output", NULL, "Left Speaker PGA" },
448 { "Right Speaker Output", NULL, "Right Speaker PGA" },
449
450 { "SPK_LN", NULL, "Left Speaker Output" },
451 { "SPK_LP", NULL, "Left Speaker Output" },
452 { "SPK_RN", NULL, "Right Speaker Output" },
453 { "SPK_RP", NULL, "Right Speaker Output" },
Mark Brown913d7b42010-03-03 13:47:03 +0000454};
455
456static const struct snd_soc_dapm_route audio_paths_out3[] = {
457 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
458 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
Mark Brownf2644a22009-04-07 19:20:14 +0100459
460 { "OUT3", NULL, "Mono Output Mixer", }
461};
462
Mark Brown913d7b42010-03-03 13:47:03 +0000463static const struct snd_soc_dapm_route audio_paths_capless[] = {
464 { "HP_L", NULL, "OUT3 VMID" },
465 { "HP_R", NULL, "OUT3 VMID" },
466
467 { "OUT3 VMID", NULL, "Left Output Mixer" },
468 { "OUT3 VMID", NULL, "Right Output Mixer" },
469};
470
Mark Brownf2644a22009-04-07 19:20:14 +0100471static int wm8960_add_widgets(struct snd_soc_codec *codec)
472{
Mark Brownb2c812e2010-04-14 15:35:19 +0900473 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wange2280c902014-11-20 19:07:48 +0800474 struct wm8960_data *pdata = &wm8960->pdata;
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200475 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Mark Brown913d7b42010-03-03 13:47:03 +0000476 struct snd_soc_dapm_widget *w;
477
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200478 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
Mark Brownf2644a22009-04-07 19:20:14 +0100479 ARRAY_SIZE(wm8960_dapm_widgets));
480
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200481 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
Mark Brownf2644a22009-04-07 19:20:14 +0100482
Mark Brown913d7b42010-03-03 13:47:03 +0000483 /* In capless mode OUT3 is used to provide VMID for the
484 * headphone outputs, otherwise it is used as a mono mixer.
485 */
486 if (pdata && pdata->capless) {
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200487 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
Mark Brown913d7b42010-03-03 13:47:03 +0000488 ARRAY_SIZE(wm8960_dapm_widgets_capless));
489
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200490 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
Mark Brown913d7b42010-03-03 13:47:03 +0000491 ARRAY_SIZE(audio_paths_capless));
492 } else {
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200493 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
Mark Brown913d7b42010-03-03 13:47:03 +0000494 ARRAY_SIZE(wm8960_dapm_widgets_out3));
495
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200496 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
Mark Brown913d7b42010-03-03 13:47:03 +0000497 ARRAY_SIZE(audio_paths_out3));
498 }
499
500 /* We need to power up the headphone output stage out of
501 * sequence for capless mode. To save scanning the widget
502 * list each time to find the desired power state do so now
503 * and save the result.
504 */
Lars-Peter Clausen00200102014-07-17 22:01:07 +0200505 list_for_each_entry(w, &codec->component.card->widgets, list) {
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200506 if (w->dapm != dapm)
Jarkko Nikula97c866d2010-12-14 12:18:31 +0200507 continue;
Mark Brown913d7b42010-03-03 13:47:03 +0000508 if (strcmp(w->name, "LOUT1 PGA") == 0)
509 wm8960->lout1 = w;
510 if (strcmp(w->name, "ROUT1 PGA") == 0)
511 wm8960->rout1 = w;
512 if (strcmp(w->name, "OUT3 VMID") == 0)
513 wm8960->out3 = w;
514 }
515
Mark Brownf2644a22009-04-07 19:20:14 +0100516 return 0;
517}
518
519static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
520 unsigned int fmt)
521{
522 struct snd_soc_codec *codec = codec_dai->codec;
523 u16 iface = 0;
524
525 /* set master/slave audio interface */
526 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
527 case SND_SOC_DAIFMT_CBM_CFM:
528 iface |= 0x0040;
529 break;
530 case SND_SOC_DAIFMT_CBS_CFS:
531 break;
532 default:
533 return -EINVAL;
534 }
535
536 /* interface format */
537 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
538 case SND_SOC_DAIFMT_I2S:
539 iface |= 0x0002;
540 break;
541 case SND_SOC_DAIFMT_RIGHT_J:
542 break;
543 case SND_SOC_DAIFMT_LEFT_J:
544 iface |= 0x0001;
545 break;
546 case SND_SOC_DAIFMT_DSP_A:
547 iface |= 0x0003;
548 break;
549 case SND_SOC_DAIFMT_DSP_B:
550 iface |= 0x0013;
551 break;
552 default:
553 return -EINVAL;
554 }
555
556 /* clock inversion */
557 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
558 case SND_SOC_DAIFMT_NB_NF:
559 break;
560 case SND_SOC_DAIFMT_IB_IF:
561 iface |= 0x0090;
562 break;
563 case SND_SOC_DAIFMT_IB_NF:
564 iface |= 0x0080;
565 break;
566 case SND_SOC_DAIFMT_NB_IF:
567 iface |= 0x0010;
568 break;
569 default:
570 return -EINVAL;
571 }
572
573 /* set iface */
Mark Brown17a52fd2009-07-05 17:24:50 +0100574 snd_soc_write(codec, WM8960_IFACE1, iface);
Mark Brownf2644a22009-04-07 19:20:14 +0100575 return 0;
576}
577
Mark Browndb059c02010-07-05 23:54:51 +0900578static struct {
579 int rate;
580 unsigned int val;
581} alc_rates[] = {
582 { 48000, 0 },
583 { 44100, 0 },
584 { 32000, 1 },
585 { 22050, 2 },
586 { 24000, 2 },
587 { 16000, 3 },
Zidan Wang22ee76d2014-12-31 11:39:14 +0800588 { 11025, 4 },
Mark Browndb059c02010-07-05 23:54:51 +0900589 { 12000, 4 },
590 { 8000, 5 },
591};
592
Zidan Wang3176bf22015-08-11 19:25:15 +0800593/* -1 for reserved value */
594static const int sysclk_divs[] = { 1, -1, 2, -1 };
595
Zidan Wang0e50b512015-05-12 14:58:08 +0800596/* Multiply 256 for internal 256 div */
597static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
598
599/* Multiply 10 to eliminate decimials */
600static const int bclk_divs[] = {
601 10, 15, 20, 30, 40, 55, 60, 80, 110,
602 120, 160, 220, 240, 320, 320, 320
603};
604
Zidan Wang3176bf22015-08-11 19:25:15 +0800605static int wm8960_configure_clocking(struct snd_soc_codec *codec)
Zidan Wang0e50b512015-05-12 14:58:08 +0800606{
607 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wang3176bf22015-08-11 19:25:15 +0800608 int sysclk, bclk, lrclk, freq_out, freq_in;
Zidan Wang0e50b512015-05-12 14:58:08 +0800609 u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
Zidan Wang3176bf22015-08-11 19:25:15 +0800610 int i, j, k;
Zidan Wang0e50b512015-05-12 14:58:08 +0800611
612 if (!(iface1 & (1<<6))) {
613 dev_dbg(codec->dev,
614 "Codec is slave mode, no need to configure clock\n");
Zidan Wang3176bf22015-08-11 19:25:15 +0800615 return 0;
Zidan Wang0e50b512015-05-12 14:58:08 +0800616 }
617
Zidan Wang3176bf22015-08-11 19:25:15 +0800618 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
619 dev_err(codec->dev, "No MCLK configured\n");
620 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800621 }
622
Zidan Wang3176bf22015-08-11 19:25:15 +0800623 freq_in = wm8960->freq_in;
624 bclk = wm8960->bclk;
625 lrclk = wm8960->lrclk;
626 /*
627 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
628 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
629 * directly. Otherwise, auto select a available pll out frequency
630 * and set PLL.
631 */
632 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
633 /* disable the PLL and using MCLK to provide sysclk */
634 wm8960_set_pll(codec, 0, 0);
635 freq_out = freq_in;
636 } else if (wm8960->sysclk) {
637 freq_out = wm8960->sysclk;
638 } else {
639 dev_err(codec->dev, "No SYSCLK configured\n");
640 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800641 }
642
Zidan Wang3176bf22015-08-11 19:25:15 +0800643 /* check if the sysclk frequency is available. */
644 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
645 if (sysclk_divs[i] == -1)
646 continue;
647 sysclk = freq_out / sysclk_divs[i];
648 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
649 if (sysclk == dac_divs[j] * lrclk) {
650 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
651 if (sysclk == bclk * bclk_divs[k] / 10)
652 break;
653 if (k != ARRAY_SIZE(bclk_divs))
Zidan Wang0e50b512015-05-12 14:58:08 +0800654 break;
655 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800656 }
657 if (j != ARRAY_SIZE(dac_divs))
658 break;
659 }
660
661 if (i != ARRAY_SIZE(sysclk_divs)) {
662 goto configure_clock;
663 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
664 dev_err(codec->dev, "failed to configure clock\n");
665 return -EINVAL;
666 }
667 /* get a available pll out frequency and set pll */
668 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
669 if (sysclk_divs[i] == -1)
670 continue;
671 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
672 sysclk = lrclk * dac_divs[j];
673 freq_out = sysclk * sysclk_divs[i];
674
675 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
676 if (sysclk == bclk * bclk_divs[k] / 10 &&
677 is_pll_freq_available(freq_in, freq_out)) {
678 wm8960_set_pll(codec,
679 freq_in, freq_out);
680 break;
681 } else {
682 continue;
683 }
684 }
685 if (k != ARRAY_SIZE(bclk_divs))
Zidan Wang0e50b512015-05-12 14:58:08 +0800686 break;
687 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800688 if (j != ARRAY_SIZE(dac_divs))
689 break;
Zidan Wang0e50b512015-05-12 14:58:08 +0800690 }
691
Zidan Wang3176bf22015-08-11 19:25:15 +0800692 if (i == ARRAY_SIZE(sysclk_divs)) {
693 dev_err(codec->dev, "failed to configure clock\n");
694 return -EINVAL;
Zidan Wang0e50b512015-05-12 14:58:08 +0800695 }
696
Zidan Wang3176bf22015-08-11 19:25:15 +0800697configure_clock:
698 /* configure sysclk clock */
699 snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1);
700
701 /* configure frame clock */
702 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 3, j << 3);
703 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6);
Zidan Wang0e50b512015-05-12 14:58:08 +0800704
705 /* configure bit clock */
Zidan Wang3176bf22015-08-11 19:25:15 +0800706 snd_soc_update_bits(codec, WM8960_CLOCK2, 0xf, k);
707
708 return 0;
Zidan Wang0e50b512015-05-12 14:58:08 +0800709}
710
Mark Brownf2644a22009-04-07 19:20:14 +0100711static int wm8960_hw_params(struct snd_pcm_substream *substream,
712 struct snd_pcm_hw_params *params,
713 struct snd_soc_dai *dai)
714{
Mark Browne6968a12012-04-04 15:58:16 +0100715 struct snd_soc_codec *codec = dai->codec;
Mark Brownafd6d362010-07-05 13:58:16 +0900716 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Mark Brown17a52fd2009-07-05 17:24:50 +0100717 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
Zidan Wang0e50b512015-05-12 14:58:08 +0800718 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
Mark Browndb059c02010-07-05 23:54:51 +0900719 int i;
Mark Brownf2644a22009-04-07 19:20:14 +0100720
Zidan Wang0e50b512015-05-12 14:58:08 +0800721 wm8960->bclk = snd_soc_params_to_bclk(params);
722 if (params_channels(params) == 1)
723 wm8960->bclk *= 2;
724
Mark Brownf2644a22009-04-07 19:20:14 +0100725 /* bit size */
Mark Brown39e9cc42014-07-31 12:53:23 +0100726 switch (params_width(params)) {
727 case 16:
Mark Brownf2644a22009-04-07 19:20:14 +0100728 break;
Mark Brown39e9cc42014-07-31 12:53:23 +0100729 case 20:
Mark Brownf2644a22009-04-07 19:20:14 +0100730 iface |= 0x0004;
731 break;
Mark Brown39e9cc42014-07-31 12:53:23 +0100732 case 24:
Mark Brownf2644a22009-04-07 19:20:14 +0100733 iface |= 0x0008;
734 break;
Zidan Wang7a8c7862015-05-12 14:58:21 +0800735 case 32:
736 /* right justify mode does not support 32 word length */
737 if ((iface & 0x3) != 0) {
738 iface |= 0x000c;
739 break;
740 }
Timur Tabi4c2474c2012-09-14 16:14:37 -0500741 default:
Mark Brown39e9cc42014-07-31 12:53:23 +0100742 dev_err(codec->dev, "unsupported width %d\n",
743 params_width(params));
Timur Tabi4c2474c2012-09-14 16:14:37 -0500744 return -EINVAL;
Mark Brownf2644a22009-04-07 19:20:14 +0100745 }
746
Zidan Wang3176bf22015-08-11 19:25:15 +0800747 wm8960->lrclk = params_rate(params);
Mark Brownafd6d362010-07-05 13:58:16 +0900748 /* Update filters for the new rate */
Zidan Wang3176bf22015-08-11 19:25:15 +0800749 if (tx) {
Mark Brownafd6d362010-07-05 13:58:16 +0900750 wm8960_set_deemph(codec);
Mark Browndb059c02010-07-05 23:54:51 +0900751 } else {
752 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
753 if (alc_rates[i].rate == params_rate(params))
754 snd_soc_update_bits(codec,
755 WM8960_ADDCTL3, 0x7,
756 alc_rates[i].val);
Mark Brownafd6d362010-07-05 13:58:16 +0900757 }
758
Mark Brownf2644a22009-04-07 19:20:14 +0100759 /* set iface */
Mark Brown17a52fd2009-07-05 17:24:50 +0100760 snd_soc_write(codec, WM8960_IFACE1, iface);
Zidan Wang0e50b512015-05-12 14:58:08 +0800761
Zidan Wang3176bf22015-08-11 19:25:15 +0800762 wm8960->is_stream_in_use[tx] = true;
763
764 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON &&
765 !wm8960->is_stream_in_use[!tx])
766 return wm8960_configure_clocking(codec);
767
768 return 0;
769}
770
771static int wm8960_hw_free(struct snd_pcm_substream *substream,
772 struct snd_soc_dai *dai)
773{
774 struct snd_soc_codec *codec = dai->codec;
775 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
776 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
777
778 wm8960->is_stream_in_use[tx] = false;
Zidan Wang0e50b512015-05-12 14:58:08 +0800779
Mark Brownf2644a22009-04-07 19:20:14 +0100780 return 0;
781}
782
783static int wm8960_mute(struct snd_soc_dai *dai, int mute)
784{
785 struct snd_soc_codec *codec = dai->codec;
Mark Brownf2644a22009-04-07 19:20:14 +0100786
787 if (mute)
Axel Lin16b24882011-12-08 11:09:15 +0800788 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
Mark Brownf2644a22009-04-07 19:20:14 +0100789 else
Axel Lin16b24882011-12-08 11:09:15 +0800790 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
Mark Brownf2644a22009-04-07 19:20:14 +0100791 return 0;
792}
793
Mark Brown913d7b42010-03-03 13:47:03 +0000794static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
795 enum snd_soc_bias_level level)
Mark Brownf2644a22009-04-07 19:20:14 +0100796{
Mark Brown0ebe36c2012-09-10 19:23:57 +0800797 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wang3176bf22015-08-11 19:25:15 +0800798 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
Zidan Wang75aa8862015-01-07 15:31:44 +0800799 int ret;
Mark Brown0ebe36c2012-09-10 19:23:57 +0800800
Mark Brownf2644a22009-04-07 19:20:14 +0100801 switch (level) {
802 case SND_SOC_BIAS_ON:
803 break;
804
805 case SND_SOC_BIAS_PREPARE:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200806 switch (snd_soc_codec_get_bias_level(codec)) {
Zidan Wang75aa8862015-01-07 15:31:44 +0800807 case SND_SOC_BIAS_STANDBY:
808 if (!IS_ERR(wm8960->mclk)) {
809 ret = clk_prepare_enable(wm8960->mclk);
810 if (ret) {
811 dev_err(codec->dev,
812 "Failed to enable MCLK: %d\n",
813 ret);
814 return ret;
815 }
816 }
817
Zidan Wang3176bf22015-08-11 19:25:15 +0800818 ret = wm8960_configure_clocking(codec);
819 if (ret)
820 return ret;
821
Zidan Wang75aa8862015-01-07 15:31:44 +0800822 /* Set VMID to 2x50k */
823 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
824 break;
825
826 case SND_SOC_BIAS_ON:
Zidan Wang3176bf22015-08-11 19:25:15 +0800827 /*
828 * If it's sysclk auto mode, and the pll is enabled,
829 * disable the pll
830 */
831 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
832 wm8960_set_pll(codec, 0, 0);
833
Zidan Wang75aa8862015-01-07 15:31:44 +0800834 if (!IS_ERR(wm8960->mclk))
835 clk_disable_unprepare(wm8960->mclk);
836 break;
837
838 default:
839 break;
840 }
841
Mark Brownf2644a22009-04-07 19:20:14 +0100842 break;
843
844 case SND_SOC_BIAS_STANDBY:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200845 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
Mark Brown0ebe36c2012-09-10 19:23:57 +0800846 regcache_sync(wm8960->regmap);
Axel Linbc45df22011-10-07 21:50:23 +0800847
Mark Brownf2644a22009-04-07 19:20:14 +0100848 /* Enable anti-pop features */
Mark Brown17a52fd2009-07-05 17:24:50 +0100849 snd_soc_write(codec, WM8960_APOP1,
Mark Brown913d7b42010-03-03 13:47:03 +0000850 WM8960_POBCTRL | WM8960_SOFT_ST |
851 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
Mark Brownf2644a22009-04-07 19:20:14 +0100852
853 /* Enable & ramp VMID at 2x50k */
Axel Lin16b24882011-12-08 11:09:15 +0800854 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
Mark Brownf2644a22009-04-07 19:20:14 +0100855 msleep(100);
856
857 /* Enable VREF */
Axel Lin16b24882011-12-08 11:09:15 +0800858 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
859 WM8960_VREF);
Mark Brownf2644a22009-04-07 19:20:14 +0100860
861 /* Disable anti-pop features */
Mark Brown17a52fd2009-07-05 17:24:50 +0100862 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
Mark Brownf2644a22009-04-07 19:20:14 +0100863 }
864
865 /* Set VMID to 2x250k */
Axel Lin16b24882011-12-08 11:09:15 +0800866 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
Mark Brownf2644a22009-04-07 19:20:14 +0100867 break;
868
869 case SND_SOC_BIAS_OFF:
870 /* Enable anti-pop features */
Mark Brown17a52fd2009-07-05 17:24:50 +0100871 snd_soc_write(codec, WM8960_APOP1,
Mark Brownf2644a22009-04-07 19:20:14 +0100872 WM8960_POBCTRL | WM8960_SOFT_ST |
873 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
874
875 /* Disable VMID and VREF, let them discharge */
Mark Brown17a52fd2009-07-05 17:24:50 +0100876 snd_soc_write(codec, WM8960_POWER1, 0);
Mark Brownf2644a22009-04-07 19:20:14 +0100877 msleep(600);
Mark Brown913d7b42010-03-03 13:47:03 +0000878 break;
879 }
Mark Brownf2644a22009-04-07 19:20:14 +0100880
Mark Brown913d7b42010-03-03 13:47:03 +0000881 return 0;
882}
883
884static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
885 enum snd_soc_bias_level level)
886{
Mark Brownb2c812e2010-04-14 15:35:19 +0900887 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wang3176bf22015-08-11 19:25:15 +0800888 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
Zidan Wang75aa8862015-01-07 15:31:44 +0800889 int reg, ret;
Mark Brown913d7b42010-03-03 13:47:03 +0000890
891 switch (level) {
892 case SND_SOC_BIAS_ON:
893 break;
894
895 case SND_SOC_BIAS_PREPARE:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200896 switch (snd_soc_codec_get_bias_level(codec)) {
Mark Brown913d7b42010-03-03 13:47:03 +0000897 case SND_SOC_BIAS_STANDBY:
898 /* Enable anti pop mode */
899 snd_soc_update_bits(codec, WM8960_APOP1,
900 WM8960_POBCTRL | WM8960_SOFT_ST |
901 WM8960_BUFDCOPEN,
902 WM8960_POBCTRL | WM8960_SOFT_ST |
903 WM8960_BUFDCOPEN);
904
905 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
906 reg = 0;
907 if (wm8960->lout1 && wm8960->lout1->power)
908 reg |= WM8960_PWR2_LOUT1;
909 if (wm8960->rout1 && wm8960->rout1->power)
910 reg |= WM8960_PWR2_ROUT1;
911 if (wm8960->out3 && wm8960->out3->power)
912 reg |= WM8960_PWR2_OUT3;
913 snd_soc_update_bits(codec, WM8960_POWER2,
914 WM8960_PWR2_LOUT1 |
915 WM8960_PWR2_ROUT1 |
916 WM8960_PWR2_OUT3, reg);
917
918 /* Enable VMID at 2*50k */
919 snd_soc_update_bits(codec, WM8960_POWER1,
920 WM8960_VMID_MASK, 0x80);
921
922 /* Ramp */
923 msleep(100);
924
925 /* Enable VREF */
926 snd_soc_update_bits(codec, WM8960_POWER1,
927 WM8960_VREF, WM8960_VREF);
928
929 msleep(100);
Zidan Wang75aa8862015-01-07 15:31:44 +0800930
931 if (!IS_ERR(wm8960->mclk)) {
932 ret = clk_prepare_enable(wm8960->mclk);
933 if (ret) {
934 dev_err(codec->dev,
935 "Failed to enable MCLK: %d\n",
936 ret);
937 return ret;
938 }
939 }
Zidan Wang3176bf22015-08-11 19:25:15 +0800940
941 ret = wm8960_configure_clocking(codec);
942 if (ret)
943 return ret;
944
Mark Brown913d7b42010-03-03 13:47:03 +0000945 break;
946
947 case SND_SOC_BIAS_ON:
Zidan Wang3176bf22015-08-11 19:25:15 +0800948 /*
949 * If it's sysclk auto mode, and the pll is enabled,
950 * disable the pll
951 */
952 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
953 wm8960_set_pll(codec, 0, 0);
954
Zidan Wang75aa8862015-01-07 15:31:44 +0800955 if (!IS_ERR(wm8960->mclk))
956 clk_disable_unprepare(wm8960->mclk);
957
Mark Brown913d7b42010-03-03 13:47:03 +0000958 /* Enable anti-pop mode */
959 snd_soc_update_bits(codec, WM8960_APOP1,
960 WM8960_POBCTRL | WM8960_SOFT_ST |
961 WM8960_BUFDCOPEN,
962 WM8960_POBCTRL | WM8960_SOFT_ST |
963 WM8960_BUFDCOPEN);
964
965 /* Disable VMID and VREF */
966 snd_soc_update_bits(codec, WM8960_POWER1,
967 WM8960_VREF | WM8960_VMID_MASK, 0);
968 break;
969
Axel Linbc45df22011-10-07 21:50:23 +0800970 case SND_SOC_BIAS_OFF:
Mark Brown0ebe36c2012-09-10 19:23:57 +0800971 regcache_sync(wm8960->regmap);
Axel Linbc45df22011-10-07 21:50:23 +0800972 break;
Mark Brown913d7b42010-03-03 13:47:03 +0000973 default:
974 break;
975 }
976 break;
977
978 case SND_SOC_BIAS_STANDBY:
Lars-Peter Clausen93f32f52015-06-01 10:10:48 +0200979 switch (snd_soc_codec_get_bias_level(codec)) {
Mark Brown913d7b42010-03-03 13:47:03 +0000980 case SND_SOC_BIAS_PREPARE:
981 /* Disable HP discharge */
982 snd_soc_update_bits(codec, WM8960_APOP2,
983 WM8960_DISOP | WM8960_DRES_MASK,
984 0);
985
986 /* Disable anti-pop features */
987 snd_soc_update_bits(codec, WM8960_APOP1,
988 WM8960_POBCTRL | WM8960_SOFT_ST |
989 WM8960_BUFDCOPEN,
990 WM8960_POBCTRL | WM8960_SOFT_ST |
991 WM8960_BUFDCOPEN);
992 break;
993
994 default:
995 break;
996 }
997 break;
998
999 case SND_SOC_BIAS_OFF:
Mark Brownf2644a22009-04-07 19:20:14 +01001000 break;
1001 }
1002
Mark Brownf2644a22009-04-07 19:20:14 +01001003 return 0;
1004}
1005
1006/* PLL divisors */
1007struct _pll_div {
1008 u32 pre_div:1;
1009 u32 n:4;
1010 u32 k:24;
1011};
1012
Zidan Wang3176bf22015-08-11 19:25:15 +08001013static bool is_pll_freq_available(unsigned int source, unsigned int target)
1014{
1015 unsigned int Ndiv;
1016
1017 if (source == 0 || target == 0)
1018 return false;
1019
1020 /* Scale up target to PLL operating frequency */
1021 target *= 4;
1022 Ndiv = target / source;
1023
1024 if (Ndiv < 6) {
1025 source >>= 1;
1026 Ndiv = target / source;
1027 }
1028
1029 if ((Ndiv < 6) || (Ndiv > 12))
1030 return false;
1031
1032 return true;
1033}
1034
Mark Brownf2644a22009-04-07 19:20:14 +01001035/* The size in bits of the pll divide multiplied by 10
1036 * to allow rounding later */
1037#define FIXED_PLL_SIZE ((1 << 24) * 10)
1038
1039static int pll_factors(unsigned int source, unsigned int target,
1040 struct _pll_div *pll_div)
1041{
1042 unsigned long long Kpart;
1043 unsigned int K, Ndiv, Nmod;
1044
1045 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1046
1047 /* Scale up target to PLL operating frequency */
1048 target *= 4;
1049
1050 Ndiv = target / source;
1051 if (Ndiv < 6) {
1052 source >>= 1;
1053 pll_div->pre_div = 1;
1054 Ndiv = target / source;
1055 } else
1056 pll_div->pre_div = 0;
1057
1058 if ((Ndiv < 6) || (Ndiv > 12)) {
1059 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1060 return -EINVAL;
1061 }
1062
1063 pll_div->n = Ndiv;
1064 Nmod = target % source;
1065 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1066
1067 do_div(Kpart, source);
1068
1069 K = Kpart & 0xFFFFFFFF;
1070
1071 /* Check if we need to round */
1072 if ((K % 10) >= 5)
1073 K += 5;
1074
1075 /* Move down to proper range now rounding is done */
1076 K /= 10;
1077
1078 pll_div->k = K;
1079
1080 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1081 pll_div->n, pll_div->k, pll_div->pre_div);
1082
1083 return 0;
1084}
1085
Zidan Wang3176bf22015-08-11 19:25:15 +08001086static int wm8960_set_pll(struct snd_soc_codec *codec,
1087 unsigned int freq_in, unsigned int freq_out)
Mark Brownf2644a22009-04-07 19:20:14 +01001088{
Mark Brownf2644a22009-04-07 19:20:14 +01001089 u16 reg;
1090 static struct _pll_div pll_div;
1091 int ret;
1092
1093 if (freq_in && freq_out) {
1094 ret = pll_factors(freq_in, freq_out, &pll_div);
1095 if (ret != 0)
1096 return ret;
1097 }
1098
1099 /* Disable the PLL: even if we are changing the frequency the
1100 * PLL needs to be disabled while we do so. */
Axel Lin16b24882011-12-08 11:09:15 +08001101 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
1102 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
Mark Brownf2644a22009-04-07 19:20:14 +01001103
1104 if (!freq_in || !freq_out)
1105 return 0;
1106
Mark Brown17a52fd2009-07-05 17:24:50 +01001107 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
Mark Brownf2644a22009-04-07 19:20:14 +01001108 reg |= pll_div.pre_div << 4;
1109 reg |= pll_div.n;
1110
1111 if (pll_div.k) {
1112 reg |= 0x20;
1113
Mike Dyer85fa5322013-08-16 18:36:28 +01001114 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1115 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1116 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
Mark Brownf2644a22009-04-07 19:20:14 +01001117 }
Mark Brown17a52fd2009-07-05 17:24:50 +01001118 snd_soc_write(codec, WM8960_PLL1, reg);
Mark Brownf2644a22009-04-07 19:20:14 +01001119
1120 /* Turn it on */
Axel Lin16b24882011-12-08 11:09:15 +08001121 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
Mark Brownf2644a22009-04-07 19:20:14 +01001122 msleep(250);
Axel Lin16b24882011-12-08 11:09:15 +08001123 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
Mark Brownf2644a22009-04-07 19:20:14 +01001124
1125 return 0;
1126}
1127
Zidan Wang3176bf22015-08-11 19:25:15 +08001128static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1129 int source, unsigned int freq_in, unsigned int freq_out)
1130{
1131 struct snd_soc_codec *codec = codec_dai->codec;
1132 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1133
1134 wm8960->freq_in = freq_in;
1135
1136 if (pll_id == WM8960_SYSCLK_AUTO)
1137 return 0;
1138
1139 return wm8960_set_pll(codec, freq_in, freq_out);
1140}
1141
Mark Brownf2644a22009-04-07 19:20:14 +01001142static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1143 int div_id, int div)
1144{
1145 struct snd_soc_codec *codec = codec_dai->codec;
1146 u16 reg;
1147
1148 switch (div_id) {
Mark Brownf2644a22009-04-07 19:20:14 +01001149 case WM8960_SYSCLKDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001150 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
1151 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001152 break;
1153 case WM8960_DACDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001154 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
1155 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001156 break;
1157 case WM8960_OPCLKDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001158 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
1159 snd_soc_write(codec, WM8960_PLL1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001160 break;
1161 case WM8960_DCLKDIV:
Mark Brown17a52fd2009-07-05 17:24:50 +01001162 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
1163 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001164 break;
1165 case WM8960_TOCLKSEL:
Mark Brown17a52fd2009-07-05 17:24:50 +01001166 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
1167 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
Mark Brownf2644a22009-04-07 19:20:14 +01001168 break;
1169 default:
1170 return -EINVAL;
1171 }
1172
1173 return 0;
1174}
1175
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001176static int wm8960_set_bias_level(struct snd_soc_codec *codec,
1177 enum snd_soc_bias_level level)
1178{
1179 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1180
1181 return wm8960->set_bias_level(codec, level);
1182}
1183
Zidan Wang0e50b512015-05-12 14:58:08 +08001184static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1185 unsigned int freq, int dir)
1186{
1187 struct snd_soc_codec *codec = dai->codec;
1188 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1189
1190 switch (clk_id) {
1191 case WM8960_SYSCLK_MCLK:
1192 snd_soc_update_bits(codec, WM8960_CLOCK1,
1193 0x1, WM8960_SYSCLK_MCLK);
1194 break;
1195 case WM8960_SYSCLK_PLL:
1196 snd_soc_update_bits(codec, WM8960_CLOCK1,
1197 0x1, WM8960_SYSCLK_PLL);
1198 break;
Zidan Wang3176bf22015-08-11 19:25:15 +08001199 case WM8960_SYSCLK_AUTO:
1200 break;
Zidan Wang0e50b512015-05-12 14:58:08 +08001201 default:
1202 return -EINVAL;
1203 }
1204
1205 wm8960->sysclk = freq;
Zidan Wang3176bf22015-08-11 19:25:15 +08001206 wm8960->clk_id = clk_id;
Zidan Wang0e50b512015-05-12 14:58:08 +08001207
1208 return 0;
1209}
1210
Mark Brownf2644a22009-04-07 19:20:14 +01001211#define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1212
1213#define WM8960_FORMATS \
1214 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
Zidan Wang7a8c7862015-05-12 14:58:21 +08001215 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
Mark Brownf2644a22009-04-07 19:20:14 +01001216
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01001217static const struct snd_soc_dai_ops wm8960_dai_ops = {
Mark Brownf2644a22009-04-07 19:20:14 +01001218 .hw_params = wm8960_hw_params,
Zidan Wang3176bf22015-08-11 19:25:15 +08001219 .hw_free = wm8960_hw_free,
Mark Brownf2644a22009-04-07 19:20:14 +01001220 .digital_mute = wm8960_mute,
1221 .set_fmt = wm8960_set_dai_fmt,
1222 .set_clkdiv = wm8960_set_dai_clkdiv,
1223 .set_pll = wm8960_set_dai_pll,
Zidan Wang0e50b512015-05-12 14:58:08 +08001224 .set_sysclk = wm8960_set_dai_sysclk,
Mark Brownf2644a22009-04-07 19:20:14 +01001225};
1226
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001227static struct snd_soc_dai_driver wm8960_dai = {
1228 .name = "wm8960-hifi",
Mark Brownf2644a22009-04-07 19:20:14 +01001229 .playback = {
1230 .stream_name = "Playback",
1231 .channels_min = 1,
1232 .channels_max = 2,
1233 .rates = WM8960_RATES,
1234 .formats = WM8960_FORMATS,},
1235 .capture = {
1236 .stream_name = "Capture",
1237 .channels_min = 1,
1238 .channels_max = 2,
1239 .rates = WM8960_RATES,
1240 .formats = WM8960_FORMATS,},
1241 .ops = &wm8960_dai_ops,
1242 .symmetric_rates = 1,
1243};
Mark Brownf2644a22009-04-07 19:20:14 +01001244
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001245static int wm8960_probe(struct snd_soc_codec *codec)
Mark Brownf2644a22009-04-07 19:20:14 +01001246{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001247 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
Zidan Wange2280c902014-11-20 19:07:48 +08001248 struct wm8960_data *pdata = &wm8960->pdata;
Mark Brownf2644a22009-04-07 19:20:14 +01001249
Zidan Wange2280c902014-11-20 19:07:48 +08001250 if (pdata->capless)
1251 wm8960->set_bias_level = wm8960_set_bias_level_capless;
1252 else
1253 wm8960->set_bias_level = wm8960_set_bias_level_out3;
Mark Brownf2644a22009-04-07 19:20:14 +01001254
Liam Girdwood022658b2012-02-03 17:43:09 +00001255 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001256 ARRAY_SIZE(wm8960_snd_controls));
1257 wm8960_add_widgets(codec);
Mark Brownf2644a22009-04-07 19:20:14 +01001258
1259 return 0;
1260}
1261
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001262static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
1263 .probe = wm8960_probe,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001264 .set_bias_level = wm8960_set_bias_level,
Lars-Peter Clausen0a87a6e2014-11-23 13:37:33 +01001265 .suspend_bias_off = true,
Mark Brown0ebe36c2012-09-10 19:23:57 +08001266};
1267
1268static const struct regmap_config wm8960_regmap = {
1269 .reg_bits = 7,
1270 .val_bits = 9,
1271 .max_register = WM8960_PLL4,
1272
1273 .reg_defaults = wm8960_reg_defaults,
1274 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1275 .cache_type = REGCACHE_RBTREE,
1276
1277 .volatile_reg = wm8960_volatile,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001278};
1279
Zidan Wange2280c902014-11-20 19:07:48 +08001280static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1281 struct wm8960_data *pdata)
1282{
1283 const struct device_node *np = i2c->dev.of_node;
1284
1285 if (of_property_read_bool(np, "wlf,capless"))
1286 pdata->capless = true;
1287
1288 if (of_property_read_bool(np, "wlf,shared-lrclk"))
1289 pdata->shared_lrclk = true;
1290}
1291
Bill Pemberton7a79e942012-12-07 09:26:37 -05001292static int wm8960_i2c_probe(struct i2c_client *i2c,
1293 const struct i2c_device_id *id)
Mark Brownf2644a22009-04-07 19:20:14 +01001294{
Mark Brown37061632012-09-13 11:46:58 +08001295 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
Mark Brownf2644a22009-04-07 19:20:14 +01001296 struct wm8960_priv *wm8960;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001297 int ret;
Mark Brownf2644a22009-04-07 19:20:14 +01001298
Mark Brownb9791c02011-12-16 07:42:58 +01001299 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1300 GFP_KERNEL);
Mark Brownf2644a22009-04-07 19:20:14 +01001301 if (wm8960 == NULL)
1302 return -ENOMEM;
1303
Zidan Wang75aa8862015-01-07 15:31:44 +08001304 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1305 if (IS_ERR(wm8960->mclk)) {
1306 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1307 return -EPROBE_DEFER;
1308 }
1309
Sachin Kamatc5e6f5f2012-11-26 17:19:43 +05301310 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
Mark Brown0ebe36c2012-09-10 19:23:57 +08001311 if (IS_ERR(wm8960->regmap))
1312 return PTR_ERR(wm8960->regmap);
1313
Zidan Wange2280c902014-11-20 19:07:48 +08001314 if (pdata)
1315 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1316 else if (i2c->dev.of_node)
1317 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1318
Zidan Wang3ad5e862014-11-27 16:53:08 +08001319 ret = wm8960_reset(wm8960->regmap);
1320 if (ret != 0) {
1321 dev_err(&i2c->dev, "Failed to issue reset\n");
1322 return ret;
1323 }
1324
1325 if (wm8960->pdata.shared_lrclk) {
Mark Brown37061632012-09-13 11:46:58 +08001326 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1327 0x4, 0x4);
1328 if (ret != 0) {
1329 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1330 ret);
1331 return ret;
1332 }
1333 }
1334
Zidan Wang3ad5e862014-11-27 16:53:08 +08001335 /* Latch the update bits */
1336 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1337 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1338 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1339 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1340 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1341 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1342 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1343 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1344 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1345 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1346
Mark Brownf2644a22009-04-07 19:20:14 +01001347 i2c_set_clientdata(i2c, wm8960);
Mark Brownf2644a22009-04-07 19:20:14 +01001348
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001349 ret = snd_soc_register_codec(&i2c->dev,
1350 &soc_codec_dev_wm8960, &wm8960_dai, 1);
Mark Brownb9791c02011-12-16 07:42:58 +01001351
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001352 return ret;
Mark Brownf2644a22009-04-07 19:20:14 +01001353}
1354
Bill Pemberton7a79e942012-12-07 09:26:37 -05001355static int wm8960_i2c_remove(struct i2c_client *client)
Mark Brownf2644a22009-04-07 19:20:14 +01001356{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00001357 snd_soc_unregister_codec(&client->dev);
Mark Brownf2644a22009-04-07 19:20:14 +01001358 return 0;
1359}
1360
1361static const struct i2c_device_id wm8960_i2c_id[] = {
1362 { "wm8960", 0 },
1363 { }
1364};
1365MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1366
Zidan Wange2280c902014-11-20 19:07:48 +08001367static const struct of_device_id wm8960_of_match[] = {
1368 { .compatible = "wlf,wm8960", },
1369 { }
1370};
1371MODULE_DEVICE_TABLE(of, wm8960_of_match);
1372
Mark Brownf2644a22009-04-07 19:20:14 +01001373static struct i2c_driver wm8960_i2c_driver = {
1374 .driver = {
Mark Brown091edcc2011-12-02 22:08:49 +00001375 .name = "wm8960",
Zidan Wange2280c902014-11-20 19:07:48 +08001376 .of_match_table = wm8960_of_match,
Mark Brownf2644a22009-04-07 19:20:14 +01001377 },
1378 .probe = wm8960_i2c_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -05001379 .remove = wm8960_i2c_remove,
Mark Brownf2644a22009-04-07 19:20:14 +01001380 .id_table = wm8960_i2c_id,
1381};
1382
Sachin Kamat3c010e62012-08-06 17:25:36 +05301383module_i2c_driver(wm8960_i2c_driver);
Mark Brownf2644a22009-04-07 19:20:14 +01001384
Mark Brownf2644a22009-04-07 19:20:14 +01001385MODULE_DESCRIPTION("ASoC WM8960 driver");
1386MODULE_AUTHOR("Liam Girdwood");
1387MODULE_LICENSE("GPL");