Girish K S | e88d5ae | 2013-02-04 16:15:56 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Samsung's Exynos5250 based Arndale board device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 10 | */ |
Girish K S | e88d5ae | 2013-02-04 16:15:56 -0800 | [diff] [blame] | 11 | |
| 12 | /dts-v1/; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 13 | #include <dt-bindings/gpio/gpio.h> |
Mark Brown | d40f314 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 14 | #include <dt-bindings/interrupt-controller/irq.h> |
Sachin Kamat | 2d7a5bd | 2014-05-28 00:56:16 +0900 | [diff] [blame] | 15 | #include <dt-bindings/input/input.h> |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 16 | #include "exynos5250.dtsi" |
Girish K S | e88d5ae | 2013-02-04 16:15:56 -0800 | [diff] [blame] | 17 | |
| 18 | / { |
| 19 | model = "Insignal Arndale evaluation board based on EXYNOS5250"; |
Sachin Kamat | 8bdb31b | 2014-03-21 02:17:22 +0900 | [diff] [blame] | 20 | compatible = "insignal,arndale", "samsung,exynos5250", "samsung,exynos5"; |
Girish K S | e88d5ae | 2013-02-04 16:15:56 -0800 | [diff] [blame] | 21 | |
Javier Martinez Canillas | a0eb109 | 2016-09-01 11:06:56 +0200 | [diff] [blame] | 22 | memory@40000000 { |
Javier Martinez Canillas | 12676ee | 2016-09-01 11:06:53 +0200 | [diff] [blame] | 23 | device_type = "memory"; |
Girish K S | e88d5ae | 2013-02-04 16:15:56 -0800 | [diff] [blame] | 24 | reg = <0x40000000 0x80000000>; |
| 25 | }; |
| 26 | |
| 27 | chosen { |
| 28 | bootargs = "console=ttySAC2,115200"; |
| 29 | }; |
| 30 | |
Tushar Behera | 89fec22 | 2013-04-04 14:24:47 +0900 | [diff] [blame] | 31 | gpio_keys { |
| 32 | compatible = "gpio-keys"; |
| 33 | |
| 34 | menu { |
| 35 | label = "SW-TACT2"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 36 | gpios = <&gpx1 4 GPIO_ACTIVE_LOW>; |
Sachin Kamat | 2d7a5bd | 2014-05-28 00:56:16 +0900 | [diff] [blame] | 37 | linux,code = <KEY_MENU>; |
Sudeep Holla | 36a0282 | 2016-01-28 15:59:58 +0000 | [diff] [blame] | 38 | wakeup-source; |
Tushar Behera | 89fec22 | 2013-04-04 14:24:47 +0900 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | home { |
| 42 | label = "SW-TACT3"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 43 | gpios = <&gpx1 5 GPIO_ACTIVE_LOW>; |
Sachin Kamat | 2d7a5bd | 2014-05-28 00:56:16 +0900 | [diff] [blame] | 44 | linux,code = <KEY_HOME>; |
Sudeep Holla | 36a0282 | 2016-01-28 15:59:58 +0000 | [diff] [blame] | 45 | wakeup-source; |
Tushar Behera | 89fec22 | 2013-04-04 14:24:47 +0900 | [diff] [blame] | 46 | }; |
| 47 | |
| 48 | up { |
| 49 | label = "SW-TACT4"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 50 | gpios = <&gpx1 6 GPIO_ACTIVE_LOW>; |
Sachin Kamat | 2d7a5bd | 2014-05-28 00:56:16 +0900 | [diff] [blame] | 51 | linux,code = <KEY_UP>; |
Sudeep Holla | 36a0282 | 2016-01-28 15:59:58 +0000 | [diff] [blame] | 52 | wakeup-source; |
Tushar Behera | 89fec22 | 2013-04-04 14:24:47 +0900 | [diff] [blame] | 53 | }; |
| 54 | |
| 55 | down { |
| 56 | label = "SW-TACT5"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 57 | gpios = <&gpx1 7 GPIO_ACTIVE_LOW>; |
Sachin Kamat | 2d7a5bd | 2014-05-28 00:56:16 +0900 | [diff] [blame] | 58 | linux,code = <KEY_DOWN>; |
Sudeep Holla | 36a0282 | 2016-01-28 15:59:58 +0000 | [diff] [blame] | 59 | wakeup-source; |
Tushar Behera | 89fec22 | 2013-04-04 14:24:47 +0900 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | back { |
| 63 | label = "SW-TACT6"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 64 | gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; |
Sachin Kamat | 2d7a5bd | 2014-05-28 00:56:16 +0900 | [diff] [blame] | 65 | linux,code = <KEY_BACK>; |
Sudeep Holla | 36a0282 | 2016-01-28 15:59:58 +0000 | [diff] [blame] | 66 | wakeup-source; |
Tushar Behera | 89fec22 | 2013-04-04 14:24:47 +0900 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | wakeup { |
| 70 | label = "SW-TACT7"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 71 | gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; |
Sachin Kamat | 2d7a5bd | 2014-05-28 00:56:16 +0900 | [diff] [blame] | 72 | linux,code = <KEY_WAKEUP>; |
Sudeep Holla | 36a0282 | 2016-01-28 15:59:58 +0000 | [diff] [blame] | 73 | wakeup-source; |
Tushar Behera | 89fec22 | 2013-04-04 14:24:47 +0900 | [diff] [blame] | 74 | }; |
| 75 | }; |
| 76 | |
Mark Brown | aa3edb6 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 77 | regulators { |
| 78 | compatible = "simple-bus"; |
| 79 | #address-cells = <1>; |
| 80 | #size-cells = <0>; |
Sachin Kamat | 2988103 | 2013-04-04 14:24:55 +0900 | [diff] [blame] | 81 | |
Sachin Kamat | 8365f76 | 2013-10-06 09:21:10 +0900 | [diff] [blame] | 82 | main_dc_reg: regulator@0 { |
Mark Brown | c1f2d53 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 83 | compatible = "regulator-fixed"; |
Sachin Kamat | 8365f76 | 2013-10-06 09:21:10 +0900 | [diff] [blame] | 84 | reg = <0>; |
Mark Brown | c1f2d53 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 85 | regulator-name = "MAIN_DC"; |
| 86 | }; |
| 87 | |
Sachin Kamat | 8365f76 | 2013-10-06 09:21:10 +0900 | [diff] [blame] | 88 | mmc_reg: regulator@1 { |
Mark Brown | aa3edb6 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 89 | compatible = "regulator-fixed"; |
Sachin Kamat | 8365f76 | 2013-10-06 09:21:10 +0900 | [diff] [blame] | 90 | reg = <1>; |
Mark Brown | aa3edb6 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 91 | regulator-name = "VDD_33ON_2.8V"; |
| 92 | regulator-min-microvolt = <2800000>; |
| 93 | regulator-max-microvolt = <2800000>; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 94 | gpio = <&gpx1 1 GPIO_ACTIVE_LOW>; |
Mark Brown | aa3edb6 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 95 | enable-active-high; |
| 96 | }; |
| 97 | |
Sachin Kamat | 8365f76 | 2013-10-06 09:21:10 +0900 | [diff] [blame] | 98 | reg_hdmi_en: regulator@2 { |
Mark Brown | aa3edb6 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 99 | compatible = "regulator-fixed"; |
Sachin Kamat | 8365f76 | 2013-10-06 09:21:10 +0900 | [diff] [blame] | 100 | reg = <2>; |
Mark Brown | aa3edb6 | 2013-07-24 10:55:16 +0900 | [diff] [blame] | 101 | regulator-name = "hdmi-en"; |
| 102 | }; |
Sachin Kamat | 2d2ff61d | 2013-04-04 14:25:06 +0900 | [diff] [blame] | 103 | }; |
| 104 | |
Thomas Abraham | 8b6076d | 2013-03-09 17:19:22 +0900 | [diff] [blame] | 105 | fixed-rate-clocks { |
| 106 | xxti { |
| 107 | compatible = "samsung,clock-xxti"; |
| 108 | clock-frequency = <24000000>; |
| 109 | }; |
| 110 | }; |
Vikas Sajjan | a3093e6 | 2013-06-10 17:04:36 +0900 | [diff] [blame] | 111 | |
Andreas Faerber | ceb5b5d | 2014-09-24 00:01:50 +0900 | [diff] [blame] | 112 | // SMSC USB3503 connected in hardware only mode as a PHY |
| 113 | usb_hub: usb-hub { |
| 114 | compatible = "smsc,usb3503a"; |
Mark Brown | 7c1b0ec | 2013-08-19 04:33:22 +0900 | [diff] [blame] | 115 | |
Andreas Faerber | ceb5b5d | 2014-09-24 00:01:50 +0900 | [diff] [blame] | 116 | reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; |
| 117 | connect-gpios = <&gpd1 7 GPIO_ACTIVE_LOW>; |
Mark Brown | 7c1b0ec | 2013-08-19 04:33:22 +0900 | [diff] [blame] | 118 | }; |
Girish K S | e88d5ae | 2013-02-04 16:15:56 -0800 | [diff] [blame] | 119 | }; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 120 | |
Thomas Abraham | 846c530 | 2015-07-01 15:10:36 +0200 | [diff] [blame] | 121 | &cpu0 { |
| 122 | cpu0-supply = <&buck2_reg>; |
| 123 | }; |
| 124 | |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 125 | &dp { |
| 126 | status = "okay"; |
| 127 | samsung,color-space = <0>; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 128 | samsung,color-depth = <1>; |
| 129 | samsung,link-rate = <0x0a>; |
| 130 | samsung,lane-count = <4>; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 131 | |
| 132 | display-timings { |
| 133 | native-mode = <&timing0>; |
| 134 | |
Krzysztof Kozlowski | 5c9cbad | 2016-04-06 11:00:45 +0900 | [diff] [blame] | 135 | timing0: timing { |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 136 | /* 2560x1600 DP panel */ |
| 137 | clock-frequency = <50000>; |
| 138 | hactive = <2560>; |
| 139 | vactive = <1600>; |
| 140 | hfront-porch = <48>; |
| 141 | hback-porch = <80>; |
| 142 | hsync-len = <32>; |
| 143 | vback-porch = <16>; |
| 144 | vfront-porch = <8>; |
| 145 | vsync-len = <6>; |
| 146 | }; |
| 147 | }; |
| 148 | }; |
| 149 | |
Sean Paul | c518506 | 2015-09-17 14:48:39 +0200 | [diff] [blame] | 150 | &fimd { |
| 151 | status = "okay"; |
| 152 | }; |
| 153 | |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 154 | &hdmi { |
Milo Kim | 05b01dd | 2016-08-24 22:07:16 +0900 | [diff] [blame] | 155 | hpd-gpios = <&gpx3 7 GPIO_ACTIVE_LOW>; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 156 | vdd_osc-supply = <&ldo10_reg>; |
| 157 | vdd_pll-supply = <&ldo8_reg>; |
| 158 | vdd-supply = <&ldo8_reg>; |
| 159 | }; |
| 160 | |
| 161 | &i2c_0 { |
| 162 | status = "okay"; |
| 163 | samsung,i2c-sda-delay = <100>; |
| 164 | samsung,i2c-max-bus-freq = <20000>; |
| 165 | samsung,i2c-slave-addr = <0x66>; |
| 166 | |
| 167 | s5m8767_pmic@66 { |
| 168 | compatible = "samsung,s5m8767-pmic"; |
| 169 | reg = <0x66>; |
| 170 | interrupt-parent = <&gpx3>; |
| 171 | interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
| 172 | |
| 173 | vinb1-supply = <&main_dc_reg>; |
| 174 | vinb2-supply = <&main_dc_reg>; |
| 175 | vinb3-supply = <&main_dc_reg>; |
| 176 | vinb4-supply = <&main_dc_reg>; |
| 177 | vinb5-supply = <&main_dc_reg>; |
| 178 | vinb6-supply = <&main_dc_reg>; |
| 179 | vinb7-supply = <&main_dc_reg>; |
| 180 | vinb8-supply = <&main_dc_reg>; |
| 181 | vinb9-supply = <&main_dc_reg>; |
| 182 | |
| 183 | vinl1-supply = <&buck7_reg>; |
| 184 | vinl2-supply = <&buck7_reg>; |
| 185 | vinl3-supply = <&buck7_reg>; |
| 186 | vinl4-supply = <&main_dc_reg>; |
| 187 | vinl5-supply = <&main_dc_reg>; |
| 188 | vinl6-supply = <&main_dc_reg>; |
| 189 | vinl7-supply = <&main_dc_reg>; |
| 190 | vinl8-supply = <&buck8_reg>; |
| 191 | vinl9-supply = <&buck8_reg>; |
| 192 | |
| 193 | s5m8767,pmic-buck2-dvs-voltage = <1300000>; |
| 194 | s5m8767,pmic-buck3-dvs-voltage = <1100000>; |
| 195 | s5m8767,pmic-buck4-dvs-voltage = <1200000>; |
| 196 | s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_HIGH>, |
| 197 | <&gpd1 1 GPIO_ACTIVE_HIGH>, |
| 198 | <&gpd1 2 GPIO_ACTIVE_HIGH>; |
| 199 | s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>, |
| 200 | <&gpx2 4 GPIO_ACTIVE_HIGH>, |
| 201 | <&gpx2 5 GPIO_ACTIVE_HIGH>; |
| 202 | |
| 203 | regulators { |
| 204 | ldo1_reg: LDO1 { |
| 205 | regulator-name = "VDD_ALIVE_1.0V"; |
| 206 | regulator-min-microvolt = <1100000>; |
| 207 | regulator-max-microvolt = <1100000>; |
| 208 | regulator-always-on; |
| 209 | regulator-boot-on; |
| 210 | op_mode = <1>; |
| 211 | }; |
| 212 | |
| 213 | ldo2_reg: LDO2 { |
| 214 | regulator-name = "VDD_28IO_DP_1.35V"; |
| 215 | regulator-min-microvolt = <1200000>; |
| 216 | regulator-max-microvolt = <1200000>; |
| 217 | regulator-always-on; |
| 218 | regulator-boot-on; |
| 219 | op_mode = <1>; |
| 220 | }; |
| 221 | |
| 222 | ldo3_reg: LDO3 { |
| 223 | regulator-name = "VDD_COMMON1_1.8V"; |
| 224 | regulator-min-microvolt = <1800000>; |
| 225 | regulator-max-microvolt = <1800000>; |
| 226 | regulator-always-on; |
| 227 | regulator-boot-on; |
| 228 | op_mode = <1>; |
| 229 | }; |
| 230 | |
| 231 | ldo4_reg: LDO4 { |
| 232 | regulator-name = "VDD_IOPERI_1.8V"; |
| 233 | regulator-min-microvolt = <1800000>; |
| 234 | regulator-max-microvolt = <1800000>; |
| 235 | regulator-always-on; |
| 236 | op_mode = <1>; |
| 237 | }; |
| 238 | |
| 239 | ldo5_reg: LDO5 { |
| 240 | regulator-name = "VDD_EXT_1.8V"; |
| 241 | regulator-min-microvolt = <1800000>; |
| 242 | regulator-max-microvolt = <1800000>; |
| 243 | regulator-always-on; |
| 244 | regulator-boot-on; |
| 245 | op_mode = <1>; |
| 246 | }; |
| 247 | |
| 248 | ldo6_reg: LDO6 { |
| 249 | regulator-name = "VDD_MPLL_1.1V"; |
| 250 | regulator-min-microvolt = <1100000>; |
| 251 | regulator-max-microvolt = <1100000>; |
| 252 | regulator-always-on; |
| 253 | regulator-boot-on; |
| 254 | op_mode = <1>; |
| 255 | }; |
| 256 | |
| 257 | ldo7_reg: LDO7 { |
| 258 | regulator-name = "VDD_XPLL_1.1V"; |
| 259 | regulator-min-microvolt = <1100000>; |
| 260 | regulator-max-microvolt = <1100000>; |
| 261 | regulator-always-on; |
| 262 | regulator-boot-on; |
| 263 | op_mode = <1>; |
| 264 | }; |
| 265 | |
| 266 | ldo8_reg: LDO8 { |
| 267 | regulator-name = "VDD_COMMON2_1.0V"; |
| 268 | regulator-min-microvolt = <1000000>; |
| 269 | regulator-max-microvolt = <1000000>; |
| 270 | regulator-always-on; |
| 271 | regulator-boot-on; |
| 272 | op_mode = <1>; |
| 273 | }; |
| 274 | |
| 275 | ldo9_reg: LDO9 { |
| 276 | regulator-name = "VDD_33ON_3.0V"; |
| 277 | regulator-min-microvolt = <3000000>; |
| 278 | regulator-max-microvolt = <3000000>; |
| 279 | op_mode = <1>; |
| 280 | }; |
| 281 | |
| 282 | ldo10_reg: LDO10 { |
| 283 | regulator-name = "VDD_COMMON3_1.8V"; |
| 284 | regulator-min-microvolt = <1800000>; |
| 285 | regulator-max-microvolt = <1800000>; |
| 286 | regulator-always-on; |
| 287 | regulator-boot-on; |
| 288 | op_mode = <1>; |
| 289 | }; |
| 290 | |
| 291 | ldo11_reg: LDO11 { |
| 292 | regulator-name = "VDD_ABB2_1.8V"; |
| 293 | regulator-min-microvolt = <1800000>; |
| 294 | regulator-max-microvolt = <1800000>; |
| 295 | regulator-always-on; |
| 296 | regulator-boot-on; |
| 297 | op_mode = <1>; |
| 298 | }; |
| 299 | |
| 300 | ldo12_reg: LDO12 { |
| 301 | regulator-name = "VDD_USB_3.0V"; |
| 302 | regulator-min-microvolt = <3000000>; |
| 303 | regulator-max-microvolt = <3000000>; |
| 304 | regulator-always-on; |
| 305 | regulator-boot-on; |
| 306 | op_mode = <1>; |
| 307 | }; |
| 308 | |
| 309 | ldo13_reg: LDO13 { |
| 310 | regulator-name = "VDDQ_C2C_W_1.8V"; |
| 311 | regulator-min-microvolt = <1800000>; |
| 312 | regulator-max-microvolt = <1800000>; |
| 313 | regulator-always-on; |
| 314 | regulator-boot-on; |
| 315 | op_mode = <1>; |
| 316 | }; |
| 317 | |
| 318 | ldo14_reg: LDO14 { |
| 319 | regulator-name = "VDD18_ABB0_3_1.8V"; |
| 320 | regulator-min-microvolt = <1800000>; |
| 321 | regulator-max-microvolt = <1800000>; |
| 322 | regulator-always-on; |
| 323 | regulator-boot-on; |
| 324 | op_mode = <1>; |
| 325 | }; |
| 326 | |
| 327 | ldo15_reg: LDO15 { |
| 328 | regulator-name = "VDD10_COMMON4_1.0V"; |
| 329 | regulator-min-microvolt = <1000000>; |
| 330 | regulator-max-microvolt = <1000000>; |
| 331 | regulator-always-on; |
| 332 | regulator-boot-on; |
| 333 | op_mode = <1>; |
| 334 | }; |
| 335 | |
| 336 | ldo16_reg: LDO16 { |
| 337 | regulator-name = "VDD18_HSIC_1.8V"; |
| 338 | regulator-min-microvolt = <1800000>; |
| 339 | regulator-max-microvolt = <1800000>; |
| 340 | regulator-always-on; |
| 341 | regulator-boot-on; |
| 342 | op_mode = <1>; |
| 343 | }; |
| 344 | |
| 345 | ldo17_reg: LDO17 { |
| 346 | regulator-name = "VDDQ_MMC2_3_2.8V"; |
| 347 | regulator-min-microvolt = <2800000>; |
| 348 | regulator-max-microvolt = <2800000>; |
| 349 | regulator-always-on; |
| 350 | regulator-boot-on; |
| 351 | op_mode = <1>; |
| 352 | }; |
| 353 | |
| 354 | ldo18_reg: LDO18 { |
| 355 | regulator-name = "VDD_33ON_2.8V"; |
| 356 | regulator-min-microvolt = <2800000>; |
| 357 | regulator-max-microvolt = <2800000>; |
| 358 | op_mode = <1>; |
| 359 | }; |
| 360 | |
| 361 | ldo22_reg: LDO22 { |
| 362 | regulator-name = "EXT_33_OFF"; |
| 363 | regulator-min-microvolt = <3300000>; |
| 364 | regulator-max-microvolt = <3300000>; |
| 365 | op_mode = <1>; |
| 366 | }; |
| 367 | |
| 368 | ldo23_reg: LDO23 { |
| 369 | regulator-name = "EXT_28_OFF"; |
| 370 | regulator-min-microvolt = <2800000>; |
| 371 | regulator-max-microvolt = <2800000>; |
| 372 | op_mode = <1>; |
| 373 | }; |
| 374 | |
| 375 | ldo25_reg: LDO25 { |
| 376 | regulator-name = "PVDD_LDO25"; |
| 377 | regulator-min-microvolt = <1200000>; |
| 378 | regulator-max-microvolt = <1200000>; |
| 379 | op_mode = <1>; |
| 380 | }; |
| 381 | |
| 382 | ldo26_reg: LDO26 { |
| 383 | regulator-name = "EXT_18_OFF"; |
| 384 | regulator-min-microvolt = <1800000>; |
| 385 | regulator-max-microvolt = <1800000>; |
| 386 | op_mode = <1>; |
| 387 | }; |
| 388 | |
| 389 | buck1_reg: BUCK1 { |
| 390 | regulator-name = "vdd_mif"; |
| 391 | regulator-min-microvolt = <950000>; |
| 392 | regulator-max-microvolt = <1200000>; |
| 393 | regulator-always-on; |
| 394 | regulator-boot-on; |
| 395 | op_mode = <1>; |
| 396 | }; |
| 397 | |
| 398 | buck2_reg: BUCK2 { |
| 399 | regulator-name = "vdd_arm"; |
| 400 | regulator-min-microvolt = <912500>; |
| 401 | regulator-max-microvolt = <1300000>; |
| 402 | regulator-always-on; |
| 403 | regulator-boot-on; |
| 404 | op_mode = <1>; |
| 405 | }; |
| 406 | |
| 407 | buck3_reg: BUCK3 { |
| 408 | regulator-name = "vdd_int"; |
| 409 | regulator-min-microvolt = <900000>; |
| 410 | regulator-max-microvolt = <1200000>; |
| 411 | regulator-always-on; |
| 412 | regulator-boot-on; |
| 413 | op_mode = <1>; |
| 414 | }; |
| 415 | |
| 416 | buck4_reg: BUCK4 { |
| 417 | regulator-name = "vdd_g3d"; |
| 418 | regulator-min-microvolt = <1000000>; |
| 419 | regulator-max-microvolt = <1000000>; |
| 420 | regulator-always-on; |
| 421 | regulator-boot-on; |
| 422 | op_mode = <1>; |
| 423 | }; |
| 424 | |
| 425 | buck5_reg: BUCK5 { |
| 426 | regulator-name = "VDD_MEM_1.35V"; |
| 427 | regulator-min-microvolt = <750000>; |
| 428 | regulator-max-microvolt = <1355000>; |
| 429 | regulator-always-on; |
| 430 | regulator-boot-on; |
| 431 | op_mode = <1>; |
| 432 | }; |
| 433 | |
| 434 | buck7_reg: BUCK7 { |
| 435 | regulator-name = "PVDD_BUCK7"; |
| 436 | regulator-always-on; |
| 437 | op_mode = <1>; |
| 438 | }; |
| 439 | |
| 440 | buck8_reg: BUCK8 { |
| 441 | regulator-name = "PVDD_BUCK8"; |
| 442 | regulator-always-on; |
| 443 | op_mode = <1>; |
| 444 | }; |
| 445 | |
| 446 | buck9_reg: BUCK9 { |
| 447 | regulator-name = "VDD_33_OFF_EXT1"; |
| 448 | regulator-min-microvolt = <750000>; |
| 449 | regulator-max-microvolt = <3000000>; |
| 450 | op_mode = <1>; |
| 451 | }; |
| 452 | }; |
| 453 | }; |
| 454 | }; |
| 455 | |
| 456 | &i2c_2 { |
| 457 | status = "okay"; |
| 458 | |
| 459 | samsung,i2c-sda-delay = <100>; |
| 460 | samsung,i2c-max-bus-freq = <66000>; |
| 461 | samsung,i2c-slave-addr = <0x50>; |
| 462 | |
| 463 | hdmiddc@50 { |
| 464 | compatible = "samsung,exynos4210-hdmiddc"; |
| 465 | reg = <0x50>; |
| 466 | }; |
| 467 | }; |
| 468 | |
| 469 | &i2c_3 { |
| 470 | status = "okay"; |
| 471 | |
| 472 | wm1811a@1a { |
| 473 | compatible = "wlf,wm1811"; |
| 474 | reg = <0x1a>; |
| 475 | |
| 476 | AVDD2-supply = <&main_dc_reg>; |
| 477 | CPVDD-supply = <&main_dc_reg>; |
| 478 | DBVDD1-supply = <&main_dc_reg>; |
| 479 | DBVDD2-supply = <&main_dc_reg>; |
| 480 | DBVDD3-supply = <&main_dc_reg>; |
| 481 | LDO1VDD-supply = <&main_dc_reg>; |
| 482 | SPKVDD1-supply = <&main_dc_reg>; |
| 483 | SPKVDD2-supply = <&main_dc_reg>; |
| 484 | |
| 485 | wlf,ldo1ena = <&gpb0 0 GPIO_ACTIVE_HIGH>; |
| 486 | wlf,ldo2ena = <&gpb0 1 GPIO_ACTIVE_HIGH>; |
| 487 | }; |
| 488 | }; |
| 489 | |
| 490 | &i2c_8 { |
| 491 | status = "okay"; |
| 492 | |
| 493 | samsung,i2c-sda-delay = <100>; |
| 494 | samsung,i2c-max-bus-freq = <66000>; |
| 495 | samsung,i2c-slave-addr = <0x38>; |
| 496 | |
| 497 | hdmiphy@38 { |
| 498 | compatible = "samsung,exynos4212-hdmiphy"; |
| 499 | reg = <0x38>; |
| 500 | }; |
| 501 | }; |
| 502 | |
| 503 | &i2c_9 { |
| 504 | status = "okay"; |
| 505 | samsung,i2c-sda-delay = <100>; |
| 506 | samsung,i2c-max-bus-freq = <40000>; |
| 507 | samsung,i2c-slave-addr = <0x38>; |
| 508 | |
| 509 | sata_phy_i2c:sata-phy@38 { |
| 510 | compatible = "samsung,exynos-sataphy-i2c"; |
| 511 | reg = <0x38>; |
| 512 | }; |
| 513 | }; |
| 514 | |
| 515 | &i2s0 { |
| 516 | status = "okay"; |
| 517 | }; |
| 518 | |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 519 | &mmc_0 { |
| 520 | status = "okay"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 521 | broken-cd; |
| 522 | card-detect-delay = <200>; |
| 523 | samsung,dw-mshc-ciu-div = <3>; |
| 524 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 525 | samsung,dw-mshc-ddr-timing = <1 2>; |
| 526 | vmmc-supply = <&mmc_reg>; |
| 527 | pinctrl-names = "default"; |
| 528 | pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; |
| 529 | bus-width = <8>; |
| 530 | cap-mmc-highspeed; |
| 531 | }; |
| 532 | |
| 533 | &mmc_2 { |
| 534 | status = "okay"; |
Andreas Faerber | c71335e | 2014-09-24 00:00:46 +0900 | [diff] [blame] | 535 | card-detect-delay = <200>; |
| 536 | samsung,dw-mshc-ciu-div = <3>; |
| 537 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 538 | samsung,dw-mshc-ddr-timing = <1 2>; |
| 539 | vmmc-supply = <&mmc_reg>; |
| 540 | pinctrl-names = "default"; |
| 541 | pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; |
| 542 | bus-width = <4>; |
| 543 | disable-wp; |
| 544 | cap-sd-highspeed; |
| 545 | }; |
| 546 | |
| 547 | &rtc { |
| 548 | status = "okay"; |
| 549 | }; |
| 550 | |
| 551 | &sata { |
| 552 | status = "okay"; |
| 553 | }; |
| 554 | |
| 555 | &sata_phy { |
| 556 | status = "okay"; |
| 557 | samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; |
| 558 | }; |