Thomas Gleixner | 5b497af | 2019-05-29 07:18:09 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 2 | /* |
| 3 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 4 | */ |
| 5 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
Dan Williams | d5d30d5 | 2019-02-02 16:35:26 -0800 | [diff] [blame] | 6 | #include <linux/moduleparam.h> |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 7 | #include <linux/vmalloc.h> |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 8 | #include <linux/device.h> |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 9 | #include <linux/ndctl.h> |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 10 | #include <linux/slab.h> |
| 11 | #include <linux/io.h> |
| 12 | #include <linux/fs.h> |
| 13 | #include <linux/mm.h> |
| 14 | #include "nd-core.h" |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 15 | #include "label.h" |
Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 16 | #include "pmem.h" |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 17 | #include "nd.h" |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 18 | |
| 19 | static DEFINE_IDA(dimm_ida); |
| 20 | |
Dan Williams | d5d30d5 | 2019-02-02 16:35:26 -0800 | [diff] [blame] | 21 | static bool noblk; |
| 22 | module_param(noblk, bool, 0444); |
| 23 | MODULE_PARM_DESC(noblk, "force disable BLK / local alias support"); |
| 24 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 25 | /* |
| 26 | * Retrieve bus and dimm handle and return if this bus supports |
| 27 | * get_config_data commands |
| 28 | */ |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 29 | int nvdimm_check_config_data(struct device *dev) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 30 | { |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 31 | struct nvdimm *nvdimm = to_nvdimm(dev); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 32 | |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 33 | if (!nvdimm->cmd_mask || |
| 34 | !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) { |
Dan Williams | a0e3745 | 2020-01-30 12:06:18 -0800 | [diff] [blame] | 35 | if (test_bit(NDD_LABELING, &nvdimm->flags)) |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 36 | return -ENXIO; |
| 37 | else |
| 38 | return -ENOTTY; |
| 39 | } |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 40 | |
| 41 | return 0; |
| 42 | } |
| 43 | |
| 44 | static int validate_dimm(struct nvdimm_drvdata *ndd) |
| 45 | { |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 46 | int rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 47 | |
Toshi Kani | aee6598 | 2016-08-16 13:08:40 -0600 | [diff] [blame] | 48 | if (!ndd) |
| 49 | return -EINVAL; |
| 50 | |
| 51 | rc = nvdimm_check_config_data(ndd->dev); |
| 52 | if (rc) |
Sakari Ailus | d75f773 | 2019-03-25 21:32:28 +0200 | [diff] [blame] | 53 | dev_dbg(ndd->dev, "%ps: %s error: %d\n", |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 54 | __builtin_return_address(0), __func__, rc); |
| 55 | return rc; |
| 56 | } |
| 57 | |
| 58 | /** |
| 59 | * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area |
| 60 | * @nvdimm: dimm to initialize |
| 61 | */ |
| 62 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd) |
| 63 | { |
| 64 | struct nd_cmd_get_config_size *cmd = &ndd->nsarea; |
| 65 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 66 | struct nvdimm_bus_descriptor *nd_desc; |
| 67 | int rc = validate_dimm(ndd); |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 68 | int cmd_rc = 0; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 69 | |
| 70 | if (rc) |
| 71 | return rc; |
| 72 | |
| 73 | if (cmd->config_size) |
| 74 | return 0; /* already valid */ |
| 75 | |
| 76 | memset(cmd, 0, sizeof(*cmd)); |
| 77 | nd_desc = nvdimm_bus->nd_desc; |
Dan Williams | 9d62ed9 | 2017-05-04 11:47:22 -0700 | [diff] [blame] | 78 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
| 79 | ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc); |
| 80 | if (rc < 0) |
| 81 | return rc; |
| 82 | return cmd_rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 83 | } |
| 84 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 85 | int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf, |
| 86 | size_t offset, size_t len) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 87 | { |
| 88 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 89 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 90 | int rc = validate_dimm(ndd), cmd_rc = 0; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 91 | struct nd_cmd_get_config_data_hdr *cmd; |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 92 | size_t max_cmd_size, buf_offset; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 93 | |
| 94 | if (rc) |
| 95 | return rc; |
| 96 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 97 | if (offset + len > ndd->nsarea.config_size) |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 98 | return -ENXIO; |
| 99 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 100 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 101 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 102 | if (!cmd) |
| 103 | return -ENOMEM; |
| 104 | |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 105 | for (buf_offset = 0; len; |
| 106 | len -= cmd->in_length, buf_offset += cmd->in_length) { |
| 107 | size_t cmd_size; |
| 108 | |
| 109 | cmd->in_offset = offset + buf_offset; |
| 110 | cmd->in_length = min(max_cmd_size, len); |
| 111 | |
| 112 | cmd_size = sizeof(*cmd) + cmd->in_length; |
| 113 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 114 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 115 | ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 116 | if (rc < 0) |
| 117 | break; |
| 118 | if (cmd_rc < 0) { |
| 119 | rc = cmd_rc; |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 120 | break; |
| 121 | } |
Alexander Duyck | 2d657d1 | 2018-10-10 16:39:20 -0700 | [diff] [blame] | 122 | |
| 123 | /* out_buf should be valid, copy it into our output buffer */ |
| 124 | memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 125 | } |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 126 | kvfree(cmd); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 127 | |
| 128 | return rc; |
| 129 | } |
| 130 | |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 131 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
| 132 | void *buf, size_t len) |
| 133 | { |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 134 | size_t max_cmd_size, buf_offset; |
| 135 | struct nd_cmd_set_config_hdr *cmd; |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 136 | int rc = validate_dimm(ndd), cmd_rc = 0; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 137 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 138 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
| 139 | |
| 140 | if (rc) |
| 141 | return rc; |
| 142 | |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 143 | if (offset + len > ndd->nsarea.config_size) |
| 144 | return -ENXIO; |
| 145 | |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 146 | max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer); |
| 147 | cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 148 | if (!cmd) |
| 149 | return -ENOMEM; |
| 150 | |
| 151 | for (buf_offset = 0; len; len -= cmd->in_length, |
| 152 | buf_offset += cmd->in_length) { |
| 153 | size_t cmd_size; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 154 | |
| 155 | cmd->in_offset = offset + buf_offset; |
| 156 | cmd->in_length = min(max_cmd_size, len); |
| 157 | memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length); |
| 158 | |
| 159 | /* status is output in the last 4-bytes of the command buffer */ |
| 160 | cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 161 | |
| 162 | rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev), |
Dan Williams | e7c5a57 | 2018-04-09 12:34:24 -0700 | [diff] [blame] | 163 | ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc); |
| 164 | if (rc < 0) |
| 165 | break; |
| 166 | if (cmd_rc < 0) { |
| 167 | rc = cmd_rc; |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 168 | break; |
| 169 | } |
| 170 | } |
Dan Williams | d11cf4a | 2018-10-10 16:38:24 -0700 | [diff] [blame] | 171 | kvfree(cmd); |
Dan Williams | f524bf2 | 2015-05-30 12:36:02 -0400 | [diff] [blame] | 172 | |
| 173 | return rc; |
| 174 | } |
| 175 | |
Dan Williams | a0e3745 | 2020-01-30 12:06:18 -0800 | [diff] [blame] | 176 | void nvdimm_set_labeling(struct device *dev) |
Dan Williams | 42237e3 | 2016-10-15 15:33:52 -0700 | [diff] [blame] | 177 | { |
| 178 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 179 | |
Dan Williams | a0e3745 | 2020-01-30 12:06:18 -0800 | [diff] [blame] | 180 | set_bit(NDD_LABELING, &nvdimm->flags); |
Dan Williams | 8f078b3 | 2017-05-04 14:01:24 -0700 | [diff] [blame] | 181 | } |
| 182 | |
| 183 | void nvdimm_set_locked(struct device *dev) |
| 184 | { |
| 185 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 186 | |
| 187 | set_bit(NDD_LOCKED, &nvdimm->flags); |
Dan Williams | 42237e3 | 2016-10-15 15:33:52 -0700 | [diff] [blame] | 188 | } |
| 189 | |
Dan Williams | d34cb80 | 2017-09-25 11:01:31 -0700 | [diff] [blame] | 190 | void nvdimm_clear_locked(struct device *dev) |
| 191 | { |
| 192 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 193 | |
| 194 | clear_bit(NDD_LOCKED, &nvdimm->flags); |
| 195 | } |
| 196 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 197 | static void nvdimm_release(struct device *dev) |
| 198 | { |
| 199 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 200 | |
| 201 | ida_simple_remove(&dimm_ida, nvdimm->id); |
| 202 | kfree(nvdimm); |
| 203 | } |
| 204 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 205 | struct nvdimm *to_nvdimm(struct device *dev) |
| 206 | { |
| 207 | struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev); |
| 208 | |
| 209 | WARN_ON(!is_nvdimm(dev)); |
| 210 | return nvdimm; |
| 211 | } |
| 212 | EXPORT_SYMBOL_GPL(to_nvdimm); |
| 213 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 214 | struct nvdimm *nd_blk_region_to_dimm(struct nd_blk_region *ndbr) |
| 215 | { |
| 216 | struct nd_region *nd_region = &ndbr->nd_region; |
| 217 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; |
| 218 | |
| 219 | return nd_mapping->nvdimm; |
| 220 | } |
| 221 | EXPORT_SYMBOL_GPL(nd_blk_region_to_dimm); |
| 222 | |
Dan Williams | ca6a465 | 2017-01-13 20:36:58 -0800 | [diff] [blame] | 223 | unsigned long nd_blk_memremap_flags(struct nd_blk_region *ndbr) |
| 224 | { |
| 225 | /* pmem mapping properties are private to libnvdimm */ |
| 226 | return ARCH_MEMREMAP_PMEM; |
| 227 | } |
| 228 | EXPORT_SYMBOL_GPL(nd_blk_memremap_flags); |
| 229 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 230 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping) |
| 231 | { |
| 232 | struct nvdimm *nvdimm = nd_mapping->nvdimm; |
| 233 | |
| 234 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); |
| 235 | |
| 236 | return dev_get_drvdata(&nvdimm->dev); |
| 237 | } |
| 238 | EXPORT_SYMBOL(to_ndd); |
| 239 | |
| 240 | void nvdimm_drvdata_release(struct kref *kref) |
| 241 | { |
| 242 | struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref); |
| 243 | struct device *dev = ndd->dev; |
| 244 | struct resource *res, *_r; |
| 245 | |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 246 | dev_dbg(dev, "trace\n"); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 247 | nvdimm_bus_lock(dev); |
| 248 | for_each_dpa_resource_safe(ndd, res, _r) |
| 249 | nvdimm_free_dpa(ndd, res); |
| 250 | nvdimm_bus_unlock(dev); |
| 251 | |
yalin wang | a06a757 | 2015-08-27 19:35:48 -0400 | [diff] [blame] | 252 | kvfree(ndd->data); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 253 | kfree(ndd); |
| 254 | put_device(dev); |
| 255 | } |
| 256 | |
| 257 | void get_ndd(struct nvdimm_drvdata *ndd) |
| 258 | { |
| 259 | kref_get(&ndd->kref); |
| 260 | } |
| 261 | |
| 262 | void put_ndd(struct nvdimm_drvdata *ndd) |
| 263 | { |
| 264 | if (ndd) |
| 265 | kref_put(&ndd->kref, nvdimm_drvdata_release); |
| 266 | } |
| 267 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 268 | const char *nvdimm_name(struct nvdimm *nvdimm) |
| 269 | { |
| 270 | return dev_name(&nvdimm->dev); |
| 271 | } |
| 272 | EXPORT_SYMBOL_GPL(nvdimm_name); |
| 273 | |
Dan Williams | ba9c8dd | 2016-08-22 19:28:37 -0700 | [diff] [blame] | 274 | struct kobject *nvdimm_kobj(struct nvdimm *nvdimm) |
| 275 | { |
| 276 | return &nvdimm->dev.kobj; |
| 277 | } |
| 278 | EXPORT_SYMBOL_GPL(nvdimm_kobj); |
| 279 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 280 | unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm) |
| 281 | { |
| 282 | return nvdimm->cmd_mask; |
| 283 | } |
| 284 | EXPORT_SYMBOL_GPL(nvdimm_cmd_mask); |
| 285 | |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 286 | void *nvdimm_provider_data(struct nvdimm *nvdimm) |
| 287 | { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 288 | if (nvdimm) |
| 289 | return nvdimm->provider_data; |
| 290 | return NULL; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 291 | } |
| 292 | EXPORT_SYMBOL_GPL(nvdimm_provider_data); |
| 293 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 294 | static ssize_t commands_show(struct device *dev, |
| 295 | struct device_attribute *attr, char *buf) |
| 296 | { |
| 297 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 298 | int cmd, len = 0; |
| 299 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 300 | if (!nvdimm->cmd_mask) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 301 | return sprintf(buf, "\n"); |
| 302 | |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 303 | for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG) |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 304 | len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd)); |
| 305 | len += sprintf(buf + len, "\n"); |
| 306 | return len; |
| 307 | } |
| 308 | static DEVICE_ATTR_RO(commands); |
| 309 | |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 310 | static ssize_t flags_show(struct device *dev, |
| 311 | struct device_attribute *attr, char *buf) |
| 312 | { |
| 313 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 314 | |
Dan Williams | a0e3745 | 2020-01-30 12:06:18 -0800 | [diff] [blame] | 315 | return sprintf(buf, "%s%s%s\n", |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 316 | test_bit(NDD_ALIASING, &nvdimm->flags) ? "alias " : "", |
Dan Williams | a0e3745 | 2020-01-30 12:06:18 -0800 | [diff] [blame] | 317 | test_bit(NDD_LABELING, &nvdimm->flags) ? "label " : "", |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 318 | test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : ""); |
| 319 | } |
| 320 | static DEVICE_ATTR_RO(flags); |
| 321 | |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 322 | static ssize_t state_show(struct device *dev, struct device_attribute *attr, |
| 323 | char *buf) |
| 324 | { |
| 325 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 326 | |
| 327 | /* |
| 328 | * The state may be in the process of changing, userspace should |
| 329 | * quiesce probing if it wants a static answer |
| 330 | */ |
| 331 | nvdimm_bus_lock(dev); |
| 332 | nvdimm_bus_unlock(dev); |
| 333 | return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy) |
| 334 | ? "active" : "idle"); |
| 335 | } |
| 336 | static DEVICE_ATTR_RO(state); |
| 337 | |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 338 | static ssize_t available_slots_show(struct device *dev, |
| 339 | struct device_attribute *attr, char *buf) |
| 340 | { |
| 341 | struct nvdimm_drvdata *ndd = dev_get_drvdata(dev); |
| 342 | ssize_t rc; |
| 343 | u32 nfree; |
| 344 | |
| 345 | if (!ndd) |
| 346 | return -ENXIO; |
| 347 | |
| 348 | nvdimm_bus_lock(dev); |
| 349 | nfree = nd_label_nfree(ndd); |
| 350 | if (nfree - 1 > nfree) { |
| 351 | dev_WARN_ONCE(dev, 1, "we ate our last label?\n"); |
| 352 | nfree = 0; |
| 353 | } else |
| 354 | nfree--; |
| 355 | rc = sprintf(buf, "%d\n", nfree); |
| 356 | nvdimm_bus_unlock(dev); |
| 357 | return rc; |
| 358 | } |
| 359 | static DEVICE_ATTR_RO(available_slots); |
| 360 | |
Dave Jiang | 3c13e2a | 2018-12-10 13:20:42 -0700 | [diff] [blame] | 361 | __weak ssize_t security_show(struct device *dev, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 362 | struct device_attribute *attr, char *buf) |
| 363 | { |
| 364 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 365 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 366 | if (test_bit(NVDIMM_SECURITY_DISABLED, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 367 | return sprintf(buf, "disabled\n"); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 368 | if (test_bit(NVDIMM_SECURITY_UNLOCKED, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 369 | return sprintf(buf, "unlocked\n"); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 370 | if (test_bit(NVDIMM_SECURITY_LOCKED, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 371 | return sprintf(buf, "locked\n"); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 372 | if (test_bit(NVDIMM_SECURITY_OVERWRITE, &nvdimm->sec.flags)) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 373 | return sprintf(buf, "overwrite\n"); |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 374 | return -ENOTTY; |
| 375 | } |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 376 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 377 | static ssize_t frozen_show(struct device *dev, |
| 378 | struct device_attribute *attr, char *buf) |
| 379 | { |
| 380 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 381 | |
| 382 | return sprintf(buf, "%d\n", test_bit(NVDIMM_SECURITY_FROZEN, |
| 383 | &nvdimm->sec.flags)); |
| 384 | } |
| 385 | static DEVICE_ATTR_RO(frozen); |
| 386 | |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 387 | static ssize_t security_store(struct device *dev, |
| 388 | struct device_attribute *attr, const char *buf, size_t len) |
| 389 | |
| 390 | { |
| 391 | ssize_t rc; |
| 392 | |
| 393 | /* |
| 394 | * Require all userspace triggered security management to be |
| 395 | * done while probing is idle and the DIMM is not in active use |
| 396 | * in any region. |
| 397 | */ |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 398 | nd_device_lock(dev); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 399 | nvdimm_bus_lock(dev); |
| 400 | wait_nvdimm_bus_probe_idle(dev); |
Dan Williams | 7b60422 | 2019-08-26 17:55:05 -0700 | [diff] [blame] | 401 | rc = nvdimm_security_store(dev, buf, len); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 402 | nvdimm_bus_unlock(dev); |
Dan Williams | 87a30e1 | 2019-07-17 18:08:26 -0700 | [diff] [blame] | 403 | nd_device_unlock(dev); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 404 | |
| 405 | return rc; |
| 406 | } |
| 407 | static DEVICE_ATTR_RW(security); |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 408 | |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 409 | static struct attribute *nvdimm_attributes[] = { |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 410 | &dev_attr_state.attr, |
Dan Williams | efbf6f5 | 2017-09-25 10:24:26 -0700 | [diff] [blame] | 411 | &dev_attr_flags.attr, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 412 | &dev_attr_commands.attr, |
Dan Williams | 0ba1c63 | 2015-05-30 12:35:36 -0400 | [diff] [blame] | 413 | &dev_attr_available_slots.attr, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 414 | &dev_attr_security.attr, |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 415 | &dev_attr_frozen.attr, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 416 | NULL, |
| 417 | }; |
| 418 | |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 419 | static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n) |
| 420 | { |
| 421 | struct device *dev = container_of(kobj, typeof(*dev), kobj); |
| 422 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 423 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 424 | if (a != &dev_attr_security.attr && a != &dev_attr_frozen.attr) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 425 | return a->mode; |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 426 | if (!nvdimm->sec.flags) |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 427 | return 0; |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 428 | |
| 429 | if (a == &dev_attr_security.attr) { |
| 430 | /* Are there any state mutation ops (make writable)? */ |
| 431 | if (nvdimm->sec.ops->freeze || nvdimm->sec.ops->disable |
| 432 | || nvdimm->sec.ops->change_key |
| 433 | || nvdimm->sec.ops->erase |
| 434 | || nvdimm->sec.ops->overwrite) |
| 435 | return a->mode; |
| 436 | return 0444; |
| 437 | } |
| 438 | |
| 439 | if (nvdimm->sec.ops->freeze) |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 440 | return a->mode; |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 441 | return 0; |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 442 | } |
| 443 | |
Dan Williams | 360eba7 | 2019-11-12 17:08:04 -0800 | [diff] [blame] | 444 | static const struct attribute_group nvdimm_attribute_group = { |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 445 | .attrs = nvdimm_attributes, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 446 | .is_visible = nvdimm_visible, |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 447 | }; |
Dan Williams | 360eba7 | 2019-11-12 17:08:04 -0800 | [diff] [blame] | 448 | |
Dan Williams | 48001ea | 2020-07-20 15:08:18 -0700 | [diff] [blame^] | 449 | static ssize_t result_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 450 | { |
| 451 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 452 | enum nvdimm_fwa_result result; |
| 453 | |
| 454 | if (!nvdimm->fw_ops) |
| 455 | return -EOPNOTSUPP; |
| 456 | |
| 457 | nvdimm_bus_lock(dev); |
| 458 | result = nvdimm->fw_ops->activate_result(nvdimm); |
| 459 | nvdimm_bus_unlock(dev); |
| 460 | |
| 461 | switch (result) { |
| 462 | case NVDIMM_FWA_RESULT_NONE: |
| 463 | return sprintf(buf, "none\n"); |
| 464 | case NVDIMM_FWA_RESULT_SUCCESS: |
| 465 | return sprintf(buf, "success\n"); |
| 466 | case NVDIMM_FWA_RESULT_FAIL: |
| 467 | return sprintf(buf, "fail\n"); |
| 468 | case NVDIMM_FWA_RESULT_NOTSTAGED: |
| 469 | return sprintf(buf, "not_staged\n"); |
| 470 | case NVDIMM_FWA_RESULT_NEEDRESET: |
| 471 | return sprintf(buf, "need_reset\n"); |
| 472 | default: |
| 473 | return -ENXIO; |
| 474 | } |
| 475 | } |
| 476 | static DEVICE_ATTR_ADMIN_RO(result); |
| 477 | |
| 478 | static ssize_t activate_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 479 | { |
| 480 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 481 | enum nvdimm_fwa_state state; |
| 482 | |
| 483 | if (!nvdimm->fw_ops) |
| 484 | return -EOPNOTSUPP; |
| 485 | |
| 486 | nvdimm_bus_lock(dev); |
| 487 | state = nvdimm->fw_ops->activate_state(nvdimm); |
| 488 | nvdimm_bus_unlock(dev); |
| 489 | |
| 490 | switch (state) { |
| 491 | case NVDIMM_FWA_IDLE: |
| 492 | return sprintf(buf, "idle\n"); |
| 493 | case NVDIMM_FWA_BUSY: |
| 494 | return sprintf(buf, "busy\n"); |
| 495 | case NVDIMM_FWA_ARMED: |
| 496 | return sprintf(buf, "armed\n"); |
| 497 | default: |
| 498 | return -ENXIO; |
| 499 | } |
| 500 | } |
| 501 | |
| 502 | static ssize_t activate_store(struct device *dev, struct device_attribute *attr, |
| 503 | const char *buf, size_t len) |
| 504 | { |
| 505 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 506 | enum nvdimm_fwa_trigger arg; |
| 507 | int rc; |
| 508 | |
| 509 | if (!nvdimm->fw_ops) |
| 510 | return -EOPNOTSUPP; |
| 511 | |
| 512 | if (sysfs_streq(buf, "arm")) |
| 513 | arg = NVDIMM_FWA_ARM; |
| 514 | else if (sysfs_streq(buf, "disarm")) |
| 515 | arg = NVDIMM_FWA_DISARM; |
| 516 | else |
| 517 | return -EINVAL; |
| 518 | |
| 519 | nvdimm_bus_lock(dev); |
| 520 | rc = nvdimm->fw_ops->arm(nvdimm, arg); |
| 521 | nvdimm_bus_unlock(dev); |
| 522 | |
| 523 | if (rc < 0) |
| 524 | return rc; |
| 525 | return len; |
| 526 | } |
| 527 | static DEVICE_ATTR_ADMIN_RW(activate); |
| 528 | |
| 529 | static struct attribute *nvdimm_firmware_attributes[] = { |
| 530 | &dev_attr_activate.attr, |
| 531 | &dev_attr_result.attr, |
| 532 | }; |
| 533 | |
| 534 | static umode_t nvdimm_firmware_visible(struct kobject *kobj, struct attribute *a, int n) |
| 535 | { |
| 536 | struct device *dev = container_of(kobj, typeof(*dev), kobj); |
| 537 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); |
| 538 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; |
| 539 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 540 | enum nvdimm_fwa_capability cap; |
| 541 | |
| 542 | if (!nd_desc->fw_ops) |
| 543 | return 0; |
| 544 | if (!nvdimm->fw_ops) |
| 545 | return 0; |
| 546 | |
| 547 | nvdimm_bus_lock(dev); |
| 548 | cap = nd_desc->fw_ops->capability(nd_desc); |
| 549 | nvdimm_bus_unlock(dev); |
| 550 | |
| 551 | if (cap < NVDIMM_FWA_CAP_QUIESCE) |
| 552 | return 0; |
| 553 | |
| 554 | return a->mode; |
| 555 | } |
| 556 | |
| 557 | static const struct attribute_group nvdimm_firmware_attribute_group = { |
| 558 | .name = "firmware", |
| 559 | .attrs = nvdimm_firmware_attributes, |
| 560 | .is_visible = nvdimm_firmware_visible, |
| 561 | }; |
| 562 | |
Dan Williams | 360eba7 | 2019-11-12 17:08:04 -0800 | [diff] [blame] | 563 | static const struct attribute_group *nvdimm_attribute_groups[] = { |
| 564 | &nd_device_attribute_group, |
| 565 | &nvdimm_attribute_group, |
Dan Williams | 48001ea | 2020-07-20 15:08:18 -0700 | [diff] [blame^] | 566 | &nvdimm_firmware_attribute_group, |
Dan Williams | 360eba7 | 2019-11-12 17:08:04 -0800 | [diff] [blame] | 567 | NULL, |
| 568 | }; |
| 569 | |
| 570 | static const struct device_type nvdimm_device_type = { |
| 571 | .name = "nvdimm", |
| 572 | .release = nvdimm_release, |
| 573 | .groups = nvdimm_attribute_groups, |
| 574 | }; |
| 575 | |
| 576 | bool is_nvdimm(struct device *dev) |
| 577 | { |
| 578 | return dev->type == &nvdimm_device_type; |
| 579 | } |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 580 | |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 581 | struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus, |
| 582 | void *provider_data, const struct attribute_group **groups, |
| 583 | unsigned long flags, unsigned long cmd_mask, int num_flush, |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 584 | struct resource *flush_wpq, const char *dimm_id, |
| 585 | const struct nvdimm_security_ops *sec_ops) |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 586 | { |
| 587 | struct nvdimm *nvdimm = kzalloc(sizeof(*nvdimm), GFP_KERNEL); |
| 588 | struct device *dev; |
| 589 | |
| 590 | if (!nvdimm) |
| 591 | return NULL; |
| 592 | |
| 593 | nvdimm->id = ida_simple_get(&dimm_ida, 0, 0, GFP_KERNEL); |
| 594 | if (nvdimm->id < 0) { |
| 595 | kfree(nvdimm); |
| 596 | return NULL; |
| 597 | } |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 598 | |
| 599 | nvdimm->dimm_id = dimm_id; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 600 | nvdimm->provider_data = provider_data; |
Dan Williams | d5d30d5 | 2019-02-02 16:35:26 -0800 | [diff] [blame] | 601 | if (noblk) |
| 602 | flags |= 1 << NDD_NOBLK; |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 603 | nvdimm->flags = flags; |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 604 | nvdimm->cmd_mask = cmd_mask; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 605 | nvdimm->num_flush = num_flush; |
| 606 | nvdimm->flush_wpq = flush_wpq; |
Dan Williams | eaf9615 | 2015-05-01 13:11:27 -0400 | [diff] [blame] | 607 | atomic_set(&nvdimm->busy, 0); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 608 | dev = &nvdimm->dev; |
| 609 | dev_set_name(dev, "nmem%d", nvdimm->id); |
| 610 | dev->parent = &nvdimm_bus->dev; |
| 611 | dev->type = &nvdimm_device_type; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 612 | dev->devt = MKDEV(nvdimm_major, nvdimm->id); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 613 | dev->groups = groups; |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 614 | nvdimm->sec.ops = sec_ops; |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 615 | nvdimm->sec.overwrite_tmo = 0; |
| 616 | INIT_DELAYED_WORK(&nvdimm->dwork, nvdimm_security_overwrite_query); |
Dave Jiang | f298939 | 2018-12-05 23:39:29 -0800 | [diff] [blame] | 617 | /* |
| 618 | * Security state must be initialized before device_add() for |
| 619 | * attribute visibility. |
| 620 | */ |
Dave Jiang | 89fa9d8 | 2018-12-10 10:53:22 -0700 | [diff] [blame] | 621 | /* get security state and extended (master) state */ |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 622 | nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER); |
| 623 | nvdimm->sec.ext_flags = nvdimm_security_flags(nvdimm, NVDIMM_MASTER); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 624 | nd_device_register(dev); |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 625 | |
| 626 | return nvdimm; |
| 627 | } |
Dave Jiang | d6548ae | 2018-12-04 10:31:20 -0800 | [diff] [blame] | 628 | EXPORT_SYMBOL_GPL(__nvdimm_create); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 629 | |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 630 | static void shutdown_security_notify(void *data) |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 631 | { |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 632 | struct nvdimm *nvdimm = data; |
| 633 | |
| 634 | sysfs_put(nvdimm->sec.overwrite_state); |
| 635 | } |
| 636 | |
| 637 | int nvdimm_security_setup_events(struct device *dev) |
| 638 | { |
| 639 | struct nvdimm *nvdimm = to_nvdimm(dev); |
| 640 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 641 | if (!nvdimm->sec.flags || !nvdimm->sec.ops |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 642 | || !nvdimm->sec.ops->overwrite) |
| 643 | return 0; |
| 644 | nvdimm->sec.overwrite_state = sysfs_get_dirent(dev->kobj.sd, "security"); |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 645 | if (!nvdimm->sec.overwrite_state) |
Dan Williams | 1cd7386 | 2019-01-19 08:45:56 -0800 | [diff] [blame] | 646 | return -ENOMEM; |
| 647 | |
| 648 | return devm_add_action_or_reset(dev, shutdown_security_notify, nvdimm); |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 649 | } |
| 650 | EXPORT_SYMBOL_GPL(nvdimm_security_setup_events); |
| 651 | |
| 652 | int nvdimm_in_overwrite(struct nvdimm *nvdimm) |
| 653 | { |
| 654 | return test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags); |
| 655 | } |
| 656 | EXPORT_SYMBOL_GPL(nvdimm_in_overwrite); |
| 657 | |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 658 | int nvdimm_security_freeze(struct nvdimm *nvdimm) |
| 659 | { |
| 660 | int rc; |
| 661 | |
| 662 | WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev)); |
| 663 | |
| 664 | if (!nvdimm->sec.ops || !nvdimm->sec.ops->freeze) |
| 665 | return -EOPNOTSUPP; |
| 666 | |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 667 | if (!nvdimm->sec.flags) |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 668 | return -EIO; |
| 669 | |
Dave Jiang | 7d98809 | 2018-12-13 15:36:18 -0700 | [diff] [blame] | 670 | if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) { |
| 671 | dev_warn(&nvdimm->dev, "Overwrite operation in progress.\n"); |
| 672 | return -EBUSY; |
| 673 | } |
| 674 | |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 675 | rc = nvdimm->sec.ops->freeze(nvdimm); |
Dan Williams | d78c620 | 2019-08-26 17:54:54 -0700 | [diff] [blame] | 676 | nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER); |
Dave Jiang | 37833fb | 2018-12-06 09:14:08 -0800 | [diff] [blame] | 677 | |
| 678 | return rc; |
| 679 | } |
| 680 | |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 681 | static unsigned long dpa_align(struct nd_region *nd_region) |
| 682 | { |
| 683 | struct device *dev = &nd_region->dev; |
| 684 | |
| 685 | if (dev_WARN_ONCE(dev, !is_nvdimm_bus_locked(dev), |
| 686 | "bus lock required for capacity provision\n")) |
| 687 | return 0; |
| 688 | if (dev_WARN_ONCE(dev, !nd_region->ndr_mappings || nd_region->align |
| 689 | % nd_region->ndr_mappings, |
| 690 | "invalid region align %#lx mappings: %d\n", |
| 691 | nd_region->align, nd_region->ndr_mappings)) |
| 692 | return 0; |
| 693 | return nd_region->align / nd_region->ndr_mappings; |
| 694 | } |
| 695 | |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 696 | int alias_dpa_busy(struct device *dev, void *data) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 697 | { |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 698 | resource_size_t map_end, blk_start, new; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 699 | struct blk_alloc_info *info = data; |
| 700 | struct nd_mapping *nd_mapping; |
| 701 | struct nd_region *nd_region; |
| 702 | struct nvdimm_drvdata *ndd; |
| 703 | struct resource *res; |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 704 | unsigned long align; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 705 | int i; |
| 706 | |
Dan Williams | c9e582a | 2017-05-29 23:12:19 -0700 | [diff] [blame] | 707 | if (!is_memory(dev)) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 708 | return 0; |
| 709 | |
| 710 | nd_region = to_nd_region(dev); |
| 711 | for (i = 0; i < nd_region->ndr_mappings; i++) { |
| 712 | nd_mapping = &nd_region->mapping[i]; |
| 713 | if (nd_mapping->nvdimm == info->nd_mapping->nvdimm) |
| 714 | break; |
| 715 | } |
| 716 | |
| 717 | if (i >= nd_region->ndr_mappings) |
| 718 | return 0; |
| 719 | |
| 720 | ndd = to_ndd(nd_mapping); |
| 721 | map_end = nd_mapping->start + nd_mapping->size - 1; |
| 722 | blk_start = nd_mapping->start; |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 723 | |
| 724 | /* |
| 725 | * In the allocation case ->res is set to free space that we are |
| 726 | * looking to validate against PMEM aliasing collision rules |
| 727 | * (i.e. BLK is allocated after all aliased PMEM). |
| 728 | */ |
| 729 | if (info->res) { |
| 730 | if (info->res->start >= nd_mapping->start |
| 731 | && info->res->start < map_end) |
| 732 | /* pass */; |
| 733 | else |
| 734 | return 0; |
| 735 | } |
| 736 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 737 | retry: |
| 738 | /* |
| 739 | * Find the free dpa from the end of the last pmem allocation to |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 740 | * the end of the interleave-set mapping. |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 741 | */ |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 742 | align = dpa_align(nd_region); |
| 743 | if (!align) |
| 744 | return 0; |
| 745 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 746 | for_each_dpa_resource(ndd, res) { |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 747 | resource_size_t start, end; |
| 748 | |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 749 | if (strncmp(res->name, "pmem", 4) != 0) |
| 750 | continue; |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 751 | |
| 752 | start = ALIGN_DOWN(res->start, align); |
| 753 | end = ALIGN(res->end + 1, align) - 1; |
| 754 | if ((start >= blk_start && start < map_end) |
| 755 | || (end >= blk_start && end <= map_end)) { |
| 756 | new = max(blk_start, min(map_end, end) + 1); |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 757 | if (new != blk_start) { |
| 758 | blk_start = new; |
| 759 | goto retry; |
| 760 | } |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 761 | } |
| 762 | } |
| 763 | |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 764 | /* update the free space range with the probed blk_start */ |
| 765 | if (info->res && blk_start > info->res->start) { |
| 766 | info->res->start = max(info->res->start, blk_start); |
| 767 | if (info->res->start > info->res->end) |
| 768 | info->res->end = info->res->start - 1; |
| 769 | return 1; |
| 770 | } |
| 771 | |
Dan Williams | fe51473 | 2017-04-04 15:08:36 -0700 | [diff] [blame] | 772 | info->available -= blk_start - nd_mapping->start; |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 773 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 774 | return 0; |
| 775 | } |
| 776 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 777 | /** |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 778 | * nd_blk_available_dpa - account the unused dpa of BLK region |
| 779 | * @nd_mapping: container of dpa-resource-root + labels |
| 780 | * |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 781 | * Unlike PMEM, BLK namespaces can occupy discontiguous DPA ranges, but |
| 782 | * we arrange for them to never start at an lower dpa than the last |
| 783 | * PMEM allocation in an aliased region. |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 784 | */ |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 785 | resource_size_t nd_blk_available_dpa(struct nd_region *nd_region) |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 786 | { |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 787 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev); |
| 788 | struct nd_mapping *nd_mapping = &nd_region->mapping[0]; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 789 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 790 | struct blk_alloc_info info = { |
| 791 | .nd_mapping = nd_mapping, |
| 792 | .available = nd_mapping->size, |
Dan Williams | 762d067 | 2016-10-04 16:09:59 -0700 | [diff] [blame] | 793 | .res = NULL, |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 794 | }; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 795 | struct resource *res; |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 796 | unsigned long align; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 797 | |
| 798 | if (!ndd) |
| 799 | return 0; |
| 800 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 801 | device_for_each_child(&nvdimm_bus->dev, &info, alias_dpa_busy); |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 802 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 803 | /* now account for busy blk allocations in unaliased dpa */ |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 804 | align = dpa_align(nd_region); |
| 805 | if (!align) |
| 806 | return 0; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 807 | for_each_dpa_resource(ndd, res) { |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 808 | resource_size_t start, end, size; |
| 809 | |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 810 | if (strncmp(res->name, "blk", 3) != 0) |
| 811 | continue; |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 812 | start = ALIGN_DOWN(res->start, align); |
| 813 | end = ALIGN(res->end + 1, align) - 1; |
| 814 | size = end - start + 1; |
| 815 | if (size >= info.available) |
| 816 | return 0; |
| 817 | info.available -= size; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 818 | } |
| 819 | |
| 820 | return info.available; |
Dan Williams | 1b40e09 | 2015-05-01 13:34:01 -0400 | [diff] [blame] | 821 | } |
| 822 | |
| 823 | /** |
Keith Busch | 12e3129 | 2018-07-24 15:07:57 -0600 | [diff] [blame] | 824 | * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max |
| 825 | * contiguous unallocated dpa range. |
| 826 | * @nd_region: constrain available space check to this reference region |
| 827 | * @nd_mapping: container of dpa-resource-root + labels |
| 828 | */ |
| 829 | resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region, |
| 830 | struct nd_mapping *nd_mapping) |
| 831 | { |
| 832 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
| 833 | struct nvdimm_bus *nvdimm_bus; |
| 834 | resource_size_t max = 0; |
| 835 | struct resource *res; |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 836 | unsigned long align; |
Keith Busch | 12e3129 | 2018-07-24 15:07:57 -0600 | [diff] [blame] | 837 | |
| 838 | /* if a dimm is disabled the available capacity is zero */ |
| 839 | if (!ndd) |
| 840 | return 0; |
| 841 | |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 842 | align = dpa_align(nd_region); |
| 843 | if (!align) |
| 844 | return 0; |
| 845 | |
Keith Busch | 12e3129 | 2018-07-24 15:07:57 -0600 | [diff] [blame] | 846 | nvdimm_bus = walk_to_nvdimm_bus(ndd->dev); |
| 847 | if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm)) |
| 848 | return 0; |
| 849 | for_each_dpa_resource(ndd, res) { |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 850 | resource_size_t start, end; |
| 851 | |
Keith Busch | 12e3129 | 2018-07-24 15:07:57 -0600 | [diff] [blame] | 852 | if (strcmp(res->name, "pmem-reserve") != 0) |
| 853 | continue; |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 854 | /* trim free space relative to current alignment setting */ |
| 855 | start = ALIGN(res->start, align); |
| 856 | end = ALIGN_DOWN(res->end + 1, align) - 1; |
| 857 | if (end < start) |
| 858 | continue; |
| 859 | if (end - start + 1 > max) |
| 860 | max = end - start + 1; |
Keith Busch | 12e3129 | 2018-07-24 15:07:57 -0600 | [diff] [blame] | 861 | } |
| 862 | release_free_pmem(nvdimm_bus, nd_mapping); |
| 863 | return max; |
| 864 | } |
| 865 | |
| 866 | /** |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 867 | * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa |
| 868 | * @nd_mapping: container of dpa-resource-root + labels |
| 869 | * @nd_region: constrain available space check to this reference region |
| 870 | * @overlap: calculate available space assuming this level of overlap |
| 871 | * |
| 872 | * Validate that a PMEM label, if present, aligns with the start of an |
| 873 | * interleave set and truncate the available size at the lowest BLK |
| 874 | * overlap point. |
| 875 | * |
| 876 | * The expectation is that this routine is called multiple times as it |
| 877 | * probes for the largest BLK encroachment for any single member DIMM of |
| 878 | * the interleave set. Once that value is determined the PMEM-limit for |
| 879 | * the set can be established. |
| 880 | */ |
| 881 | resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region, |
| 882 | struct nd_mapping *nd_mapping, resource_size_t *overlap) |
| 883 | { |
| 884 | resource_size_t map_start, map_end, busy = 0, available, blk_start; |
| 885 | struct nvdimm_drvdata *ndd = to_ndd(nd_mapping); |
| 886 | struct resource *res; |
| 887 | const char *reason; |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 888 | unsigned long align; |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 889 | |
| 890 | if (!ndd) |
| 891 | return 0; |
| 892 | |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 893 | align = dpa_align(nd_region); |
| 894 | if (!align) |
| 895 | return 0; |
| 896 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 897 | map_start = nd_mapping->start; |
| 898 | map_end = map_start + nd_mapping->size - 1; |
| 899 | blk_start = max(map_start, map_end + 1 - *overlap); |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 900 | for_each_dpa_resource(ndd, res) { |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 901 | resource_size_t start, end; |
| 902 | |
| 903 | start = ALIGN_DOWN(res->start, align); |
| 904 | end = ALIGN(res->end + 1, align) - 1; |
| 905 | if (start >= map_start && start < map_end) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 906 | if (strncmp(res->name, "blk", 3) == 0) |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 907 | blk_start = min(blk_start, |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 908 | max(map_start, start)); |
| 909 | else if (end > map_end) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 910 | reason = "misaligned to iset"; |
| 911 | goto err; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 912 | } else |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 913 | busy += end - start + 1; |
| 914 | } else if (end >= map_start && end <= map_end) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 915 | if (strncmp(res->name, "blk", 3) == 0) { |
| 916 | /* |
| 917 | * If a BLK allocation overlaps the start of |
| 918 | * PMEM the entire interleave set may now only |
| 919 | * be used for BLK. |
| 920 | */ |
| 921 | blk_start = map_start; |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 922 | } else |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 923 | busy += end - start + 1; |
| 924 | } else if (map_start > start && map_start < end) { |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 925 | /* total eclipse of the mapping */ |
| 926 | busy += nd_mapping->size; |
| 927 | blk_start = map_start; |
| 928 | } |
Dan Williams | a1f3e4d | 2016-09-30 17:28:58 -0700 | [diff] [blame] | 929 | } |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 930 | |
| 931 | *overlap = map_end + 1 - blk_start; |
| 932 | available = blk_start - map_start; |
| 933 | if (busy < available) |
Dan Williams | 2522afb | 2020-01-30 12:06:23 -0800 | [diff] [blame] | 934 | return ALIGN_DOWN(available - busy, align); |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 935 | return 0; |
| 936 | |
| 937 | err: |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 938 | nd_dbg_dpa(nd_region, ndd, res, "%s\n", reason); |
| 939 | return 0; |
| 940 | } |
| 941 | |
Dan Williams | 4a826c8 | 2015-06-09 16:09:36 -0400 | [diff] [blame] | 942 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res) |
| 943 | { |
| 944 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); |
| 945 | kfree(res->name); |
| 946 | __release_region(&ndd->dpa, res->start, resource_size(res)); |
| 947 | } |
| 948 | |
| 949 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, |
| 950 | struct nd_label_id *label_id, resource_size_t start, |
| 951 | resource_size_t n) |
| 952 | { |
| 953 | char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL); |
| 954 | struct resource *res; |
| 955 | |
| 956 | if (!name) |
| 957 | return NULL; |
| 958 | |
| 959 | WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev)); |
| 960 | res = __request_region(&ndd->dpa, start, n, name, 0); |
| 961 | if (!res) |
| 962 | kfree(name); |
| 963 | return res; |
| 964 | } |
| 965 | |
Dan Williams | bf9bccc | 2015-06-17 17:14:46 -0400 | [diff] [blame] | 966 | /** |
| 967 | * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id |
| 968 | * @nvdimm: container of dpa-resource-root + labels |
| 969 | * @label_id: dpa resource name of the form {pmem|blk}-<human readable uuid> |
| 970 | */ |
| 971 | resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd, |
| 972 | struct nd_label_id *label_id) |
| 973 | { |
| 974 | resource_size_t allocated = 0; |
| 975 | struct resource *res; |
| 976 | |
| 977 | for_each_dpa_resource(ndd, res) |
| 978 | if (strcmp(res->name, label_id->id) == 0) |
| 979 | allocated += resource_size(res); |
| 980 | |
| 981 | return allocated; |
| 982 | } |
| 983 | |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 984 | static int count_dimms(struct device *dev, void *c) |
| 985 | { |
| 986 | int *count = c; |
| 987 | |
| 988 | if (is_nvdimm(dev)) |
| 989 | (*count)++; |
| 990 | return 0; |
| 991 | } |
| 992 | |
| 993 | int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count) |
| 994 | { |
| 995 | int count = 0; |
| 996 | /* Flush any possible dimm registration failures */ |
| 997 | nd_synchronize(); |
| 998 | |
| 999 | device_for_each_child(&nvdimm_bus->dev, &count, count_dimms); |
Dan Williams | 426824d | 2018-03-05 16:39:31 -0800 | [diff] [blame] | 1000 | dev_dbg(&nvdimm_bus->dev, "count: %d\n", count); |
Dan Williams | 4d88a97 | 2015-05-31 14:41:48 -0400 | [diff] [blame] | 1001 | if (count != dimm_count) |
| 1002 | return -ENXIO; |
| 1003 | return 0; |
| 1004 | } |
| 1005 | EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count); |
Dan Williams | b354aba | 2016-05-17 20:24:16 -0700 | [diff] [blame] | 1006 | |
| 1007 | void __exit nvdimm_devs_exit(void) |
| 1008 | { |
| 1009 | ida_destroy(&dimm_ida); |
| 1010 | } |