Andy Shevchenko | b466a37 | 2019-01-07 13:07:41 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Andy Shevchenko | 9cade1a | 2013-06-05 15:26:45 +0300 | [diff] [blame] | 2 | /* |
| 3 | * Driver for the Synopsys DesignWare DMA Controller |
| 4 | * |
| 5 | * Copyright (C) 2013 Intel Corporation |
Andy Shevchenko | 9cade1a | 2013-06-05 15:26:45 +0300 | [diff] [blame] | 6 | */ |
| 7 | |
Andy Shevchenko | 2a52f6e | 2014-09-23 17:18:15 +0300 | [diff] [blame] | 8 | #ifndef _DMA_DW_INTERNAL_H |
| 9 | #define _DMA_DW_INTERNAL_H |
Andy Shevchenko | 3d588f8 | 2014-09-23 17:18:11 +0300 | [diff] [blame] | 10 | |
| 11 | #include <linux/dma/dw.h> |
Andy Shevchenko | 9cade1a | 2013-06-05 15:26:45 +0300 | [diff] [blame] | 12 | |
| 13 | #include "regs.h" |
| 14 | |
Andy Shevchenko | 69da8be | 2019-01-07 13:07:38 +0200 | [diff] [blame] | 15 | int do_dma_probe(struct dw_dma_chip *chip); |
| 16 | int do_dma_remove(struct dw_dma_chip *chip); |
| 17 | |
| 18 | void do_dw_dma_on(struct dw_dma *dw); |
| 19 | void do_dw_dma_off(struct dw_dma *dw); |
| 20 | |
| 21 | int do_dw_dma_disable(struct dw_dma_chip *chip); |
| 22 | int do_dw_dma_enable(struct dw_dma_chip *chip); |
Andy Shevchenko | 9cade1a | 2013-06-05 15:26:45 +0300 | [diff] [blame] | 23 | |
Andy Shevchenko | 4d130de | 2014-08-19 20:29:16 +0300 | [diff] [blame] | 24 | extern bool dw_dma_filter(struct dma_chan *chan, void *param); |
Andy Shevchenko | 9cade1a | 2013-06-05 15:26:45 +0300 | [diff] [blame] | 25 | |
Andy Shevchenko | b685fe2 | 2019-08-20 16:15:45 +0300 | [diff] [blame] | 26 | #ifdef CONFIG_ACPI |
| 27 | void dw_dma_acpi_controller_register(struct dw_dma *dw); |
| 28 | void dw_dma_acpi_controller_free(struct dw_dma *dw); |
| 29 | #else /* !CONFIG_ACPI */ |
| 30 | static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} |
| 31 | static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} |
| 32 | #endif /* !CONFIG_ACPI */ |
| 33 | |
Andy Shevchenko | f5e84ea | 2019-08-20 16:15:46 +0300 | [diff] [blame] | 34 | struct platform_device; |
| 35 | |
| 36 | #ifdef CONFIG_OF |
| 37 | struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev); |
| 38 | void dw_dma_of_controller_register(struct dw_dma *dw); |
| 39 | void dw_dma_of_controller_free(struct dw_dma *dw); |
| 40 | #else |
| 41 | static inline struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev) |
| 42 | { |
| 43 | return NULL; |
| 44 | } |
| 45 | static inline void dw_dma_of_controller_register(struct dw_dma *dw) {} |
| 46 | static inline void dw_dma_of_controller_free(struct dw_dma *dw) {} |
| 47 | #endif |
| 48 | |
Andy Shevchenko | ae923c9 | 2019-08-20 16:15:39 +0300 | [diff] [blame] | 49 | struct dw_dma_chip_pdata { |
| 50 | const struct dw_dma_platform_data *pdata; |
| 51 | int (*probe)(struct dw_dma_chip *chip); |
| 52 | int (*remove)(struct dw_dma_chip *chip); |
| 53 | struct dw_dma_chip *chip; |
| 54 | }; |
| 55 | |
| 56 | static __maybe_unused const struct dw_dma_chip_pdata dw_dma_chip_pdata = { |
| 57 | .probe = dw_dma_probe, |
| 58 | .remove = dw_dma_remove, |
| 59 | }; |
| 60 | |
| 61 | static const struct dw_dma_platform_data idma32_pdata = { |
| 62 | .nr_channels = 8, |
| 63 | .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, |
| 64 | .chan_priority = CHAN_PRIORITY_ASCENDING, |
| 65 | .block_size = 131071, |
| 66 | .nr_masters = 1, |
| 67 | .data_width = {4}, |
| 68 | .multi_block = {1, 1, 1, 1, 1, 1, 1, 1}, |
| 69 | }; |
| 70 | |
| 71 | static __maybe_unused const struct dw_dma_chip_pdata idma32_chip_pdata = { |
| 72 | .pdata = &idma32_pdata, |
| 73 | .probe = idma32_dma_probe, |
| 74 | .remove = idma32_dma_remove, |
| 75 | }; |
| 76 | |
Andy Shevchenko | 2a52f6e | 2014-09-23 17:18:15 +0300 | [diff] [blame] | 77 | #endif /* _DMA_DW_INTERNAL_H */ |