Blame - drivers/clocksource/Kconfig - SHIFTPHONES/mainline/linux

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Jean Delvare	5839427	2014-06-16 11:48:45 +0200	[diff] [blame]	1	menu "Clock Source drivers"
				2
Stephen Warren	ae278a9	2012-11-19 16:41:20 -0700	[diff] [blame]	3	config CLKSRC_OF
				4	bool
				5
Russell King	89c0b8e	2011-05-08 18:47:58 +0100	[diff] [blame]	6	config CLKSRC_I8253
				7	bool
Russell King	442c817	2011-05-08 14:06:52 +0100	[diff] [blame]	8
Thomas Gleixner	e6220bd	2011-06-09 13:08:25 +0000	[diff] [blame]	9	config CLKEVT_I8253
				10	bool
				11
Ralf Baechle	15f304b	2011-06-01 19:04:59 +0100	[diff] [blame]	12	config I8253_LOCK
				13	bool
				14
				15	config CLKBLD_I8253
Thomas Gleixner	e6220bd	2011-06-09 13:08:25 +0000	[diff] [blame]	16	def_bool y if CLKSRC_I8253 \|\| CLKEVT_I8253 \|\| I8253_LOCK
Ralf Baechle	15f304b	2011-06-01 19:04:59 +0100	[diff] [blame]	17
Russell King	442c817	2011-05-08 14:06:52 +0100	[diff] [blame]	18	config CLKSRC_MMIO
				19	bool
Jamie Iles	06c3df4	2011-06-06 12:43:07 +0100	[diff] [blame]	20
				21	config DW_APB_TIMER
				22	bool
Mattias Wallin	489bcce	2011-05-27 10:30:12 +0200	[diff] [blame]	23
Dinh Nguyen	cfda590	2012-07-11 15:13:16 -0500	[diff] [blame]	24	config DW_APB_TIMER_OF
				25	bool
Heiko Stuebner	1b4eca0	2013-06-04 11:38:11 +0200	[diff] [blame]	26	select DW_APB_TIMER
Heiko Stuebner	1002148	2013-06-04 11:38:42 +0200	[diff] [blame]	27	select CLKSRC_OF
Dinh Nguyen	cfda590	2012-07-11 15:13:16 -0500	[diff] [blame]	28
Daniel Lezcano	468b8c4	2015-01-25 22:06:02 +0100	[diff] [blame^]	29	config ROCKCHIP_TIMER
				30	bool
				31	select CLKSRC_OF
				32
Gregory CLEMENT	6fe9cbd	2012-06-13 18:58:09 +0200	[diff] [blame]	33	config ARMADA_370_XP_TIMER
				34	bool
Jean Pihet	7b0dd72	2013-09-18 20:55:09 +0200	[diff] [blame]	35	select CLKSRC_OF
Gregory CLEMENT	6fe9cbd	2012-06-13 18:58:09 +0200	[diff] [blame]	36
Carlo Caione	e4a6b37	2014-09-29 01:50:05 +0200	[diff] [blame]	37	config MESON6_TIMER
				38	bool
Beniamino Galvani	7b6b0a4	2014-11-18 16:41:20 +0100	[diff] [blame]	39	select CLKSRC_MMIO
Carlo Caione	e4a6b37	2014-09-29 01:50:05 +0200	[diff] [blame]	40
Sebastian Hesselbarth	0c1dcfd	2013-06-11 08:38:50 +0200	[diff] [blame]	41	config ORION_TIMER
				42	select CLKSRC_OF
				43	select CLKSRC_MMIO
				44	bool
				45
Maxime Ripard	119fd63	2013-03-24 11:49:25 +0100	[diff] [blame]	46	config SUN4I_TIMER
Maxime Ripard	71c568c	2013-10-14 21:07:46 +0200	[diff] [blame]	47	select CLKSRC_MMIO
Maxime Ripard	b2ac5d7	2012-11-12 15:07:50 +0100	[diff] [blame]	48	bool
				49
Maxime Ripard	6790554	2013-11-07 12:01:48 +0100	[diff] [blame]	50	config SUN5I_HSTIMER
				51	select CLKSRC_MMIO
				52	bool
				53
Tony Prisk	ff7ec34	2013-01-14 17:58:21 +1300	[diff] [blame]	54	config VT8500_TIMER
				55	bool
				56
Michal Simek	4f0f234	2013-03-20 10:46:01 +0100	[diff] [blame]	57	config CADENCE_TTC_TIMER
				58	bool
				59
Linus Walleij	694e33a	2012-10-18 14:01:25 +0200	[diff] [blame]	60	config CLKSRC_NOMADIK_MTU
				61	bool
				62	depends on (ARCH_NOMADIK \|\| ARCH_U8500)
				63	select CLKSRC_MMIO
				64	help
				65	Support for Multi Timer Unit. MTU provides access
				66	to multiple interrupt generating programmable
				67	32-bit free running decrementing counters.
				68
				69	config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
				70	bool
				71	depends on CLKSRC_NOMADIK_MTU
				72	help
				73	Use the Multi Timer Unit as the sched_clock.
				74
Mattias Wallin	489bcce	2011-05-27 10:30:12 +0200	[diff] [blame]	75	config CLKSRC_DBX500_PRCMU
				76	bool "Clocksource PRCMU Timer"
Linus Walleij	29746f4	2012-04-13 13:16:31 +0200	[diff] [blame]	77	depends on UX500_SOC_DB8500
Mattias Wallin	489bcce	2011-05-27 10:30:12 +0200	[diff] [blame]	78	default y
				79	help
				80	Use the always on PRCMU Timer as clocksource
				81
				82	config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
				83	bool "Clocksource PRCMU Timer sched_clock"
Linus Walleij	694e33a	2012-10-18 14:01:25 +0200	[diff] [blame]	84	depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
Mattias Wallin	489bcce	2011-05-27 10:30:12 +0200	[diff] [blame]	85	default y
				86	help
				87	Use the always on PRCMU Timer as sched_clock
Marc Zyngier	985c067	2012-03-05 11:49:30 +0000	[diff] [blame]	88
Uwe Kleine-König	9c9b781	2013-10-03 21:56:29 +0200	[diff] [blame]	89	config CLKSRC_EFM32
				90	bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
				91	depends on OF && ARM && (ARCH_EFM32 \|\| COMPILE_TEST)
Axel Lin	09ca275	2013-11-20 10:15:11 +0800	[diff] [blame]	92	select CLKSRC_MMIO
Uwe Kleine-König	9c9b781	2013-10-03 21:56:29 +0200	[diff] [blame]	93	default ARCH_EFM32
				94	help
				95	Support to use the timers of EFM32 SoCs as clock source and clock
				96	event device.
				97
Mark Rutland	8a4da6e	2012-11-12 14:33:44 +0000	[diff] [blame]	98	config ARM_ARCH_TIMER
				99	bool
Rob Herring	0583fe4	2013-04-10 18:27:51 -0500	[diff] [blame]	100	select CLKSRC_OF if OF
James Hogan	a2c5d4e	2012-10-09 10:54:39 +0100	[diff] [blame]	101
Will Deacon	037f637	2013-08-23 15:32:29 +0100	[diff] [blame]	102	config ARM_ARCH_TIMER_EVTSTREAM
				103	bool "Support for ARM architected timer event stream generation"
				104	default y if ARM_ARCH_TIMER
Stephen Boyd	77f7ce9	2013-11-20 12:02:03 -0800	[diff] [blame]	105	depends on ARM_ARCH_TIMER
Will Deacon	037f637	2013-08-23 15:32:29 +0100	[diff] [blame]	106	help
				107	This option enables support for event stream generation based on
				108	the ARM architected timer. It is used for waking up CPUs executing
				109	the wfe instruction at a frequency represented as a power-of-2
				110	divisor of the clock rate.
				111	The main use of the event stream is wfe-based timeouts of userspace
				112	locking implementations. It might also be useful for imposing timeout
				113	on wfe to safeguard against any programming errors in case an expected
				114	event is not generated.
				115	This must be disabled for hardware validation purposes to detect any
				116	hardware anomalies of missing events.
				117
Stuart Menefy	c1b40e4	2013-06-26 12:48:38 +0100	[diff] [blame]	118	config ARM_GLOBAL_TIMER
				119	bool
				120	select CLKSRC_OF if OF
				121	help
				122	This options enables support for the ARM global timer unit
				123
				124	config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
				125	bool
				126	depends on ARM_GLOBAL_TIMER
				127	default y
				128	help
				129	Use ARM global timer clock source as sched_clock
				130
Maxime Ripard	b052ff3	2014-09-02 18:12:35 +0200	[diff] [blame]	131	config ATMEL_PIT
				132	select CLKSRC_OF if OF
				133	def_bool SOC_AT91SAM9 \|\| SOC_SAMA5
				134
James Hogan	a2c5d4e	2012-10-09 10:54:39 +0100	[diff] [blame]	135	config CLKSRC_METAG_GENERIC
				136	def_bool y if METAG
				137	help
				138	This option enables support for the Meta per-thread timers.
Thomas Abraham	6938d75a	2013-03-09 16:16:13 +0900	[diff] [blame]	139
				140	config CLKSRC_EXYNOS_MCT
				141	def_bool y if ARCH_EXYNOS
Doug Anderson	3252a64	2014-07-05 06:43:26 +0900	[diff] [blame]	142	depends on !ARM64
Thomas Abraham	6938d75a	2013-03-09 16:16:13 +0900	[diff] [blame]	143	help
				144	Support for Multi Core Timer controller on Exynos SoCs.
Arnd Bergmann	241a987	2013-05-06 23:49:09 +0200	[diff] [blame]	145
Tomasz Figa	f118998	2013-04-20 23:22:13 +0200	[diff] [blame]	146	config CLKSRC_SAMSUNG_PWM
Tomasz Figa	77d8443	2013-04-23 17:46:23 +0200	[diff] [blame]	147	bool
Tomasz Figa	f118998	2013-04-20 23:22:13 +0200	[diff] [blame]	148	help
				149	This is a new clocksource driver for the PWM timer found in
				150	Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
				151	for all devicetree enabled platforms. This driver will be
				152	needed only on systems that do not have the Exynos MCT available.
Jingchang Lu	c196724	2013-05-29 10:12:17 +0200	[diff] [blame]	153
Xiubo Li	2529c3a	2014-05-23 10:12:04 +0200	[diff] [blame]	154	config FSL_FTM_TIMER
				155	bool
				156	help
				157	Support for Freescale FlexTimer Module (FTM) timer.
				158
Jingchang Lu	c196724	2013-05-29 10:12:17 +0200	[diff] [blame]	159	config VF_PIT_TIMER
				160	bool
				161	help
				162	Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.
Magnus Damm	fd3f127	2014-02-20 12:54:45 +0100	[diff] [blame]	163
				164	config SYS_SUPPORTS_SH_CMT
				165	bool
				166
Matthias Brugger	ecb3530	2014-07-18 11:36:43 +0200	[diff] [blame]	167	config MTK_TIMER
				168	select CLKSRC_OF
				169	select CLKSRC_MMIO
				170	bool
				171
Magnus Damm	fd3f127	2014-02-20 12:54:45 +0100	[diff] [blame]	172	config SYS_SUPPORTS_SH_MTU2
				173	bool
				174
				175	config SYS_SUPPORTS_SH_TMU
				176	bool
				177
				178	config SYS_SUPPORTS_EM_STI
				179	bool
				180
				181	config SH_TIMER_CMT
				182	bool "Renesas CMT timer driver" if COMPILE_TEST
Geert Uytterhoeven	87291a9	2014-03-20 15:05:50 +0100	[diff] [blame]	183	depends on GENERIC_CLOCKEVENTS
Magnus Damm	fd3f127	2014-02-20 12:54:45 +0100	[diff] [blame]	184	default SYS_SUPPORTS_SH_CMT
				185	help
				186	This enables build of a clocksource and clockevent driver for
				187	the Compare Match Timer (CMT) hardware available in 16/32/48-bit
				188	variants on a wide range of Mobile and Automotive SoCs from Renesas.
				189
				190	config SH_TIMER_MTU2
				191	bool "Renesas MTU2 timer driver" if COMPILE_TEST
Geert Uytterhoeven	87291a9	2014-03-20 15:05:50 +0100	[diff] [blame]	192	depends on GENERIC_CLOCKEVENTS
Magnus Damm	fd3f127	2014-02-20 12:54:45 +0100	[diff] [blame]	193	default SYS_SUPPORTS_SH_MTU2
				194	help
				195	This enables build of a clockevent driver for the Multi-Function
Kuninori Morimoto	7e13918	2014-07-18 11:36:36 +0200	[diff] [blame]	196	Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
Magnus Damm	fd3f127	2014-02-20 12:54:45 +0100	[diff] [blame]	197	This hardware comes with 16 bit-timer registers.
				198
				199	config SH_TIMER_TMU
				200	bool "Renesas TMU timer driver" if COMPILE_TEST
Geert Uytterhoeven	87291a9	2014-03-20 15:05:50 +0100	[diff] [blame]	201	depends on GENERIC_CLOCKEVENTS
Magnus Damm	fd3f127	2014-02-20 12:54:45 +0100	[diff] [blame]	202	default SYS_SUPPORTS_SH_TMU
				203	help
				204	This enables build of a clocksource and clockevent driver for
				205	the 32-bit Timer Unit (TMU) hardware available on a wide range
				206	SoCs from Renesas.
				207
				208	config EM_TIMER_STI
				209	bool "Renesas STI timer driver" if COMPILE_TEST
Chen Gang	40c9631	2014-07-08 20:39:40 +0800	[diff] [blame]	210	depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
Magnus Damm	fd3f127	2014-02-20 12:54:45 +0100	[diff] [blame]	211	default SYS_SUPPORTS_EM_STI
				212	help
				213	This enables build of a clocksource and clockevent driver for
				214	the 48-bit System Timer (STI) hardware available on a SoCs
				215	such as EMEV2 from former NEC Electronics.
Linus Torvalds	dfc25e4	2014-04-05 13:51:19 -0700	[diff] [blame]	216
Kumar Gala	3f8e8ce	2014-01-29 16:17:30 -0600	[diff] [blame]	217	config CLKSRC_QCOM
				218	bool
Pawel Moll	220e2a8	2014-04-16 18:22:59 +0100	[diff] [blame]	219
				220	config CLKSRC_VERSATILE
				221	bool "ARM Versatile (Express) reference platforms clock source"
Arnd Bergmann	b33cdd2	2014-05-26 17:25:22 +0200	[diff] [blame]	222	depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
Pawel Moll	220e2a8	2014-04-16 18:22:59 +0100	[diff] [blame]	223	select CLKSRC_OF
				224	default y if MFD_VEXPRESS_SYSREG
				225	help
				226	This option enables clock source based on free running
				227	counter available in the "System Registers" block of
				228	ARM Versatile, RealView and Versatile Express reference
				229	platforms.
Jean Delvare	5839427	2014-06-16 11:48:45 +0200	[diff] [blame]	230
Andrew Bresticker	fa5635a	2014-10-20 12:03:58 -0700	[diff] [blame]	231	config CLKSRC_MIPS_GIC
				232	bool
				233	depends on MIPS_GIC
Andrew Bresticker	e12aa82	2014-11-12 11:43:39 -0800	[diff] [blame]	234	select CLKSRC_OF
Andrew Bresticker	fa5635a	2014-10-20 12:03:58 -0700	[diff] [blame]	235
Oleksij Rempel	8d8bd7b	2015-01-08 10:07:22 +0100	[diff] [blame]	236	config ASM9260_TIMER
				237	bool "Alphascale ASM9260 timer driver"
				238	depends on GENERIC_CLOCKEVENTS
				239	select CLKSRC_MMIO
				240	select CLKSRC_OF
				241	default y if MACH_ASM9260
				242	help
				243	This enables build of a clocksource and clockevent driver for
				244	the 32-bit System Timer hardware available on a Alphascale ASM9260.
				245
Jean Delvare	5839427	2014-06-16 11:48:45 +0200	[diff] [blame]	246	endmenu