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Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +01001/*
Enric Balletbo i Serra9aa36df2013-11-26 15:03:37 -08002 * Common device tree for IGEP boards based on AM/DM37x
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +01003 *
4 * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11/dts-v1/;
12
Enric Balletbo i Serra9aa36df2013-11-26 15:03:37 -080013#include "omap36xx.dtsi"
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +010014
15/ {
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x20000000>; /* 512 MB */
19 };
20
21 sound {
22 compatible = "ti,omap-twl4030";
23 ti,model = "igep2";
24 ti,mcbsp = <&mcbsp2>;
25 ti,codec = <&twl_audio>;
26 };
Enric Balletbo i Serra0e9fd772013-11-26 15:03:37 -080027
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
32 };
33
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +010034};
35
36&omap3_pmx_core {
Matthias Bruggerbc0b8b72012-12-12 16:33:42 +010037 uart1_pins: pinmux_uart1_pins {
38 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020039 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
40 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */
Matthias Bruggerbc0b8b72012-12-12 16:33:42 +010041 >;
42 };
43
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +010044 uart3_pins: pinmux_uart3_pins {
45 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020046 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
47 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +010048 >;
49 };
50
Enric Balletbo i Serra65399f02013-09-10 17:35:23 +020051 mcbsp2_pins: pinmux_mcbsp2_pins {
52 pinctrl-single,pins = <
53 0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
54 0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
55 0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
56 0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
57 >;
58 };
59
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +010060 mmc1_pins: pinmux_mmc1_pins {
61 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020062 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
63 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
64 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
65 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
66 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
67 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +010068 >;
69 };
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +020070
Enric Balletbo i Serra0e9fd772013-11-26 15:03:37 -080071 mmc2_pins: pinmux_mmc2_pins {
72 pinctrl-single,pins = <
73 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
74 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
75 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
76 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
77 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
78 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
79 >;
80 };
81
Javier Martinez Canillasef139e12014-04-24 18:53:50 +020082 smsc9221_pins: pinmux_smsc9221_pins {
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +020083 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020084 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
Javier Martinez Canillasd72b4412013-04-17 18:32:09 +020085 >;
86 };
Javier Martinez Canillas00964a92013-06-20 16:42:30 +020087
Javier Martinez Canillasd526dae2013-11-26 15:03:37 -080088 i2c1_pins: pinmux_i2c1_pins {
89 pinctrl-single,pins = <
90 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
91 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
92 >;
93 };
94
Javier Martinez Canillasd526dae2013-11-26 15:03:37 -080095 i2c3_pins: pinmux_i2c3_pins {
96 pinctrl-single,pins = <
97 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
98 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
99 >;
100 };
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100101};
102
Enric Balletbo i Serrae170db32014-11-06 13:01:42 +0100103&gpmc {
104 nand@0,0 {
105 linux,mtd-name= "micron,mt29c4g96maz";
106 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
107 nand-bus-width = <16>;
108 gpmc,device-width = <2>;
109 ti,nand-ecc-opt = "bch8";
110
111 gpmc,sync-clk-ps = <0>;
112 gpmc,cs-on-ns = <0>;
113 gpmc,cs-rd-off-ns = <44>;
114 gpmc,cs-wr-off-ns = <44>;
115 gpmc,adv-on-ns = <6>;
116 gpmc,adv-rd-off-ns = <34>;
117 gpmc,adv-wr-off-ns = <44>;
118 gpmc,we-off-ns = <40>;
119 gpmc,oe-off-ns = <54>;
120 gpmc,access-ns = <64>;
121 gpmc,rd-cycle-ns = <82>;
122 gpmc,wr-cycle-ns = <82>;
123 gpmc,wr-access-ns = <40>;
124 gpmc,wr-data-mux-bus-ns = <0>;
125
126 #address-cells = <1>;
127 #size-cells = <1>;
128
129 partition@0 {
130 label = "SPL";
131 reg = <0 0x100000>;
132 };
133 partition@80000 {
134 label = "U-Boot";
135 reg = <0x100000 0x180000>;
136 };
137 partition@1c0000 {
138 label = "Environment";
139 reg = <0x280000 0x100000>;
140 };
141 partition@280000 {
142 label = "Kernel";
143 reg = <0x380000 0x300000>;
144 };
145 partition@780000 {
146 label = "Filesystem";
147 reg = <0x680000 0x1f980000>;
148 };
149 };
150};
151
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100152&i2c1 {
Javier Martinez Canillasd526dae2013-11-26 15:03:37 -0800153 pinctrl-names = "default";
154 pinctrl-0 = <&i2c1_pins>;
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100155 clock-frequency = <2600000>;
156
157 twl: twl@48 {
158 reg = <0x48>;
159 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
160 interrupt-parent = <&intc>;
161
162 twl_audio: audio {
163 compatible = "ti,twl4030-audio";
164 codec {
165 };
166 };
167 };
168};
169
Florian Vaussard98ef79572013-05-31 14:32:55 +0200170#include "twl4030.dtsi"
Kevin Hilmanf9688452013-05-31 14:09:34 -0700171#include "twl4030_omap3.dtsi"
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100172
Javier Martinez Canillasd526dae2013-11-26 15:03:37 -0800173&i2c3 {
174 pinctrl-names = "default";
175 pinctrl-0 = <&i2c3_pins>;
176};
177
Enric Balletbo i Serra65399f02013-09-10 17:35:23 +0200178&mcbsp2 {
179 pinctrl-names = "default";
180 pinctrl-0 = <&mcbsp2_pins>;
Peter Ujfalusi726322c2014-01-24 10:19:05 +0200181 status = "okay";
Enric Balletbo i Serra65399f02013-09-10 17:35:23 +0200182};
183
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100184&mmc1 {
185 pinctrl-names = "default";
186 pinctrl-0 = <&mmc1_pins>;
187 vmmc-supply = <&vmmc1>;
188 vmmc_aux-supply = <&vsim>;
Enric Balletbo i Serra85591332013-11-26 15:03:36 -0800189 bus-width = <4>;
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100190};
191
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100192&mmc3 {
193 status = "disabled";
194};
195
Matthias Bruggerbc0b8b72012-12-12 16:33:42 +0100196&uart1 {
197 pinctrl-names = "default";
198 pinctrl-0 = <&uart1_pins>;
199};
200
Javier Martinez Canillas947fd0a2012-12-19 14:33:08 +0100201&uart3 {
202 pinctrl-names = "default";
203 pinctrl-0 = <&uart3_pins>;
204};
205
206&twl_gpio {
207 ti,use-leds;
208};
Javier Martinez Canillasaa496bd2013-10-07 17:12:23 +0200209
210&usb_otg_hs {
211 interface-type = <0>;
212 usb-phy = <&usb2_phy>;
213 phys = <&usb2_phy>;
214 phy-names = "usb2-phy";
215 mode = <3>;
216 power = <50>;
217};