Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 1 | config MTD_NAND_ECC |
| 2 | tristate |
| 3 | |
| 4 | config MTD_NAND_ECC_SMC |
| 5 | bool "NAND ECC Smart Media byte order" |
| 6 | depends on MTD_NAND_ECC |
| 7 | default n |
| 8 | help |
| 9 | Software ECC according to the Smart Media Specification. |
| 10 | The original Linux implementation had byte 0 and 1 swapped. |
| 11 | |
| 12 | |
| 13 | menuconfig MTD_NAND |
Miquel Raynal | daf9a87 | 2018-03-19 10:21:58 +0100 | [diff] [blame] | 14 | tristate "Raw/Parallel NAND Device Support" |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 15 | depends on MTD |
| 16 | select MTD_NAND_ECC |
| 17 | help |
Miquel Raynal | daf9a87 | 2018-03-19 10:21:58 +0100 | [diff] [blame] | 18 | This enables support for accessing all type of raw/parallel |
| 19 | NAND flash devices. For further information see |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 20 | <http://www.linux-mtd.infradead.org/doc/nand.html>. |
| 21 | |
| 22 | if MTD_NAND |
| 23 | |
| 24 | config MTD_NAND_BCH |
| 25 | tristate |
| 26 | select BCH |
| 27 | depends on MTD_NAND_ECC_BCH |
| 28 | default MTD_NAND |
| 29 | |
| 30 | config MTD_NAND_ECC_BCH |
| 31 | bool "Support software BCH ECC" |
| 32 | default n |
| 33 | help |
| 34 | This enables support for software BCH error correction. Binary BCH |
| 35 | codes are more powerful and cpu intensive than traditional Hamming |
| 36 | ECC codes. They are used with NAND devices requiring more than 1 bit |
| 37 | of error correction. |
| 38 | |
| 39 | config MTD_SM_COMMON |
| 40 | tristate |
| 41 | default n |
| 42 | |
| 43 | config MTD_NAND_DENALI |
| 44 | tristate |
| 45 | |
| 46 | config MTD_NAND_DENALI_PCI |
| 47 | tristate "Support Denali NAND controller on Intel Moorestown" |
| 48 | select MTD_NAND_DENALI |
Geert Uytterhoeven | 7db782b | 2018-04-17 19:49:14 +0200 | [diff] [blame] | 49 | depends on PCI |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 50 | help |
| 51 | Enable the driver for NAND flash on Intel Moorestown, using the |
| 52 | Denali NAND controller core. |
| 53 | |
| 54 | config MTD_NAND_DENALI_DT |
| 55 | tristate "Support Denali NAND controller as a DT device" |
| 56 | select MTD_NAND_DENALI |
| 57 | depends on HAS_DMA && HAVE_CLK && OF |
| 58 | help |
| 59 | Enable the driver for NAND flash on platforms using a Denali NAND |
| 60 | controller as a DT device. |
| 61 | |
| 62 | config MTD_NAND_GPIO |
| 63 | tristate "GPIO assisted NAND Flash driver" |
| 64 | depends on GPIOLIB || COMPILE_TEST |
| 65 | depends on HAS_IOMEM |
| 66 | help |
| 67 | This enables a NAND flash driver where control signals are |
| 68 | connected to GPIO pins, and commands and data are communicated |
| 69 | via a memory mapped interface. |
| 70 | |
| 71 | config MTD_NAND_AMS_DELTA |
| 72 | tristate "NAND Flash device on Amstrad E3" |
| 73 | depends on MACH_AMS_DELTA |
| 74 | default y |
| 75 | help |
| 76 | Support for NAND flash on Amstrad E3 (Delta). |
| 77 | |
| 78 | config MTD_NAND_OMAP2 |
| 79 | tristate "NAND Flash device on OMAP2, OMAP3, OMAP4 and Keystone" |
| 80 | depends on (ARCH_OMAP2PLUS || ARCH_KEYSTONE) |
| 81 | help |
| 82 | Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 |
| 83 | and Keystone platforms. |
| 84 | |
| 85 | config MTD_NAND_OMAP_BCH |
| 86 | depends on MTD_NAND_OMAP2 |
| 87 | bool "Support hardware based BCH error correction" |
| 88 | default n |
| 89 | select BCH |
| 90 | help |
| 91 | This config enables the ELM hardware engine, which can be used to |
| 92 | locate and correct errors when using BCH ECC scheme. This offloads |
| 93 | the cpu from doing ECC error searching and correction. However some |
| 94 | legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine |
| 95 | so this is optional for them. |
| 96 | |
| 97 | config MTD_NAND_OMAP_BCH_BUILD |
| 98 | def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH |
| 99 | |
| 100 | config MTD_NAND_RICOH |
| 101 | tristate "Ricoh xD card reader" |
| 102 | default n |
| 103 | depends on PCI |
| 104 | select MTD_SM_COMMON |
| 105 | help |
| 106 | Enable support for Ricoh R5C852 xD card reader |
| 107 | You also need to enable ether |
| 108 | NAND SSFDC (SmartMedia) read only translation layer' or new |
| 109 | expermental, readwrite |
| 110 | 'SmartMedia/xD new translation layer' |
| 111 | |
| 112 | config MTD_NAND_AU1550 |
| 113 | tristate "Au1550/1200 NAND support" |
| 114 | depends on MIPS_ALCHEMY |
| 115 | help |
| 116 | This enables the driver for the NAND flash controller on the |
| 117 | AMD/Alchemy 1550 SOC. |
| 118 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 119 | config MTD_NAND_S3C2410 |
| 120 | tristate "NAND Flash support for Samsung S3C SoCs" |
| 121 | depends on ARCH_S3C24XX || ARCH_S3C64XX |
| 122 | help |
| 123 | This enables the NAND flash controller on the S3C24xx and S3C64xx |
| 124 | SoCs |
| 125 | |
| 126 | No board specific support is done by this driver, each board |
| 127 | must advertise a platform_device for the driver to attach. |
| 128 | |
| 129 | config MTD_NAND_S3C2410_DEBUG |
| 130 | bool "Samsung S3C NAND driver debug" |
| 131 | depends on MTD_NAND_S3C2410 |
| 132 | help |
| 133 | Enable debugging of the S3C NAND driver |
| 134 | |
| 135 | config MTD_NAND_NDFC |
| 136 | tristate "NDFC NanD Flash Controller" |
| 137 | depends on 4xx |
| 138 | select MTD_NAND_ECC_SMC |
| 139 | help |
| 140 | NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs |
| 141 | |
| 142 | config MTD_NAND_S3C2410_CLKSTOP |
| 143 | bool "Samsung S3C NAND IDLE clock stop" |
| 144 | depends on MTD_NAND_S3C2410 |
| 145 | default n |
| 146 | help |
| 147 | Stop the clock to the NAND controller when there is no chip |
| 148 | selected to save power. This will mean there is a small delay |
| 149 | when the is NAND chip selected or released, but will save |
| 150 | approximately 5mA of power when there is nothing happening. |
| 151 | |
| 152 | config MTD_NAND_TANGO |
| 153 | tristate "NAND Flash support for Tango chips" |
| 154 | depends on ARCH_TANGO || COMPILE_TEST |
Boris Brezillon | 45e9f40 | 2018-07-05 11:44:57 +0200 | [diff] [blame^] | 155 | depends on HAS_IOMEM |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 156 | help |
| 157 | Enables the NAND Flash controller on Tango chips. |
| 158 | |
| 159 | config MTD_NAND_DISKONCHIP |
| 160 | tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" |
| 161 | depends on HAS_IOMEM |
| 162 | select REED_SOLOMON |
| 163 | select REED_SOLOMON_DEC16 |
| 164 | help |
| 165 | This is a reimplementation of M-Systems DiskOnChip 2000, |
| 166 | Millennium and Millennium Plus as a standard NAND device driver, |
| 167 | as opposed to the earlier self-contained MTD device drivers. |
| 168 | This should enable, among other things, proper JFFS2 operation on |
| 169 | these devices. |
| 170 | |
| 171 | config MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 172 | bool "Advanced detection options for DiskOnChip" |
| 173 | depends on MTD_NAND_DISKONCHIP |
| 174 | help |
| 175 | This option allows you to specify nonstandard address at which to |
| 176 | probe for a DiskOnChip, or to change the detection options. You |
| 177 | are unlikely to need any of this unless you are using LinuxBIOS. |
| 178 | Say 'N'. |
| 179 | |
| 180 | config MTD_NAND_DISKONCHIP_PROBE_ADDRESS |
| 181 | hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 182 | depends on MTD_NAND_DISKONCHIP |
| 183 | default "0" |
| 184 | ---help--- |
| 185 | By default, the probe for DiskOnChip devices will look for a |
| 186 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 187 | This option allows you to specify a single address at which to probe |
| 188 | for the device, which is useful if you have other devices in that |
| 189 | range which get upset when they are probed. |
| 190 | |
| 191 | (Note that on PowerPC, the normal probe will only check at |
| 192 | 0xE4000000.) |
| 193 | |
| 194 | Normally, you should leave this set to zero, to allow the probe at |
| 195 | the normal addresses. |
| 196 | |
| 197 | config MTD_NAND_DISKONCHIP_PROBE_HIGH |
| 198 | bool "Probe high addresses" |
| 199 | depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED |
| 200 | help |
| 201 | By default, the probe for DiskOnChip devices will look for a |
| 202 | DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. |
| 203 | This option changes to make it probe between 0xFFFC8000 and |
| 204 | 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be |
| 205 | useful to you. Say 'N'. |
| 206 | |
| 207 | config MTD_NAND_DISKONCHIP_BBTWRITE |
| 208 | bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" |
| 209 | depends on MTD_NAND_DISKONCHIP |
| 210 | help |
| 211 | On DiskOnChip devices shipped with the INFTL filesystem (Millennium |
| 212 | and 2000 TSOP/Alon), Linux reserves some space at the end of the |
| 213 | device for the Bad Block Table (BBT). If you have existing INFTL |
| 214 | data on your device (created by non-Linux tools such as M-Systems' |
| 215 | DOS drivers), your data might overlap the area Linux wants to use for |
| 216 | the BBT. If this is a concern for you, leave this option disabled and |
| 217 | Linux will not write BBT data into this area. |
| 218 | The downside of leaving this option disabled is that if bad blocks |
| 219 | are detected by Linux, they will not be recorded in the BBT, which |
| 220 | could cause future problems. |
| 221 | Once you enable this option, new filesystems (INFTL or others, created |
| 222 | in Linux or other operating systems) will not use the reserved area. |
| 223 | The only reason not to enable this option is to prevent damage to |
| 224 | preexisting filesystems. |
| 225 | Even if you leave this disabled, you can enable BBT writes at module |
| 226 | load time (assuming you build diskonchip as a module) with the module |
| 227 | parameter "inftl_bbt_write=1". |
| 228 | |
| 229 | config MTD_NAND_DOCG4 |
| 230 | tristate "Support for DiskOnChip G4" |
| 231 | depends on HAS_IOMEM |
| 232 | select BCH |
| 233 | select BITREVERSE |
| 234 | help |
| 235 | Support for diskonchip G4 nand flash, found in various smartphones and |
| 236 | PDAs, among them the Palm Treo680, HTC Prophet and Wizard, Toshiba |
| 237 | Portege G900, Asus P526, and O2 XDA Zinc. |
| 238 | |
| 239 | With this driver you will be able to use UBI and create a ubifs on the |
| 240 | device, so you may wish to consider enabling UBI and UBIFS as well. |
| 241 | |
| 242 | These devices ship with the Mys/Sandisk SAFTL formatting, for which |
| 243 | there is currently no mtd parser, so you may want to use command line |
| 244 | partitioning to segregate write-protected blocks. On the Treo680, the |
| 245 | first five erase blocks (256KiB each) are write-protected, followed |
| 246 | by the block containing the saftl partition table. This is probably |
| 247 | typical. |
| 248 | |
| 249 | config MTD_NAND_SHARPSL |
| 250 | tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" |
| 251 | depends on ARCH_PXA |
| 252 | |
| 253 | config MTD_NAND_CAFE |
| 254 | tristate "NAND support for OLPC CAFÉ chip" |
| 255 | depends on PCI |
| 256 | select REED_SOLOMON |
| 257 | select REED_SOLOMON_DEC16 |
| 258 | help |
| 259 | Use NAND flash attached to the CAFÉ chip designed for the OLPC |
| 260 | laptop. |
| 261 | |
| 262 | config MTD_NAND_CS553X |
| 263 | tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)" |
| 264 | depends on X86_32 |
| 265 | depends on !UML && HAS_IOMEM |
| 266 | help |
| 267 | The CS553x companion chips for the AMD Geode processor |
| 268 | include NAND flash controllers with built-in hardware ECC |
| 269 | capabilities; enabling this option will allow you to use |
| 270 | these. The driver will check the MSRs to verify that the |
| 271 | controller is enabled for NAND, and currently requires that |
| 272 | the controller be in MMIO mode. |
| 273 | |
| 274 | If you say "m", the module will be called cs553x_nand. |
| 275 | |
| 276 | config MTD_NAND_ATMEL |
| 277 | tristate "Support for NAND Flash / SmartMedia on AT91" |
| 278 | depends on ARCH_AT91 |
| 279 | select MFD_ATMEL_SMC |
| 280 | help |
| 281 | Enables support for NAND Flash / Smart Media Card interface |
| 282 | on Atmel AT91 processors. |
| 283 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 284 | config MTD_NAND_MARVELL |
| 285 | tristate "NAND controller support on Marvell boards" |
| 286 | depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \ |
| 287 | COMPILE_TEST |
Geert Uytterhoeven | 7db782b | 2018-04-17 19:49:14 +0200 | [diff] [blame] | 288 | depends on HAS_IOMEM |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 289 | help |
| 290 | This enables the NAND flash controller driver for Marvell boards, |
| 291 | including: |
| 292 | - PXA3xx processors (NFCv1) |
| 293 | - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2) |
| 294 | - 64-bit Aramda platforms (7k, 8k) (NFCv2) |
| 295 | |
| 296 | config MTD_NAND_SLC_LPC32XX |
| 297 | tristate "NXP LPC32xx SLC Controller" |
| 298 | depends on ARCH_LPC32XX |
| 299 | help |
| 300 | Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell |
| 301 | chips) NAND controller. This is the default for the PHYTEC 3250 |
| 302 | reference board which contains a NAND256R3A2CZA6 chip. |
| 303 | |
| 304 | Please check the actual NAND chip connected and its support |
| 305 | by the SLC NAND controller. |
| 306 | |
| 307 | config MTD_NAND_MLC_LPC32XX |
| 308 | tristate "NXP LPC32xx MLC Controller" |
| 309 | depends on ARCH_LPC32XX |
| 310 | help |
| 311 | Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND |
| 312 | controller. This is the default for the WORK92105 controller |
| 313 | board. |
| 314 | |
| 315 | Please check the actual NAND chip connected and its support |
| 316 | by the MLC NAND controller. |
| 317 | |
| 318 | config MTD_NAND_CM_X270 |
| 319 | tristate "Support for NAND Flash on CM-X270 modules" |
| 320 | depends on MACH_ARMCORE |
| 321 | |
| 322 | config MTD_NAND_PASEMI |
| 323 | tristate "NAND support for PA Semi PWRficient" |
| 324 | depends on PPC_PASEMI |
| 325 | help |
| 326 | Enables support for NAND Flash interface on PA Semi PWRficient |
| 327 | based boards |
| 328 | |
| 329 | config MTD_NAND_TMIO |
| 330 | tristate "NAND Flash device on Toshiba Mobile IO Controller" |
| 331 | depends on MFD_TMIO |
| 332 | help |
| 333 | Support for NAND flash connected to a Toshiba Mobile IO |
| 334 | Controller in some PDAs, including the Sharp SL6000x. |
| 335 | |
| 336 | config MTD_NAND_NANDSIM |
| 337 | tristate "Support for NAND Flash Simulator" |
| 338 | help |
| 339 | The simulator may simulate various NAND flash chips for the |
| 340 | MTD nand layer. |
| 341 | |
| 342 | config MTD_NAND_GPMI_NAND |
| 343 | tristate "GPMI NAND Flash Controller driver" |
Boris Brezillon | 4d54df4 | 2018-07-05 11:44:56 +0200 | [diff] [blame] | 344 | depends on MXS_DMA |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 345 | help |
| 346 | Enables NAND Flash support for IMX23, IMX28 or IMX6. |
| 347 | The GPMI controller is very powerful, with the help of BCH |
| 348 | module, it can do the hardware ECC. The GPMI supports several |
| 349 | NAND flashs at the same time. |
| 350 | |
| 351 | config MTD_NAND_BRCMNAND |
| 352 | tristate "Broadcom STB NAND controller" |
| 353 | depends on ARM || ARM64 || MIPS |
| 354 | help |
| 355 | Enables the Broadcom NAND controller driver. The controller was |
| 356 | originally designed for Set-Top Box but is used on various BCM7xxx, |
| 357 | BCM3xxx, BCM63xxx, iProc/Cygnus and more. |
| 358 | |
| 359 | config MTD_NAND_BCM47XXNFLASH |
| 360 | tristate "Support for NAND flash on BCM4706 BCMA bus" |
| 361 | depends on BCMA_NFLASH |
| 362 | help |
| 363 | BCMA bus can have various flash memories attached, they are |
| 364 | registered by bcma as platform devices. This enables driver for |
| 365 | NAND flash memories. For now only BCM4706 is supported. |
| 366 | |
| 367 | config MTD_NAND_PLATFORM |
| 368 | tristate "Support for generic platform NAND driver" |
| 369 | depends on HAS_IOMEM |
| 370 | help |
| 371 | This implements a generic NAND driver for on-SOC platform |
| 372 | devices. You will need to provide platform-specific functions |
| 373 | via platform_data. |
| 374 | |
| 375 | config MTD_NAND_ORION |
| 376 | tristate "NAND Flash support for Marvell Orion SoC" |
| 377 | depends on PLAT_ORION |
| 378 | help |
| 379 | This enables the NAND flash controller on Orion machines. |
| 380 | |
| 381 | No board specific support is done by this driver, each board |
| 382 | must advertise a platform_device for the driver to attach. |
| 383 | |
| 384 | config MTD_NAND_OXNAS |
| 385 | tristate "NAND Flash support for Oxford Semiconductor SoC" |
| 386 | depends on ARCH_OXNAS || COMPILE_TEST |
| 387 | depends on HAS_IOMEM |
| 388 | help |
| 389 | This enables the NAND flash controller on Oxford Semiconductor SoCs. |
| 390 | |
| 391 | config MTD_NAND_FSL_ELBC |
| 392 | tristate "NAND support for Freescale eLBC controllers" |
| 393 | depends on FSL_SOC |
| 394 | select FSL_LBC |
| 395 | help |
| 396 | Various Freescale chips, including the 8313, include a NAND Flash |
| 397 | Controller Module with built-in hardware ECC capabilities. |
| 398 | Enabling this option will enable you to use this to control |
| 399 | external NAND devices. |
| 400 | |
| 401 | config MTD_NAND_FSL_IFC |
| 402 | tristate "NAND support for Freescale IFC controller" |
| 403 | depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A |
| 404 | select FSL_IFC |
| 405 | select MEMORY |
| 406 | help |
| 407 | Various Freescale chips e.g P1010, include a NAND Flash machine |
| 408 | with built-in hardware ECC capabilities. |
| 409 | Enabling this option will enable you to use this to control |
| 410 | external NAND devices. |
| 411 | |
| 412 | config MTD_NAND_FSL_UPM |
| 413 | tristate "Support for NAND on Freescale UPM" |
| 414 | depends on PPC_83xx || PPC_85xx |
| 415 | select FSL_LBC |
| 416 | help |
| 417 | Enables support for NAND Flash chips wired onto Freescale PowerPC |
| 418 | processor localbus with User-Programmable Machine support. |
| 419 | |
| 420 | config MTD_NAND_MPC5121_NFC |
| 421 | tristate "MPC5121 built-in NAND Flash Controller support" |
| 422 | depends on PPC_MPC512x |
| 423 | help |
| 424 | This enables the driver for the NAND flash controller on the |
| 425 | MPC5121 SoC. |
| 426 | |
| 427 | config MTD_NAND_VF610_NFC |
| 428 | tristate "Support for Freescale NFC for VF610/MPC5125" |
| 429 | depends on (SOC_VF610 || COMPILE_TEST) |
| 430 | depends on HAS_IOMEM |
| 431 | help |
| 432 | Enables support for NAND Flash Controller on some Freescale |
| 433 | processors like the VF610, MPC5125, MCF54418 or Kinetis K70. |
| 434 | The driver supports a maximum 2k page size. With 2k pages and |
| 435 | 64 bytes or more of OOB, hardware ECC with up to 32-bit error |
| 436 | correction is supported. Hardware ECC is only enabled through |
| 437 | device tree. |
| 438 | |
| 439 | config MTD_NAND_MXC |
| 440 | tristate "MXC NAND support" |
| 441 | depends on ARCH_MXC |
| 442 | help |
| 443 | This enables the driver for the NAND flash controller on the |
| 444 | MXC processors. |
| 445 | |
| 446 | config MTD_NAND_SH_FLCTL |
| 447 | tristate "Support for NAND on Renesas SuperH FLCTL" |
| 448 | depends on SUPERH || COMPILE_TEST |
| 449 | depends on HAS_IOMEM |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 450 | help |
| 451 | Several Renesas SuperH CPU has FLCTL. This option enables support |
| 452 | for NAND Flash using FLCTL. |
| 453 | |
| 454 | config MTD_NAND_DAVINCI |
| 455 | tristate "Support NAND on DaVinci/Keystone SoC" |
| 456 | depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) |
| 457 | help |
| 458 | Enable the driver for NAND flash chips on Texas Instruments |
| 459 | DaVinci/Keystone processors. |
| 460 | |
| 461 | config MTD_NAND_TXX9NDFMC |
| 462 | tristate "NAND Flash support for TXx9 SoC" |
| 463 | depends on SOC_TX4938 || SOC_TX4939 |
| 464 | help |
| 465 | This enables the NAND flash controller on the TXx9 SoCs. |
| 466 | |
| 467 | config MTD_NAND_SOCRATES |
| 468 | tristate "Support for NAND on Socrates board" |
| 469 | depends on SOCRATES |
| 470 | help |
| 471 | Enables support for NAND Flash chips wired onto Socrates board. |
| 472 | |
| 473 | config MTD_NAND_NUC900 |
| 474 | tristate "Support for NAND on Nuvoton NUC9xx/w90p910 evaluation boards." |
| 475 | depends on ARCH_W90X900 |
| 476 | help |
| 477 | This enables the driver for the NAND Flash on evaluation board based |
| 478 | on w90p910 / NUC9xx. |
| 479 | |
| 480 | config MTD_NAND_JZ4740 |
| 481 | tristate "Support for JZ4740 SoC NAND controller" |
| 482 | depends on MACH_JZ4740 |
| 483 | help |
| 484 | Enables support for NAND Flash on JZ4740 SoC based boards. |
| 485 | |
| 486 | config MTD_NAND_JZ4780 |
| 487 | tristate "Support for NAND on JZ4780 SoC" |
| 488 | depends on MACH_JZ4780 && JZ4780_NEMC |
| 489 | help |
| 490 | Enables support for NAND Flash connected to the NEMC on JZ4780 SoC |
| 491 | based boards, using the BCH controller for hardware error correction. |
| 492 | |
| 493 | config MTD_NAND_FSMC |
| 494 | tristate "Support for NAND on ST Micros FSMC" |
| 495 | depends on OF |
| 496 | depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 |
| 497 | help |
| 498 | Enables support for NAND Flash chips on the ST Microelectronics |
| 499 | Flexible Static Memory Controller (FSMC) |
| 500 | |
| 501 | config MTD_NAND_XWAY |
| 502 | bool "Support for NAND on Lantiq XWAY SoC" |
| 503 | depends on LANTIQ && SOC_TYPE_XWAY |
| 504 | help |
| 505 | Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached |
| 506 | to the External Bus Unit (EBU). |
| 507 | |
| 508 | config MTD_NAND_SUNXI |
| 509 | tristate "Support for NAND on Allwinner SoCs" |
| 510 | depends on ARCH_SUNXI |
| 511 | help |
| 512 | Enables support for NAND Flash chips on Allwinner SoCs. |
| 513 | |
| 514 | config MTD_NAND_HISI504 |
| 515 | tristate "Support for NAND controller on Hisilicon SoC Hip04" |
| 516 | depends on ARCH_HISI || COMPILE_TEST |
Boris Brezillon | 45e9f40 | 2018-07-05 11:44:57 +0200 | [diff] [blame^] | 517 | depends on HAS_IOMEM |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 518 | help |
| 519 | Enables support for NAND controller on Hisilicon SoC Hip04. |
| 520 | |
| 521 | config MTD_NAND_QCOM |
| 522 | tristate "Support for NAND on QCOM SoCs" |
| 523 | depends on ARCH_QCOM |
| 524 | help |
| 525 | Enables support for NAND flash chips on SoCs containing the EBI2 NAND |
| 526 | controller. This controller is found on IPQ806x SoC. |
| 527 | |
| 528 | config MTD_NAND_MTK |
| 529 | tristate "Support for NAND controller on MTK SoCs" |
| 530 | depends on ARCH_MEDIATEK || COMPILE_TEST |
Boris Brezillon | 45e9f40 | 2018-07-05 11:44:57 +0200 | [diff] [blame^] | 531 | depends on HAS_IOMEM |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 532 | help |
| 533 | Enables support for NAND controller on MTK SoCs. |
| 534 | This controller is found on mt27xx, mt81xx, mt65xx SoCs. |
| 535 | |
Stefan Agner | d7d9f8e | 2018-06-24 23:27:25 +0200 | [diff] [blame] | 536 | config MTD_NAND_TEGRA |
| 537 | tristate "Support for NAND controller on NVIDIA Tegra" |
| 538 | depends on ARCH_TEGRA || COMPILE_TEST |
Boris Brezillon | 45e9f40 | 2018-07-05 11:44:57 +0200 | [diff] [blame^] | 539 | depends on HAS_IOMEM |
Stefan Agner | d7d9f8e | 2018-06-24 23:27:25 +0200 | [diff] [blame] | 540 | help |
| 541 | Enables support for NAND flash controller on NVIDIA Tegra SoC. |
| 542 | The driver has been developed and tested on a Tegra 2 SoC. DMA |
| 543 | support, raw read/write page as well as HW ECC read/write page |
| 544 | is supported. Extra OOB bytes when using HW ECC are currently |
| 545 | not supported. |
| 546 | |
Boris Brezillon | 93db446 | 2018-02-05 23:02:04 +0100 | [diff] [blame] | 547 | endif # MTD_NAND |