blob: b67a75179784410fe074b553ddd91e9ed23bd206 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +08001/*
2 * animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards
3 *
4 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9/dts-v1/;
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +080010#include "at91sam9260.dtsi"
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +080011
12/ {
13 model = "Somfy Animeo IP";
14 compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9";
15
16 aliases {
17 serial0 = &usart1;
18 serial1 = &usart2;
19 serial2 = &usart0;
20 serial3 = &dbgu;
21 serial4 = &usart3;
22 serial5 = &uart0;
23 serial6 = &uart1;
24 };
25
26 chosen {
27 linux,stdout-path = &usart2;
28 };
29
30 memory {
31 reg = <0x20000000 0x4000000>;
32 };
33
34 clocks {
Alexandre Belloni650defc2014-06-18 21:13:54 +020035 slow_xtal {
36 clock-frequency = <32768>;
37 };
38
39 main_xtal {
40 clock-frequency = <18432000>;
41 };
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +080042 };
43
44 ahb {
45 apb {
Alexandre Belloni3dabfdb2016-06-08 18:09:21 +020046 tcb0: timer@fffa0000 {
47 timer@0 {
48 compatible = "atmel,tcb-timer";
49 reg = <0>, <1>;
50 };
51
52 timer@2 {
53 compatible = "atmel,tcb-timer";
54 reg = <2>;
55 };
56 };
57
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +080058 usart0: serial@fffb0000 {
59 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>;
60 linux,rs485-enabled-at-boot-time;
61 status = "okay";
62 };
63
64 usart1: serial@fffb4000 {
65 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>;
66 linux,rs485-enabled-at-boot-time;
67 status = "okay";
68 };
69
70 usart2: serial@fffb8000 {
71 pinctrl-0 = <&pinctrl_usart2>;
72 status = "okay";
73 };
74
75 macb0: ethernet@fffc4000 {
76 pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>;
77 phy-mode = "mii";
78 status = "okay";
79 };
Jean-Christophe PLAGNIOL-VILLARD301333b2012-11-15 21:56:27 +080080
81 mmc0: mmc@fffa8000 {
82 pinctrl-0 = <&pinctrl_mmc0_clk
83 &pinctrl_mmc0_slot1_cmd_dat0
84 &pinctrl_mmc0_slot1_dat1_3>;
85 status = "okay";
86
87 slot@1 {
88 reg = <1>;
89 bus-width = <4>;
90 };
91 };
Jean-Christophe PLAGNIOL-VILLARDa5618922012-11-21 16:28:13 +010092
93 watchdog@fffffd40 {
94 status = "okay";
95 };
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +080096 };
97
Boris Brezillon1004a292017-05-30 11:20:53 +020098 ebi: ebi@10000000 {
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +080099 status = "okay";
100
Boris Brezillon1004a292017-05-30 11:20:53 +0200101 nand_controller: nand-controller {
102 status = "okay";
103 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
104 pinctrl-names = "default";
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800105
Boris Brezillon1004a292017-05-30 11:20:53 +0200106 nand@3 {
107 reg = <0x3 0x0 0x800000>;
108 rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;
109 cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
110 nand-bus-width = <8>;
111 nand-ecc-mode = "soft";
112 nand-on-flash-bbt;
113 label = "atmel_nand";
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800114
Boris Brezillon1004a292017-05-30 11:20:53 +0200115 partitions {
116 compatible = "fixed-partitions";
117 #address-cells = <1>;
118 #size-cells = <1>;
119
120 barebox@0 {
121 label = "barebox";
122 reg = <0x0 0x58000>;
123 };
124
125 u_boot_env@58000 {
126 label = "u_boot_env";
127 reg = <0x58000 0x8000>;
128 };
129
130 ubi@60000 {
131 label = "ubi";
132 reg = <0x60000 0x1FA0000>;
133 };
134 };
135 };
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800136 };
137 };
138
Raashid Muhammedcfdc7fa2016-06-03 11:45:38 +0530139 usb0: ohci@500000 {
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800140 num-ports = <2>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800141 atmel,vbus-gpio = <&pioB 15 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800142 status = "okay";
143 };
144 };
145
146 leds {
147 compatible = "gpio-leds";
148
149 power_green {
150 label = "power_green";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800151 gpios = <&pioC 17 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800152 linux,default-trigger = "heartbeat";
153 };
154
155 power_red {
156 label = "power_red";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800157 gpios = <&pioA 2 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800158 };
159
160 tx_green {
161 label = "tx_green";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800162 gpios = <&pioC 19 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800163 };
164
165 tx_red {
166 label = "tx_red";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800167 gpios = <&pioC 18 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800168 };
169 };
170
171 gpio_keys {
172 compatible = "gpio-keys";
173 #address-cells = <1>;
174 #size-cells = <0>;
175
176 keyswitch_in {
177 label = "keyswitch_in";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800178 gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800179 linux,code = <28>;
Sudeep Holla67ae8b92015-10-21 11:10:07 +0100180 wakeup-source;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800181 };
182
183 error_in {
184 label = "error_in";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800185 gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800186 linux,code = <29>;
Sudeep Holla67ae8b92015-10-21 11:10:07 +0100187 wakeup-source;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800188 };
189
190 btn {
191 label = "btn";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800192 gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800193 linux,code = <31>;
Sudeep Holla67ae8b92015-10-21 11:10:07 +0100194 wakeup-source;
Jean-Christophe PLAGNIOL-VILLARDad8a15d2012-11-15 21:56:27 +0800195 };
196 };
197};