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Srinivas Pandruvadaae02e5d2016-08-07 02:25:35 -07001/*
2 * H/W layer of ISHTP provider device (ISH)
3 *
4 * Copyright (c) 2014-2016, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#ifndef _ISHTP_HW_ISH_H_
17#define _ISHTP_HW_ISH_H_
18
19#include <linux/pci.h>
20#include <linux/interrupt.h>
21#include "hw-ish-regs.h"
22#include "ishtp-dev.h"
23
24#define CHV_DEVICE_ID 0x22D8
25#define BXT_Ax_DEVICE_ID 0x0AA2
26#define BXT_Bx_DEVICE_ID 0x1AA2
27#define APL_Ax_DEVICE_ID 0x5AA2
28#define SPT_Ax_DEVICE_ID 0x9D35
Song Hongyan1e3b74a2017-06-29 13:43:33 -070029#define CNL_Ax_DEVICE_ID 0x9DFC
Song Hongyan16941302017-06-29 13:43:34 -070030#define GLK_Ax_DEVICE_ID 0x31A2
Srinivas Pandruvada7103f6b2017-12-20 11:24:10 -080031#define CNL_H_DEVICE_ID 0xA37C
Srinivas Pandruvadaae02e5d2016-08-07 02:25:35 -070032
33#define REVISION_ID_CHT_A0 0x6
34#define REVISION_ID_CHT_Ax_SI 0x0
35#define REVISION_ID_CHT_Bx_SI 0x10
36#define REVISION_ID_CHT_Kx_SI 0x20
37#define REVISION_ID_CHT_Dx_SI 0x30
38#define REVISION_ID_CHT_B0 0xB0
39#define REVISION_ID_SI_MASK 0x70
40
41struct ipc_rst_payload_type {
42 uint16_t reset_id;
43 uint16_t reserved;
44};
45
46struct time_sync_format {
47 uint8_t ts1_source;
48 uint8_t ts2_source;
49 uint16_t reserved;
50} __packed;
51
52struct ipc_time_update_msg {
53 uint64_t primary_host_time;
54 struct time_sync_format sync_info;
55 uint64_t secondary_host_time;
56} __packed;
57
58enum {
59 HOST_UTC_TIME_USEC = 0,
60 HOST_SYSTEM_TIME_USEC = 1
61};
62
63struct ish_hw {
64 void __iomem *mem_addr;
65};
66
Even Xu291e9e3f2017-02-03 14:24:53 +080067/*
68 * ISH FW status type
69 */
70enum {
71 FWSTS_AFTER_RESET = 0,
72 FWSTS_WAIT_FOR_HOST = 4,
73 FWSTS_START_KERNEL_DMA = 5,
74 FWSTS_FW_IS_RUNNING = 7,
75 FWSTS_SENSOR_APP_LOADED = 8,
76 FWSTS_SENSOR_APP_RUNNING = 15
77};
78
Srinivas Pandruvadaae02e5d2016-08-07 02:25:35 -070079#define to_ish_hw(dev) (struct ish_hw *)((dev)->hw)
80
81irqreturn_t ish_irq_handler(int irq, void *dev_id);
82struct ishtp_device *ish_dev_init(struct pci_dev *pdev);
83int ish_hw_start(struct ishtp_device *dev);
84void ish_device_disable(struct ishtp_device *dev);
85
86#endif /* _ISHTP_HW_ISH_H_ */