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Sekhar Nori27e6e0d2012-08-29 23:25:27 +05301/*
2 * Device Tree for DA850 EVM board
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation, version 2.
9 */
10/dts-v1/;
Philip Avinasha2bcd772013-06-14 15:15:53 +053011#include "da850.dtsi"
Bartosz Golaszewski2aabeff2017-02-28 17:15:15 +010012#include <dt-bindings/gpio/gpio.h>
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053013
14/ {
15 compatible = "ti,da850-evm", "ti,da850";
16 model = "DA850/AM1808/OMAP-L138 EVM";
17
David Lechnerc2a3b4b2016-04-01 17:42:03 +020018 soc@1c00000 {
19 pmx_core: pinmux@14120 {
Kumar, Anil1faaba32013-01-16 14:37:39 +053020 status = "okay";
Peter Ujfalusi4ec582e2014-08-01 09:13:28 +030021
22 mcasp0_pins: pinmux_mcasp0_pins {
23 pinctrl-single,bits = <
24 /*
25 * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR,
26 * AFSR, AMUTE
27 */
28 0x00 0x11111111 0xffffffff
29 /* AXR11, AXR12 */
30 0x04 0x00011000 0x000ff000
31 >;
32 };
Karl Beldan31e3a882016-08-16 22:33:37 +000033 nand_pins: nand_pins {
34 pinctrl-single,bits = <
35 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
36 0x1c 0x10110110 0xf0ff0ff0
37 /*
38 * EMA_D[0], EMA_D[1], EMA_D[2],
39 * EMA_D[3], EMA_D[4], EMA_D[5],
40 * EMA_D[6], EMA_D[7]
41 */
42 0x24 0x11111111 0xffffffff
43 /* EMA_A[1], EMA_A[2] */
44 0x30 0x01100000 0x0ff00000
45 >;
46 };
Kumar, Anil1faaba32013-01-16 14:37:39 +053047 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020048 serial0: serial@42000 {
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053049 status = "okay";
50 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020051 serial1: serial@10c000 {
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053052 status = "okay";
53 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020054 serial2: serial@10d000 {
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053055 status = "okay";
56 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020057 rtc0: rtc@23000 {
Mrugesh Katepallewar16616362013-01-28 13:17:48 +053058 status = "okay";
59 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020060 i2c0: i2c@22000 {
Vishwanathrao Badarkhe, Manish01729cc2013-02-06 15:06:22 +053061 status = "okay";
62 clock-frequency = <100000>;
63 pinctrl-names = "default";
64 pinctrl-0 = <&i2c0_pins>;
Vishwanathrao Badarkhe, Manishc3847a32013-03-07 11:56:21 +053065
66 tps: tps@48 {
67 reg = <0x48>;
68 };
Peter Ujfalusi204a87e2014-08-01 09:13:29 +030069 tlv320aic3106: tlv320aic3106@18 {
Peter Ujfalusi3f526692014-08-01 09:13:30 +030070 #sound-dai-cells = <0>;
Peter Ujfalusi204a87e2014-08-01 09:13:29 +030071 compatible = "ti,tlv320aic3106";
72 reg = <0x18>;
73 status = "okay";
74
75 /* Regulators */
76 IOVDD-supply = <&vdcdc2_reg>;
77 /* Derived from VBAT: Baseboard 3.3V / 1.8V */
78 AVDD-supply = <&vbat>;
79 DRVDD-supply = <&vbat>;
80 DVDD-supply = <&vbat>;
81 };
Bartosz Golaszewski2aabeff2017-02-28 17:15:15 +010082 tca6416: gpio@20 {
83 compatible = "ti,tca6416";
84 reg = <0x20>;
Kevin Hilman65878b12017-05-30 18:21:25 -070085 gpio-controller;
86 #gpio-cells = <2>;
Bartosz Golaszewski2aabeff2017-02-28 17:15:15 +010087 };
Vishwanathrao Badarkhe, Manish01729cc2013-02-06 15:06:22 +053088 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020089 wdt: wdt@21000 {
Kumar, Anil518f97d2013-02-06 09:30:03 +053090 status = "okay";
91 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020092 mmc0: mmc@40000 {
Manjunathappa, Prakash88df4122013-03-28 18:42:01 +053093 max-frequency = <50000000>;
94 bus-width = <4>;
95 status = "okay";
96 pinctrl-names = "default";
97 pinctrl-0 = <&mmc0_pins>;
98 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020099 spi1: spi@30e000 {
Manjunathappa, Prakash4f4d9d42013-04-03 19:39:10 +0530100 status = "okay";
101 pinctrl-names = "default";
102 pinctrl-0 = <&spi1_pins &spi1_cs0_pin>;
103 flash: m25p80@0 {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 compatible = "m25p64";
107 spi-max-frequency = <30000000>;
Fabien Parent43849782017-01-17 13:57:42 +0100108 m25p,fast-read;
Manjunathappa, Prakash4f4d9d42013-04-03 19:39:10 +0530109 reg = <0>;
110 partition@0 {
111 label = "U-Boot-SPL";
112 reg = <0x00000000 0x00010000>;
113 read-only;
114 };
115 partition@1 {
116 label = "U-Boot";
117 reg = <0x00010000 0x00080000>;
118 read-only;
119 };
120 partition@2 {
121 label = "U-Boot-Env";
122 reg = <0x00090000 0x00010000>;
123 read-only;
124 };
125 partition@3 {
126 label = "Kernel";
127 reg = <0x000a0000 0x00280000>;
128 };
129 partition@4 {
130 label = "Filesystem";
131 reg = <0x00320000 0x00400000>;
132 };
133 partition@5 {
134 label = "MAC-Address";
135 reg = <0x007f0000 0x00010000>;
136 read-only;
137 };
138 };
139 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +0200140 mdio: mdio@224000 {
Lad, Prabhakar609f4bc2013-08-15 11:31:34 +0530141 status = "okay";
142 pinctrl-names = "default";
143 pinctrl-0 = <&mdio_pins>;
144 bus_freq = <2200000>;
145 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +0200146 eth0: ethernet@220000 {
Lad, Prabhakardd7deaf2013-08-16 22:37:09 +0530147 status = "okay";
148 pinctrl-names = "default";
149 pinctrl-0 = <&mii_pins>;
150 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +0200151 gpio: gpio@226000 {
KV Sujith3a9574f2013-11-21 23:45:31 +0530152 status = "okay";
153 };
Sekhar Nori27e6e0d2012-08-29 23:25:27 +0530154 };
Javier Martinez Canillas0b0d9122016-08-01 12:46:59 -0400155 vbat: fixedregulator0 {
Vishwanathrao Badarkhe, Manishc3847a32013-03-07 11:56:21 +0530156 compatible = "regulator-fixed";
157 regulator-name = "vbat";
158 regulator-min-microvolt = <5000000>;
159 regulator-max-microvolt = <5000000>;
160 regulator-boot-on;
161 };
Peter Ujfalusi3f526692014-08-01 09:13:30 +0300162
163 sound {
164 compatible = "simple-audio-card";
165 simple-audio-card,name = "DA850/OMAP-L138 EVM";
166 simple-audio-card,widgets =
167 "Line", "Line In",
168 "Line", "Line Out";
169 simple-audio-card,routing =
170 "LINE1L", "Line In",
171 "LINE1R", "Line In",
172 "Line Out", "LLOUT",
173 "Line Out", "RLOUT";
174 simple-audio-card,format = "dsp_b";
175 simple-audio-card,bitclock-master = <&link0_codec>;
176 simple-audio-card,frame-master = <&link0_codec>;
177 simple-audio-card,bitclock-inversion;
178
179 simple-audio-card,cpu {
180 sound-dai = <&mcasp0>;
181 system-clock-frequency = <24576000>;
182 };
183
184 link0_codec: simple-audio-card,codec {
185 sound-dai = <&tlv320aic3106>;
186 system-clock-frequency = <24576000>;
187 };
188 };
Vishwanathrao Badarkhe, Manishc3847a32013-03-07 11:56:21 +0530189};
190
191/include/ "tps6507x.dtsi"
192
193&tps {
194 vdcdc1_2-supply = <&vbat>;
195 vdcdc3-supply = <&vbat>;
196 vldo1_2-supply = <&vbat>;
197
198 regulators {
199 vdcdc1_reg: regulator@0 {
200 regulator-name = "VDCDC1_3.3V";
201 regulator-min-microvolt = <3150000>;
202 regulator-max-microvolt = <3450000>;
203 regulator-always-on;
204 regulator-boot-on;
205 };
206
207 vdcdc2_reg: regulator@1 {
208 regulator-name = "VDCDC2_3.3V";
209 regulator-min-microvolt = <1710000>;
210 regulator-max-microvolt = <3450000>;
211 regulator-always-on;
212 regulator-boot-on;
213 ti,defdcdc_default = <1>;
214 };
215
216 vdcdc3_reg: regulator@2 {
217 regulator-name = "VDCDC3_1.2V";
218 regulator-min-microvolt = <950000>;
219 regulator-max-microvolt = <1350000>;
220 regulator-always-on;
221 regulator-boot-on;
222 ti,defdcdc_default = <1>;
223 };
224
225 ldo1_reg: regulator@3 {
226 regulator-name = "LDO1_1.8V";
227 regulator-min-microvolt = <1710000>;
228 regulator-max-microvolt = <1890000>;
229 regulator-always-on;
230 regulator-boot-on;
231 };
232
233 ldo2_reg: regulator@4 {
234 regulator-name = "LDO2_1.2V";
235 regulator-min-microvolt = <1140000>;
236 regulator-max-microvolt = <1320000>;
237 regulator-always-on;
238 regulator-boot-on;
239 };
240 };
Sekhar Nori27e6e0d2012-08-29 23:25:27 +0530241};
Peter Ujfalusi4ec582e2014-08-01 09:13:28 +0300242
243&mcasp0 {
Peter Ujfalusi3f526692014-08-01 09:13:30 +0300244 #sound-dai-cells = <0>;
Peter Ujfalusi4ec582e2014-08-01 09:13:28 +0300245 status = "okay";
246 pinctrl-names = "default";
247 pinctrl-0 = <&mcasp0_pins>;
248
249 op-mode = <0>; /* MCASP_IIS_MODE */
250 tdm-slots = <2>;
251 /* 4 serializer */
252 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
253 0 0 0 0
254 0 0 0 0
255 0 0 0 1
256 2 0 0 0
257 >;
258 tx-num-evt = <32>;
259 rx-num-evt = <32>;
260};
Peter Ujfalusi7a7faed2015-12-17 15:27:48 +0200261
262&edma0 {
263 ti,edma-reserved-slot-ranges = <32 50>;
264};
Peter Ujfalusib47a8562015-12-17 15:27:49 +0200265
266&edma1 {
267 ti,edma-reserved-slot-ranges = <32 90>;
268};
Karl Beldan31e3a882016-08-16 22:33:37 +0000269
270&aemif {
271 pinctrl-names = "default";
272 pinctrl-0 = <&nand_pins>;
273 status = "ok";
274 cs3 {
275 #address-cells = <2>;
276 #size-cells = <1>;
277 clock-ranges;
278 ranges;
279
280 ti,cs-chipselect = <3>;
281
282 nand@2000000,0 {
283 compatible = "ti,davinci-nand";
284 #address-cells = <1>;
285 #size-cells = <1>;
286 reg = <0 0x02000000 0x02000000
287 1 0x00000000 0x00008000>;
288
289 ti,davinci-chipselect = <1>;
290 ti,davinci-mask-ale = <0>;
291 ti,davinci-mask-cle = <0>;
292 ti,davinci-mask-chipsel = <0>;
293 ti,davinci-ecc-mode = "hw";
294 ti,davinci-ecc-bits = <4>;
295 ti,davinci-nand-use-bbt;
296 };
297 };
298};
Kevin Hilman89223062017-01-09 12:55:27 -0800299
300&vpif {
301 pinctrl-names = "default";
Bartosz Golaszewskif8914132017-02-28 17:15:16 +0100302 pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;
Kevin Hilman89223062017-01-09 12:55:27 -0800303 status = "okay";
304
305 /* VPIF capture port */
Bartosz Golaszewskif8914132017-02-28 17:15:16 +0100306 port@0 {
307 vpif_input_ch0: endpoint@0 {
Bartosz Golaszewskic42d37c72017-02-28 17:15:13 +0100308 reg = <0>;
309 bus-width = <8>;
Kevin Hilman89223062017-01-09 12:55:27 -0800310 };
311
Bartosz Golaszewskif8914132017-02-28 17:15:16 +0100312 vpif_input_ch1: endpoint@1 {
Bartosz Golaszewskic42d37c72017-02-28 17:15:13 +0100313 reg = <1>;
314 bus-width = <8>;
315 data-shift = <8>;
Kevin Hilman89223062017-01-09 12:55:27 -0800316 };
317 };
Bartosz Golaszewskif8914132017-02-28 17:15:16 +0100318
319 /* VPIF display port */
320 port@1 {
321 vpif_output_ch0: endpoint {
322 bus-width = <8>;
323 };
324 };
Kevin Hilman89223062017-01-09 12:55:27 -0800325};