Thomas Gleixner | 1802d0b | 2019-05-27 08:55:21 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andreas Dannenberg | bd023ad | 2016-04-26 17:15:57 -0500 | [diff] [blame] | 2 | /* |
| 3 | * tas5720.h - ALSA SoC Texas Instruments TAS5720 Mono Audio Amplifier |
| 4 | * |
Alexander A. Klimov | 5856d8b | 2020-07-19 17:38:22 +0200 | [diff] [blame] | 5 | * Copyright (C)2015-2016 Texas Instruments Incorporated - https://www.ti.com |
Andreas Dannenberg | bd023ad | 2016-04-26 17:15:57 -0500 | [diff] [blame] | 6 | * |
| 7 | * Author: Andreas Dannenberg <dannenberg@ti.com> |
Andreas Dannenberg | bd023ad | 2016-04-26 17:15:57 -0500 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __TAS5720_H__ |
| 11 | #define __TAS5720_H__ |
| 12 | |
| 13 | /* Register Address Map */ |
| 14 | #define TAS5720_DEVICE_ID_REG 0x00 |
| 15 | #define TAS5720_POWER_CTRL_REG 0x01 |
| 16 | #define TAS5720_DIGITAL_CTRL1_REG 0x02 |
| 17 | #define TAS5720_DIGITAL_CTRL2_REG 0x03 |
| 18 | #define TAS5720_VOLUME_CTRL_REG 0x04 |
| 19 | #define TAS5720_ANALOG_CTRL_REG 0x06 |
| 20 | #define TAS5720_FAULT_REG 0x08 |
| 21 | #define TAS5720_DIGITAL_CLIP2_REG 0x10 |
| 22 | #define TAS5720_DIGITAL_CLIP1_REG 0x11 |
| 23 | #define TAS5720_MAX_REG TAS5720_DIGITAL_CLIP1_REG |
| 24 | |
Andreas Dannenberg | d5eb436 | 2017-12-11 13:01:55 -0600 | [diff] [blame] | 25 | /* Additional TAS5722-specific Registers */ |
| 26 | #define TAS5722_DIGITAL_CTRL2_REG 0x13 |
| 27 | #define TAS5722_ANALOG_CTRL2_REG 0x14 |
| 28 | #define TAS5722_MAX_REG TAS5722_ANALOG_CTRL2_REG |
| 29 | |
Andreas Dannenberg | bd023ad | 2016-04-26 17:15:57 -0500 | [diff] [blame] | 30 | /* TAS5720_DEVICE_ID_REG */ |
| 31 | #define TAS5720_DEVICE_ID 0x01 |
Andreas Dannenberg | 872bcad | 2017-12-11 13:01:54 -0600 | [diff] [blame] | 32 | #define TAS5722_DEVICE_ID 0x12 |
Andreas Dannenberg | bd023ad | 2016-04-26 17:15:57 -0500 | [diff] [blame] | 33 | |
| 34 | /* TAS5720_POWER_CTRL_REG */ |
| 35 | #define TAS5720_DIG_CLIP_MASK GENMASK(7, 2) |
| 36 | #define TAS5720_SLEEP BIT(1) |
| 37 | #define TAS5720_SDZ BIT(0) |
| 38 | |
| 39 | /* TAS5720_DIGITAL_CTRL1_REG */ |
| 40 | #define TAS5720_HPF_BYPASS BIT(7) |
| 41 | #define TAS5720_TDM_CFG_SRC BIT(6) |
| 42 | #define TAS5720_SSZ_DS BIT(3) |
| 43 | #define TAS5720_SAIF_RIGHTJ_24BIT (0x0) |
| 44 | #define TAS5720_SAIF_RIGHTJ_20BIT (0x1) |
| 45 | #define TAS5720_SAIF_RIGHTJ_18BIT (0x2) |
| 46 | #define TAS5720_SAIF_RIGHTJ_16BIT (0x3) |
| 47 | #define TAS5720_SAIF_I2S (0x4) |
| 48 | #define TAS5720_SAIF_LEFTJ (0x5) |
| 49 | #define TAS5720_SAIF_FORMAT_MASK GENMASK(2, 0) |
| 50 | |
| 51 | /* TAS5720_DIGITAL_CTRL2_REG */ |
Andreas Dannenberg | d5eb436 | 2017-12-11 13:01:55 -0600 | [diff] [blame] | 52 | #define TAS5722_VOL_RAMP_RATE BIT(6) |
Andreas Dannenberg | bd023ad | 2016-04-26 17:15:57 -0500 | [diff] [blame] | 53 | #define TAS5720_MUTE BIT(4) |
| 54 | #define TAS5720_TDM_SLOT_SEL_MASK GENMASK(2, 0) |
| 55 | |
| 56 | /* TAS5720_ANALOG_CTRL_REG */ |
| 57 | #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4) |
| 58 | #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4) |
| 59 | #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4) |
| 60 | #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4) |
| 61 | #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4) |
| 62 | #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4) |
| 63 | #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4) |
| 64 | #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4) |
| 65 | #define TAS5720_PWM_RATE_MASK GENMASK(6, 4) |
| 66 | #define TAS5720_ANALOG_GAIN_19_2DBV (0x0 << 2) |
| 67 | #define TAS5720_ANALOG_GAIN_20_7DBV (0x1 << 2) |
| 68 | #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2) |
| 69 | #define TAS5720_ANALOG_GAIN_26_3DBV (0x3 << 2) |
| 70 | #define TAS5720_ANALOG_GAIN_MASK GENMASK(3, 2) |
| 71 | #define TAS5720_ANALOG_GAIN_SHIFT (0x2) |
| 72 | |
| 73 | /* TAS5720_FAULT_REG */ |
| 74 | #define TAS5720_OC_THRESH_100PCT (0x0 << 4) |
| 75 | #define TAS5720_OC_THRESH_75PCT (0x1 << 4) |
| 76 | #define TAS5720_OC_THRESH_50PCT (0x2 << 4) |
| 77 | #define TAS5720_OC_THRESH_25PCT (0x3 << 4) |
| 78 | #define TAS5720_OC_THRESH_MASK GENMASK(5, 4) |
| 79 | #define TAS5720_CLKE BIT(3) |
| 80 | #define TAS5720_OCE BIT(2) |
| 81 | #define TAS5720_DCE BIT(1) |
| 82 | #define TAS5720_OTE BIT(0) |
| 83 | #define TAS5720_FAULT_MASK GENMASK(3, 0) |
| 84 | |
| 85 | /* TAS5720_DIGITAL_CLIP1_REG */ |
| 86 | #define TAS5720_CLIP1_MASK GENMASK(7, 2) |
| 87 | #define TAS5720_CLIP1_SHIFT (0x2) |
| 88 | |
Andreas Dannenberg | d5eb436 | 2017-12-11 13:01:55 -0600 | [diff] [blame] | 89 | /* TAS5722_DIGITAL_CTRL2_REG */ |
| 90 | #define TAS5722_HPF_3_7HZ (0x0 << 5) |
| 91 | #define TAS5722_HPF_7_4HZ (0x1 << 5) |
| 92 | #define TAS5722_HPF_14_9HZ (0x2 << 5) |
| 93 | #define TAS5722_HPF_29_7HZ (0x3 << 5) |
| 94 | #define TAS5722_HPF_59_4HZ (0x4 << 5) |
| 95 | #define TAS5722_HPF_118_4HZ (0x5 << 5) |
| 96 | #define TAS5722_HPF_235_0HZ (0x6 << 5) |
| 97 | #define TAS5722_HPF_463_2HZ (0x7 << 5) |
| 98 | #define TAS5722_HPF_MASK GENMASK(7, 5) |
| 99 | #define TAS5722_AUTO_SLEEP_OFF (0x0 << 3) |
| 100 | #define TAS5722_AUTO_SLEEP_1024LR (0x1 << 3) |
| 101 | #define TAS5722_AUTO_SLEEP_65536LR (0x2 << 3) |
| 102 | #define TAS5722_AUTO_SLEEP_262144LR (0x3 << 3) |
| 103 | #define TAS5722_AUTO_SLEEP_MASK GENMASK(4, 3) |
| 104 | #define TAS5722_TDM_SLOT_16B BIT(2) |
| 105 | #define TAS5722_MCLK_PIN_CFG BIT(1) |
| 106 | #define TAS5722_VOL_CONTROL_LSB BIT(0) |
| 107 | |
| 108 | /* TAS5722_ANALOG_CTRL2_REG */ |
| 109 | #define TAS5722_FAULTZ_PU BIT(3) |
| 110 | #define TAS5722_VREG_LVL BIT(2) |
| 111 | #define TAS5722_PWR_TUNE BIT(0) |
| 112 | |
Andreas Dannenberg | bd023ad | 2016-04-26 17:15:57 -0500 | [diff] [blame] | 113 | #endif /* __TAS5720_H__ */ |