Jack Yu | d1ede06 | 2020-01-10 10:18:21 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * rt715.h -- RT715 ALSA SoC audio driver header |
| 4 | * |
| 5 | * Copyright(c) 2019 Realtek Semiconductor Corp. |
| 6 | */ |
| 7 | |
| 8 | #ifndef __RT715_H__ |
| 9 | #define __RT715_H__ |
| 10 | |
| 11 | #include <linux/regulator/consumer.h> |
| 12 | |
| 13 | struct rt715_priv { |
| 14 | struct regmap *regmap; |
| 15 | struct regmap *sdw_regmap; |
| 16 | struct snd_soc_codec *codec; |
| 17 | struct sdw_slave *slave; |
| 18 | int dbg_nid; |
| 19 | int dbg_vid; |
| 20 | int dbg_payload; |
| 21 | enum sdw_slave_status status; |
| 22 | struct sdw_bus_params params; |
| 23 | bool hw_init; |
| 24 | bool first_hw_init; |
Jack Yu | fa2f983 | 2021-03-29 06:54:00 +0000 | [diff] [blame] | 25 | unsigned int kctl_2ch_vol_ori[2]; |
Jack Yu | dcca646 | 2021-03-29 06:53:54 +0000 | [diff] [blame] | 26 | unsigned int kctl_8ch_switch_ori[8]; |
| 27 | unsigned int kctl_8ch_vol_ori[8]; |
Jack Yu | d1ede06 | 2020-01-10 10:18:21 +0800 | [diff] [blame] | 28 | }; |
| 29 | |
| 30 | struct sdw_stream_data { |
| 31 | struct sdw_stream_runtime *sdw_stream; |
| 32 | }; |
| 33 | |
| 34 | /* NID */ |
| 35 | #define RT715_AUDIO_FUNCTION_GROUP 0x01 |
| 36 | #define RT715_MIC_ADC 0x07 |
| 37 | #define RT715_LINE_ADC 0x08 |
| 38 | #define RT715_MIX_ADC 0x09 |
| 39 | #define RT715_DMIC1 0x12 |
| 40 | #define RT715_DMIC2 0x13 |
| 41 | #define RT715_MIC1 0x18 |
| 42 | #define RT715_MIC2 0x19 |
| 43 | #define RT715_LINE1 0x1a |
| 44 | #define RT715_LINE2 0x1b |
| 45 | #define RT715_DMIC3 0x1d |
| 46 | #define RT715_DMIC4 0x29 |
| 47 | #define RT715_VENDOR_REGISTERS 0x20 |
| 48 | #define RT715_MUX_IN1 0x22 |
| 49 | #define RT715_MUX_IN2 0x23 |
| 50 | #define RT715_MUX_IN3 0x24 |
| 51 | #define RT715_MUX_IN4 0x25 |
| 52 | #define RT715_MIX_ADC2 0x27 |
| 53 | #define RT715_INLINE_CMD 0x55 |
| 54 | |
| 55 | /* Index (NID:20h) */ |
| 56 | #define RT715_SDW_INPUT_SEL 0x39 |
| 57 | #define RT715_EXT_DMIC_CLK_CTRL2 0x54 |
| 58 | |
| 59 | /* Verb */ |
| 60 | #define RT715_VERB_SET_CONNECT_SEL 0x3100 |
| 61 | #define RT715_VERB_GET_CONNECT_SEL 0xb100 |
| 62 | #define RT715_VERB_SET_EAPD_BTLENABLE 0x3c00 |
| 63 | #define RT715_VERB_SET_POWER_STATE 0x3500 |
| 64 | #define RT715_VERB_SET_CHANNEL_STREAMID 0x3600 |
| 65 | #define RT715_VERB_SET_PIN_WIDGET_CONTROL 0x3700 |
| 66 | #define RT715_VERB_SET_CONFIG_DEFAULT1 0x4c00 |
| 67 | #define RT715_VERB_SET_CONFIG_DEFAULT2 0x4d00 |
| 68 | #define RT715_VERB_SET_CONFIG_DEFAULT3 0x4e00 |
| 69 | #define RT715_VERB_SET_CONFIG_DEFAULT4 0x4f00 |
| 70 | #define RT715_VERB_SET_UNSOLICITED_ENABLE 0x3800 |
| 71 | #define RT715_SET_AMP_GAIN_MUTE_H 0x7300 |
| 72 | #define RT715_SET_AMP_GAIN_MUTE_L 0x8380 |
| 73 | #define RT715_READ_HDA_3 0x2012 |
| 74 | #define RT715_READ_HDA_2 0x2013 |
| 75 | #define RT715_READ_HDA_1 0x2014 |
| 76 | #define RT715_READ_HDA_0 0x2015 |
| 77 | #define RT715_PRIV_INDEX_W_H 0x7520 |
| 78 | #define RT715_PRIV_INDEX_W_L 0x85a0 |
| 79 | #define RT715_PRIV_DATA_W_H 0x7420 |
| 80 | #define RT715_PRIV_DATA_W_L 0x84a0 |
| 81 | #define RT715_PRIV_INDEX_R_H 0x9d20 |
| 82 | #define RT715_PRIV_INDEX_R_L 0xada0 |
| 83 | #define RT715_PRIV_DATA_R_H 0x9c20 |
| 84 | #define RT715_PRIV_DATA_R_L 0xaca0 |
| 85 | #define RT715_MIC_ADC_FORMAT_H 0x7207 |
| 86 | #define RT715_MIC_ADC_FORMAT_L 0x8287 |
| 87 | #define RT715_MIC_LINE_FORMAT_H 0x7208 |
| 88 | #define RT715_MIC_LINE_FORMAT_L 0x8288 |
| 89 | #define RT715_MIX_ADC_FORMAT_H 0x7209 |
| 90 | #define RT715_MIX_ADC_FORMAT_L 0x8289 |
| 91 | #define RT715_MIX_ADC2_FORMAT_H 0x7227 |
| 92 | #define RT715_MIX_ADC2_FORMAT_L 0x82a7 |
| 93 | #define RT715_FUNC_RESET 0xff01 |
| 94 | |
| 95 | #define RT715_SET_AUDIO_POWER_STATE\ |
| 96 | (RT715_VERB_SET_POWER_STATE | RT715_AUDIO_FUNCTION_GROUP) |
| 97 | #define RT715_SET_PIN_DMIC1\ |
| 98 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC1) |
| 99 | #define RT715_SET_PIN_DMIC2\ |
| 100 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC2) |
| 101 | #define RT715_SET_PIN_DMIC3\ |
| 102 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC3) |
| 103 | #define RT715_SET_PIN_DMIC4\ |
| 104 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_DMIC4) |
| 105 | #define RT715_SET_PIN_MIC1\ |
| 106 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC1) |
| 107 | #define RT715_SET_PIN_MIC2\ |
| 108 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_MIC2) |
| 109 | #define RT715_SET_PIN_LINE1\ |
| 110 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE1) |
| 111 | #define RT715_SET_PIN_LINE2\ |
| 112 | (RT715_VERB_SET_PIN_WIDGET_CONTROL | RT715_LINE2) |
| 113 | #define RT715_SET_MIC1_UNSOLICITED_ENABLE\ |
| 114 | (RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC1) |
| 115 | #define RT715_SET_MIC2_UNSOLICITED_ENABLE\ |
| 116 | (RT715_VERB_SET_UNSOLICITED_ENABLE | RT715_MIC2) |
| 117 | #define RT715_SET_STREAMID_MIC_ADC\ |
| 118 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIC_ADC) |
| 119 | #define RT715_SET_STREAMID_LINE_ADC\ |
| 120 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_LINE_ADC) |
| 121 | #define RT715_SET_STREAMID_MIX_ADC\ |
| 122 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC) |
| 123 | #define RT715_SET_STREAMID_MIX_ADC2\ |
| 124 | (RT715_VERB_SET_CHANNEL_STREAMID | RT715_MIX_ADC2) |
| 125 | #define RT715_SET_GAIN_MIC_ADC_L\ |
| 126 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC_ADC) |
| 127 | #define RT715_SET_GAIN_MIC_ADC_H\ |
| 128 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC_ADC) |
| 129 | #define RT715_SET_GAIN_LINE_ADC_L\ |
| 130 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE_ADC) |
| 131 | #define RT715_SET_GAIN_LINE_ADC_H\ |
| 132 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE_ADC) |
| 133 | #define RT715_SET_GAIN_MIX_ADC_L\ |
| 134 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC) |
| 135 | #define RT715_SET_GAIN_MIX_ADC_H\ |
| 136 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC) |
| 137 | #define RT715_SET_GAIN_MIX_ADC2_L\ |
| 138 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIX_ADC2) |
| 139 | #define RT715_SET_GAIN_MIX_ADC2_H\ |
| 140 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIX_ADC2) |
| 141 | #define RT715_SET_GAIN_DMIC1_L\ |
| 142 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC1) |
| 143 | #define RT715_SET_GAIN_DMIC1_H\ |
| 144 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC1) |
| 145 | #define RT715_SET_GAIN_DMIC2_L\ |
| 146 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC2) |
| 147 | #define RT715_SET_GAIN_DMIC2_H\ |
| 148 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC2) |
| 149 | #define RT715_SET_GAIN_DMIC3_L\ |
| 150 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC3) |
| 151 | #define RT715_SET_GAIN_DMIC3_H\ |
| 152 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC3) |
| 153 | #define RT715_SET_GAIN_DMIC4_L\ |
| 154 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_DMIC4) |
| 155 | #define RT715_SET_GAIN_DMIC4_H\ |
| 156 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_DMIC4) |
| 157 | #define RT715_SET_GAIN_MIC1_L\ |
| 158 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC1) |
| 159 | #define RT715_SET_GAIN_MIC1_H\ |
| 160 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC1) |
| 161 | #define RT715_SET_GAIN_MIC2_L\ |
| 162 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_MIC2) |
| 163 | #define RT715_SET_GAIN_MIC2_H\ |
| 164 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_MIC2) |
| 165 | #define RT715_SET_GAIN_LINE1_L\ |
| 166 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE1) |
| 167 | #define RT715_SET_GAIN_LINE1_H\ |
| 168 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE1) |
| 169 | #define RT715_SET_GAIN_LINE2_L\ |
| 170 | (RT715_SET_AMP_GAIN_MUTE_L | RT715_LINE2) |
| 171 | #define RT715_SET_GAIN_LINE2_H\ |
| 172 | (RT715_SET_AMP_GAIN_MUTE_H | RT715_LINE2) |
| 173 | #define RT715_SET_DMIC1_CONFIG_DEFAULT1\ |
| 174 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC1) |
| 175 | #define RT715_SET_DMIC2_CONFIG_DEFAULT1\ |
| 176 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC2) |
| 177 | #define RT715_SET_DMIC1_CONFIG_DEFAULT2\ |
| 178 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC1) |
| 179 | #define RT715_SET_DMIC2_CONFIG_DEFAULT2\ |
| 180 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC2) |
| 181 | #define RT715_SET_DMIC1_CONFIG_DEFAULT3\ |
| 182 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC1) |
| 183 | #define RT715_SET_DMIC2_CONFIG_DEFAULT3\ |
| 184 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC2) |
| 185 | #define RT715_SET_DMIC1_CONFIG_DEFAULT4\ |
| 186 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC1) |
| 187 | #define RT715_SET_DMIC2_CONFIG_DEFAULT4\ |
| 188 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC2) |
| 189 | #define RT715_SET_DMIC3_CONFIG_DEFAULT1\ |
| 190 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC3) |
| 191 | #define RT715_SET_DMIC4_CONFIG_DEFAULT1\ |
| 192 | (RT715_VERB_SET_CONFIG_DEFAULT1 | RT715_DMIC4) |
| 193 | #define RT715_SET_DMIC3_CONFIG_DEFAULT2\ |
| 194 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC3) |
| 195 | #define RT715_SET_DMIC4_CONFIG_DEFAULT2\ |
| 196 | (RT715_VERB_SET_CONFIG_DEFAULT2 | RT715_DMIC4) |
| 197 | #define RT715_SET_DMIC3_CONFIG_DEFAULT3\ |
| 198 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC3) |
| 199 | #define RT715_SET_DMIC4_CONFIG_DEFAULT3\ |
| 200 | (RT715_VERB_SET_CONFIG_DEFAULT3 | RT715_DMIC4) |
| 201 | #define RT715_SET_DMIC3_CONFIG_DEFAULT4\ |
| 202 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC3) |
| 203 | #define RT715_SET_DMIC4_CONFIG_DEFAULT4\ |
| 204 | (RT715_VERB_SET_CONFIG_DEFAULT4 | RT715_DMIC4) |
| 205 | |
| 206 | #define RT715_MUTE_SFT 7 |
| 207 | #define RT715_DIR_IN_SFT 6 |
| 208 | #define RT715_DIR_OUT_SFT 7 |
| 209 | |
| 210 | enum { |
| 211 | RT715_AIF1, |
| 212 | RT715_AIF2, |
Jack Yu | d1ede06 | 2020-01-10 10:18:21 +0800 | [diff] [blame] | 213 | }; |
| 214 | |
Jack Yu | 16346a3 | 2020-09-25 16:05:09 -0500 | [diff] [blame] | 215 | #define RT715_POWER_UP_DELAY_MS 400 |
| 216 | |
Jack Yu | d1ede06 | 2020-01-10 10:18:21 +0800 | [diff] [blame] | 217 | int rt715_io_init(struct device *dev, struct sdw_slave *slave); |
| 218 | int rt715_init(struct device *dev, struct regmap *sdw_regmap, |
| 219 | struct regmap *regmap, struct sdw_slave *slave); |
| 220 | |
| 221 | int hda_to_sdw(unsigned int nid, unsigned int verb, unsigned int payload, |
| 222 | unsigned int *sdw_addr_h, unsigned int *sdw_data_h, |
| 223 | unsigned int *sdw_addr_l, unsigned int *sdw_data_l); |
| 224 | int rt715_clock_config(struct device *dev); |
| 225 | #endif /* __RT715_H__ */ |