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Andy Shevchenko9a9982d2019-03-25 15:47:48 +02001// SPDX-License-Identifier: GPL-2.0-only
Miguel Gaioead6db082010-10-27 15:33:18 -07002/*
3 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
4 *
5 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
Miguel Gaioead6db082010-10-27 15:33:18 -07007 */
8
William Breathitt Grayb2ca9eb2019-12-04 16:51:29 -08009#include <linux/bitops.h>
Linus Walleij91f6a4a2018-01-13 22:07:09 +010010#include <linux/gpio/consumer.h>
Andy Shevchenko517ec432019-03-25 15:47:47 +020011#include <linux/gpio/driver.h>
12#include <linux/module.h>
13#include <linux/mutex.h>
Andy Shevchenko3c746952019-03-25 15:47:46 +020014#include <linux/property.h>
Miguel Gaioead6db082010-10-27 15:33:18 -070015#include <linux/slab.h>
Andy Shevchenko517ec432019-03-25 15:47:47 +020016#include <linux/spi/spi.h>
Miguel Gaioead6db082010-10-27 15:33:18 -070017
Maxime Ripard20bc4d52012-09-10 22:35:39 +020018#define GEN_74X164_NUMBER_GPIOS 8
19
Miguel Gaioead6db082010-10-27 15:33:18 -070020struct gen_74x164_chip {
Miguel Gaioead6db082010-10-27 15:33:18 -070021 struct gpio_chip gpio_chip;
22 struct mutex lock;
Geert Uytterhoevena1585312017-11-21 15:18:10 +010023 struct gpio_desc *gpiod_oe;
Maxime Ripard20bc4d52012-09-10 22:35:39 +020024 u32 registers;
Geert Uytterhoeven902e7e62015-11-30 15:35:26 +010025 /*
26 * Since the registers are chained, every byte sent will make
27 * the previous byte shift to the next register in the
28 * chain. Thus, the first byte sent will end up in the last
29 * register at the end of the transfer. So, to have a logical
30 * numbering, store the bytes in reverse order.
31 */
Geert Uytterhoevena1585312017-11-21 15:18:10 +010032 u8 buffer[];
Miguel Gaioead6db082010-10-27 15:33:18 -070033};
34
Miguel Gaioead6db082010-10-27 15:33:18 -070035static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
36{
Geert Uytterhoeven771d8992016-06-17 18:39:28 +020037 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
38 chip->registers);
Miguel Gaioead6db082010-10-27 15:33:18 -070039}
40
Miguel Gaioead6db082010-10-27 15:33:18 -070041static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
42{
Linus Walleijb2afc6f2015-12-03 18:20:29 +010043 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
Geert Uytterhoeven902e7e62015-11-30 15:35:26 +010044 u8 bank = chip->registers - 1 - offset / 8;
Maxime Ripard20bc4d52012-09-10 22:35:39 +020045 u8 pin = offset % 8;
Miguel Gaioead6db082010-10-27 15:33:18 -070046 int ret;
47
48 mutex_lock(&chip->lock);
Maxime Ripard20bc4d52012-09-10 22:35:39 +020049 ret = (chip->buffer[bank] >> pin) & 0x1;
Miguel Gaioead6db082010-10-27 15:33:18 -070050 mutex_unlock(&chip->lock);
51
52 return ret;
53}
54
55static void gen_74x164_set_value(struct gpio_chip *gc,
56 unsigned offset, int val)
57{
Linus Walleijb2afc6f2015-12-03 18:20:29 +010058 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
Geert Uytterhoeven902e7e62015-11-30 15:35:26 +010059 u8 bank = chip->registers - 1 - offset / 8;
Maxime Ripard20bc4d52012-09-10 22:35:39 +020060 u8 pin = offset % 8;
Miguel Gaioead6db082010-10-27 15:33:18 -070061
62 mutex_lock(&chip->lock);
63 if (val)
Maxime Ripard20bc4d52012-09-10 22:35:39 +020064 chip->buffer[bank] |= (1 << pin);
Miguel Gaioead6db082010-10-27 15:33:18 -070065 else
Maxime Ripard20bc4d52012-09-10 22:35:39 +020066 chip->buffer[bank] &= ~(1 << pin);
Miguel Gaioead6db082010-10-27 15:33:18 -070067
68 __gen_74x164_write_config(chip);
69 mutex_unlock(&chip->lock);
70}
71
Geert Uytterhoevend46ab682016-03-14 16:19:18 +010072static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
73 unsigned long *bits)
74{
75 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
William Breathitt Grayb2ca9eb2019-12-04 16:51:29 -080076 unsigned long offset;
77 unsigned long bankmask;
78 size_t bank;
79 unsigned long bitmask;
Geert Uytterhoevend46ab682016-03-14 16:19:18 +010080
81 mutex_lock(&chip->lock);
William Breathitt Grayb2ca9eb2019-12-04 16:51:29 -080082 for_each_set_clump8(offset, bankmask, mask, chip->registers * 8) {
83 bank = chip->registers - 1 - offset / 8;
84 bitmask = bitmap_get_value8(bits, offset) & bankmask;
Geert Uytterhoevend46ab682016-03-14 16:19:18 +010085
86 chip->buffer[bank] &= ~bankmask;
William Breathitt Grayb2ca9eb2019-12-04 16:51:29 -080087 chip->buffer[bank] |= bitmask;
Geert Uytterhoevend46ab682016-03-14 16:19:18 +010088 }
89 __gen_74x164_write_config(chip);
90 mutex_unlock(&chip->lock);
91}
92
H Hartley Sweetena3cc68c2011-05-27 16:35:59 -070093static int gen_74x164_direction_output(struct gpio_chip *gc,
94 unsigned offset, int val)
95{
96 gen_74x164_set_value(gc, offset, val);
97 return 0;
98}
99
Bill Pemberton38363092012-11-19 13:22:34 -0500100static int gen_74x164_probe(struct spi_device *spi)
Miguel Gaioead6db082010-10-27 15:33:18 -0700101{
102 struct gen_74x164_chip *chip;
Geert Uytterhoeven410f4572015-11-30 15:35:25 +0100103 u32 nregs;
Miguel Gaioead6db082010-10-27 15:33:18 -0700104 int ret;
105
Miguel Gaioead6db082010-10-27 15:33:18 -0700106 /*
107 * bits_per_word cannot be configured in platform data
108 */
109 spi->bits_per_word = 8;
110
111 ret = spi_setup(spi);
112 if (ret < 0)
113 return ret;
114
Andy Shevchenko3c746952019-03-25 15:47:46 +0200115 ret = device_property_read_u32(&spi->dev, "registers-number", &nregs);
116 if (ret) {
117 dev_err(&spi->dev, "Missing 'registers-number' property.\n");
Geert Uytterhoeven410f4572015-11-30 15:35:25 +0100118 return -EINVAL;
119 }
120
121 chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
Miguel Gaioead6db082010-10-27 15:33:18 -0700122 if (!chip)
123 return -ENOMEM;
124
Fabio Estevam7ebc1942017-08-07 09:41:50 -0300125 chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
126 GPIOD_OUT_LOW);
127 if (IS_ERR(chip->gpiod_oe))
128 return PTR_ERR(chip->gpiod_oe);
129
130 gpiod_set_value_cansleep(chip->gpiod_oe, 1);
131
Jingoo Han6c0cf422013-03-15 18:17:18 +0900132 spi_set_drvdata(spi, chip);
Miguel Gaioead6db082010-10-27 15:33:18 -0700133
H Hartley Sweetena3cc68c2011-05-27 16:35:59 -0700134 chip->gpio_chip.label = spi->modalias;
135 chip->gpio_chip.direction_output = gen_74x164_direction_output;
Miguel Gaioead6db082010-10-27 15:33:18 -0700136 chip->gpio_chip.get = gen_74x164_get_value;
137 chip->gpio_chip.set = gen_74x164_set_value;
Geert Uytterhoevend46ab682016-03-14 16:19:18 +0100138 chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
Alexander Shiyan61e73802013-12-07 14:08:22 +0400139 chip->gpio_chip.base = -1;
Maxime Ripard20bc4d52012-09-10 22:35:39 +0200140
Geert Uytterhoeven410f4572015-11-30 15:35:25 +0100141 chip->registers = nregs;
Maxime Ripard20bc4d52012-09-10 22:35:39 +0200142 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
Maxime Ripard20bc4d52012-09-10 22:35:39 +0200143
Linus Walleij9fb1f392013-12-04 14:42:46 +0100144 chip->gpio_chip.can_sleep = true;
Linus Walleij58383c782015-11-04 09:56:26 +0100145 chip->gpio_chip.parent = &spi->dev;
Miguel Gaioead6db082010-10-27 15:33:18 -0700146 chip->gpio_chip.owner = THIS_MODULE;
147
Alexander Shiyanbcc05622013-12-07 14:08:23 +0400148 mutex_init(&chip->lock);
149
Miguel Gaioead6db082010-10-27 15:33:18 -0700150 ret = __gen_74x164_write_config(chip);
151 if (ret) {
152 dev_err(&spi->dev, "Failed writing: %d\n", ret);
153 goto exit_destroy;
154 }
155
Linus Walleijb2afc6f2015-12-03 18:20:29 +0100156 ret = gpiochip_add_data(&chip->gpio_chip, chip);
Alexander Shiyanbcc05622013-12-07 14:08:23 +0400157 if (!ret)
158 return 0;
Miguel Gaioead6db082010-10-27 15:33:18 -0700159
160exit_destroy:
Miguel Gaioead6db082010-10-27 15:33:18 -0700161 mutex_destroy(&chip->lock);
Alexander Shiyanbcc05622013-12-07 14:08:23 +0400162
Miguel Gaioead6db082010-10-27 15:33:18 -0700163 return ret;
164}
165
Bill Pemberton206210c2012-11-19 13:25:50 -0500166static int gen_74x164_remove(struct spi_device *spi)
Miguel Gaioead6db082010-10-27 15:33:18 -0700167{
Alexander Shiyanbcc05622013-12-07 14:08:23 +0400168 struct gen_74x164_chip *chip = spi_get_drvdata(spi);
Miguel Gaioead6db082010-10-27 15:33:18 -0700169
Fabio Estevam7ebc1942017-08-07 09:41:50 -0300170 gpiod_set_value_cansleep(chip->gpiod_oe, 0);
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200171 gpiochip_remove(&chip->gpio_chip);
172 mutex_destroy(&chip->lock);
Miguel Gaioead6db082010-10-27 15:33:18 -0700173
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200174 return 0;
Miguel Gaioead6db082010-10-27 15:33:18 -0700175}
176
Maxime Ripard0a90a9f2012-09-07 14:18:13 +0200177static const struct of_device_id gen_74x164_dt_ids[] = {
178 { .compatible = "fairchild,74hc595" },
Nicolas Saenz Julienne80018bd2016-03-14 23:32:10 +0000179 { .compatible = "nxp,74lvc594" },
Maxime Ripard0a90a9f2012-09-07 14:18:13 +0200180 {},
181};
182MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
183
Miguel Gaioead6db082010-10-27 15:33:18 -0700184static struct spi_driver gen_74x164_driver = {
185 .driver = {
H Hartley Sweetena3cc68c2011-05-27 16:35:59 -0700186 .name = "74x164",
Sachin Kamat187a53a2013-09-19 17:28:08 +0530187 .of_match_table = gen_74x164_dt_ids,
Miguel Gaioead6db082010-10-27 15:33:18 -0700188 },
189 .probe = gen_74x164_probe,
Bill Pemberton8283c4f2012-11-19 13:20:08 -0500190 .remove = gen_74x164_remove,
Miguel Gaioead6db082010-10-27 15:33:18 -0700191};
Maxime Ripardab3b8782012-09-05 10:40:50 +0200192module_spi_driver(gen_74x164_driver);
Miguel Gaioead6db082010-10-27 15:33:18 -0700193
194MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
195MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
196MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
197MODULE_LICENSE("GPL v2");