Andrew Lunn | 406a436 | 2019-04-27 19:32:56 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 2 | /* |
| 3 | * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips |
Lennert Buytenhek | e84665c | 2009-03-20 09:52:09 +0000 | [diff] [blame] | 4 | * Copyright (c) 2008-2009 Marvell Semiconductor |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 7 | #include <linux/delay.h> |
Vivien Didelot | 56c3ff9 | 2017-10-13 14:18:07 -0400 | [diff] [blame] | 8 | #include <linux/etherdevice.h> |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 9 | #include <linux/jiffies.h> |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 10 | #include <linux/list.h> |
Paul Gortmaker | 2bbba27 | 2012-01-24 10:41:40 +0000 | [diff] [blame] | 11 | #include <linux/module.h> |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 12 | #include <linux/netdevice.h> |
| 13 | #include <linux/phy.h> |
Ben Hutchings | c8f0b86 | 2011-11-27 17:06:08 +0000 | [diff] [blame] | 14 | #include <net/dsa.h> |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 15 | #include "mv88e6060.h" |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 16 | |
| 17 | static int reg_read(struct dsa_switch *ds, int addr, int reg) |
| 18 | { |
Vivien Didelot | 04bed14 | 2016-08-31 18:06:13 -0400 | [diff] [blame] | 19 | struct mv88e6060_priv *priv = ds->priv; |
Guenter Roeck | b184e49 | 2014-10-17 12:30:58 -0700 | [diff] [blame] | 20 | |
Andrew Lunn | a77d43f | 2016-04-13 02:40:42 +0200 | [diff] [blame] | 21 | return mdiobus_read_nested(priv->bus, priv->sw_addr + addr, reg); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 22 | } |
| 23 | |
| 24 | #define REG_READ(addr, reg) \ |
| 25 | ({ \ |
| 26 | int __ret; \ |
| 27 | \ |
| 28 | __ret = reg_read(ds, addr, reg); \ |
| 29 | if (__ret < 0) \ |
| 30 | return __ret; \ |
| 31 | __ret; \ |
| 32 | }) |
| 33 | |
| 34 | |
| 35 | static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) |
| 36 | { |
Vivien Didelot | 04bed14 | 2016-08-31 18:06:13 -0400 | [diff] [blame] | 37 | struct mv88e6060_priv *priv = ds->priv; |
Guenter Roeck | b184e49 | 2014-10-17 12:30:58 -0700 | [diff] [blame] | 38 | |
Andrew Lunn | a77d43f | 2016-04-13 02:40:42 +0200 | [diff] [blame] | 39 | return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 40 | } |
| 41 | |
| 42 | #define REG_WRITE(addr, reg, val) \ |
| 43 | ({ \ |
| 44 | int __ret; \ |
| 45 | \ |
| 46 | __ret = reg_write(ds, addr, reg, val); \ |
| 47 | if (__ret < 0) \ |
| 48 | return __ret; \ |
| 49 | }) |
| 50 | |
Vivien Didelot | 0209d14 | 2016-04-17 13:23:55 -0400 | [diff] [blame] | 51 | static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr) |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 52 | { |
| 53 | int ret; |
| 54 | |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 55 | ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 56 | if (ret >= 0) { |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 57 | if (ret == PORT_SWITCH_ID_6060) |
Guenter Roeck | 3de6aa4c | 2014-10-29 10:44:54 -0700 | [diff] [blame] | 58 | return "Marvell 88E6060 (A0)"; |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 59 | if (ret == PORT_SWITCH_ID_6060_R1 || |
| 60 | ret == PORT_SWITCH_ID_6060_R2) |
Guenter Roeck | 3de6aa4c | 2014-10-29 10:44:54 -0700 | [diff] [blame] | 61 | return "Marvell 88E6060 (B0)"; |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 62 | if ((ret & PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060) |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 63 | return "Marvell 88E6060"; |
| 64 | } |
| 65 | |
| 66 | return NULL; |
| 67 | } |
| 68 | |
Florian Fainelli | 5ed4e3e | 2017-11-10 15:22:52 -0800 | [diff] [blame] | 69 | static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds, |
| 70 | int port) |
Andrew Lunn | 7b31436 | 2016-08-22 16:01:01 +0200 | [diff] [blame] | 71 | { |
| 72 | return DSA_TAG_PROTO_TRAILER; |
| 73 | } |
| 74 | |
Vivien Didelot | 0209d14 | 2016-04-17 13:23:55 -0400 | [diff] [blame] | 75 | static const char *mv88e6060_drv_probe(struct device *dsa_dev, |
| 76 | struct device *host_dev, int sw_addr, |
| 77 | void **_priv) |
Andrew Lunn | a77d43f | 2016-04-13 02:40:42 +0200 | [diff] [blame] | 78 | { |
| 79 | struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev); |
| 80 | struct mv88e6060_priv *priv; |
Vivien Didelot | 0209d14 | 2016-04-17 13:23:55 -0400 | [diff] [blame] | 81 | const char *name; |
Andrew Lunn | a77d43f | 2016-04-13 02:40:42 +0200 | [diff] [blame] | 82 | |
| 83 | name = mv88e6060_get_name(bus, sw_addr); |
| 84 | if (name) { |
| 85 | priv = devm_kzalloc(dsa_dev, sizeof(*priv), GFP_KERNEL); |
| 86 | if (!priv) |
| 87 | return NULL; |
| 88 | *_priv = priv; |
| 89 | priv->bus = bus; |
| 90 | priv->sw_addr = sw_addr; |
| 91 | } |
| 92 | |
| 93 | return name; |
| 94 | } |
| 95 | |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 96 | static int mv88e6060_switch_reset(struct dsa_switch *ds) |
| 97 | { |
| 98 | int i; |
| 99 | int ret; |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 100 | unsigned long timeout; |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 101 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 102 | /* Set all ports to the disabled state. */ |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 103 | for (i = 0; i < MV88E6060_PORTS; i++) { |
| 104 | ret = REG_READ(REG_PORT(i), PORT_CONTROL); |
| 105 | REG_WRITE(REG_PORT(i), PORT_CONTROL, |
| 106 | ret & ~PORT_CONTROL_STATE_MASK); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 107 | } |
| 108 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 109 | /* Wait for transmit queues to drain. */ |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 110 | usleep_range(2000, 4000); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 111 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 112 | /* Reset the switch. */ |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 113 | REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL, |
| 114 | GLOBAL_ATU_CONTROL_SWRESET | |
Anderson Luiz Alves | a745156 | 2018-11-30 21:58:36 -0200 | [diff] [blame] | 115 | GLOBAL_ATU_CONTROL_LEARNDIS); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 116 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 117 | /* Wait up to one second for reset to complete. */ |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 118 | timeout = jiffies + 1 * HZ; |
| 119 | while (time_before(jiffies, timeout)) { |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 120 | ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS); |
| 121 | if (ret & GLOBAL_STATUS_INIT_READY) |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 122 | break; |
| 123 | |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 124 | usleep_range(1000, 2000); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 125 | } |
Barry Grussling | 19b2f97 | 2013-01-08 16:05:54 +0000 | [diff] [blame] | 126 | if (time_after(jiffies, timeout)) |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 127 | return -ETIMEDOUT; |
| 128 | |
| 129 | return 0; |
| 130 | } |
| 131 | |
| 132 | static int mv88e6060_setup_global(struct dsa_switch *ds) |
| 133 | { |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 134 | /* Disable discarding of frames with excessive collisions, |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 135 | * set the maximum frame size to 1536 bytes, and mask all |
| 136 | * interrupt sources. |
| 137 | */ |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 138 | REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, GLOBAL_CONTROL_MAX_FRAME_1536); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 139 | |
Anderson Luiz Alves | a745156 | 2018-11-30 21:58:36 -0200 | [diff] [blame] | 140 | /* Disable automatic address learning. |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 141 | */ |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 142 | REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL, |
Anderson Luiz Alves | a745156 | 2018-11-30 21:58:36 -0200 | [diff] [blame] | 143 | GLOBAL_ATU_CONTROL_LEARNDIS); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | |
| 148 | static int mv88e6060_setup_port(struct dsa_switch *ds, int p) |
| 149 | { |
| 150 | int addr = REG_PORT(p); |
| 151 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 152 | /* Do not force flow control, disable Ingress and Egress |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 153 | * Header tagging, disable VLAN tunneling, and set the port |
| 154 | * state to Forwarding. Additionally, if this is the CPU |
| 155 | * port, enable Ingress and Egress Trailer tagging mode. |
| 156 | */ |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 157 | REG_WRITE(addr, PORT_CONTROL, |
| 158 | dsa_is_cpu_port(ds, p) ? |
| 159 | PORT_CONTROL_TRAILER | |
| 160 | PORT_CONTROL_INGRESS_MODE | |
| 161 | PORT_CONTROL_STATE_FORWARDING : |
| 162 | PORT_CONTROL_STATE_FORWARDING); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 163 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 164 | /* Port based VLAN map: give each port its own address |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 165 | * database, allow the CPU port to talk to each of the 'real' |
| 166 | * ports, and allow each of the 'real' ports to only talk to |
| 167 | * the CPU port. |
| 168 | */ |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 169 | REG_WRITE(addr, PORT_VLAN_MAP, |
| 170 | ((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) | |
Vivien Didelot | 02bc6e5 | 2017-10-26 11:22:56 -0400 | [diff] [blame] | 171 | (dsa_is_cpu_port(ds, p) ? dsa_user_ports(ds) : |
| 172 | BIT(dsa_to_port(ds, p)->cpu_dp->index))); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 173 | |
Barry Grussling | 3675c8d | 2013-01-08 16:05:53 +0000 | [diff] [blame] | 174 | /* Port Association Vector: when learning source addresses |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 175 | * of packets, add the address to the address database using |
| 176 | * a port bitmap that has only the bit for this port set and |
| 177 | * the other bits clear. |
| 178 | */ |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 179 | REG_WRITE(addr, PORT_ASSOC_VECTOR, BIT(p)); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 180 | |
| 181 | return 0; |
| 182 | } |
| 183 | |
Vivien Didelot | 56c3ff9 | 2017-10-13 14:18:07 -0400 | [diff] [blame] | 184 | static int mv88e6060_setup_addr(struct dsa_switch *ds) |
| 185 | { |
| 186 | u8 addr[ETH_ALEN]; |
| 187 | u16 val; |
| 188 | |
| 189 | eth_random_addr(addr); |
| 190 | |
| 191 | val = addr[0] << 8 | addr[1]; |
| 192 | |
| 193 | /* The multicast bit is always transmitted as a zero, so the switch uses |
| 194 | * bit 8 for "DiffAddr", where 0 means all ports transmit the same SA. |
| 195 | */ |
| 196 | val &= 0xfeff; |
| 197 | |
| 198 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val); |
| 199 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]); |
| 200 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]); |
| 201 | |
| 202 | return 0; |
| 203 | } |
| 204 | |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 205 | static int mv88e6060_setup(struct dsa_switch *ds) |
| 206 | { |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 207 | int ret; |
Andrew Lunn | a77d43f | 2016-04-13 02:40:42 +0200 | [diff] [blame] | 208 | int i; |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 209 | |
| 210 | ret = mv88e6060_switch_reset(ds); |
| 211 | if (ret < 0) |
| 212 | return ret; |
| 213 | |
| 214 | /* @@@ initialise atu */ |
| 215 | |
| 216 | ret = mv88e6060_setup_global(ds); |
| 217 | if (ret < 0) |
| 218 | return ret; |
| 219 | |
Vivien Didelot | 56c3ff9 | 2017-10-13 14:18:07 -0400 | [diff] [blame] | 220 | ret = mv88e6060_setup_addr(ds); |
| 221 | if (ret < 0) |
| 222 | return ret; |
| 223 | |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 224 | for (i = 0; i < MV88E6060_PORTS; i++) { |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 225 | ret = mv88e6060_setup_port(ds, i); |
| 226 | if (ret < 0) |
| 227 | return ret; |
| 228 | } |
| 229 | |
| 230 | return 0; |
| 231 | } |
| 232 | |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 233 | static int mv88e6060_port_to_phy_addr(int port) |
| 234 | { |
Neil Armstrong | 6a4b298 | 2015-11-10 16:51:36 +0100 | [diff] [blame] | 235 | if (port >= 0 && port < MV88E6060_PORTS) |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 236 | return port; |
| 237 | return -1; |
| 238 | } |
| 239 | |
| 240 | static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum) |
| 241 | { |
| 242 | int addr; |
| 243 | |
| 244 | addr = mv88e6060_port_to_phy_addr(port); |
| 245 | if (addr == -1) |
| 246 | return 0xffff; |
| 247 | |
| 248 | return reg_read(ds, addr, regnum); |
| 249 | } |
| 250 | |
| 251 | static int |
| 252 | mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) |
| 253 | { |
| 254 | int addr; |
| 255 | |
| 256 | addr = mv88e6060_port_to_phy_addr(port); |
| 257 | if (addr == -1) |
| 258 | return 0xffff; |
| 259 | |
| 260 | return reg_write(ds, addr, regnum, val); |
| 261 | } |
| 262 | |
Florian Fainelli | a82f67a | 2017-01-08 14:52:08 -0800 | [diff] [blame] | 263 | static const struct dsa_switch_ops mv88e6060_switch_ops = { |
Andrew Lunn | 7b31436 | 2016-08-22 16:01:01 +0200 | [diff] [blame] | 264 | .get_tag_protocol = mv88e6060_get_tag_protocol, |
Andrew Lunn | e49bad3 | 2016-04-13 02:40:43 +0200 | [diff] [blame] | 265 | .probe = mv88e6060_drv_probe, |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 266 | .setup = mv88e6060_setup, |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 267 | .phy_read = mv88e6060_phy_read, |
| 268 | .phy_write = mv88e6060_phy_write, |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 269 | }; |
| 270 | |
Florian Fainelli | ab3d408 | 2017-01-08 14:52:07 -0800 | [diff] [blame] | 271 | static struct dsa_switch_driver mv88e6060_switch_drv = { |
| 272 | .ops = &mv88e6060_switch_ops, |
| 273 | }; |
| 274 | |
Roel Kluin | 5eaa65b | 2008-12-10 15:18:31 -0800 | [diff] [blame] | 275 | static int __init mv88e6060_init(void) |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 276 | { |
Florian Fainelli | ab3d408 | 2017-01-08 14:52:07 -0800 | [diff] [blame] | 277 | register_switch_driver(&mv88e6060_switch_drv); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 278 | return 0; |
| 279 | } |
| 280 | module_init(mv88e6060_init); |
| 281 | |
Roel Kluin | 5eaa65b | 2008-12-10 15:18:31 -0800 | [diff] [blame] | 282 | static void __exit mv88e6060_cleanup(void) |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 283 | { |
Florian Fainelli | ab3d408 | 2017-01-08 14:52:07 -0800 | [diff] [blame] | 284 | unregister_switch_driver(&mv88e6060_switch_drv); |
Lennert Buytenhek | 2e16a77 | 2008-10-07 13:46:22 +0000 | [diff] [blame] | 285 | } |
| 286 | module_exit(mv88e6060_cleanup); |
Ben Hutchings | 3d825ed | 2011-11-25 14:37:16 +0000 | [diff] [blame] | 287 | |
| 288 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>"); |
| 289 | MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip"); |
| 290 | MODULE_LICENSE("GPL"); |
| 291 | MODULE_ALIAS("platform:mv88e6060"); |