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Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
Andrew Lunnc6e970a2017-03-28 23:45:06 +020032#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000033#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000034#include <linux/interrupt.h>
35#include <linux/irqdomain.h>
36#include <linux/irq.h>
37#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000038#include <linux/microchipphy.h>
Russell King8c56ea42017-02-07 15:02:57 -080039#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000040#include "lan78xx.h"
41
42#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
43#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
44#define DRIVER_NAME "lan78xx"
Woojung Huh02dc1f32016-12-07 20:26:25 +000045#define DRIVER_VERSION "1.0.6"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000046
47#define TX_TIMEOUT_JIFFIES (5 * HZ)
48#define THROTTLE_JIFFIES (HZ / 8)
49#define UNLINK_TIMEOUT_MS 3
50
51#define RX_MAX_QUEUE_MEMORY (60 * 1518)
52
53#define SS_USB_PKT_SIZE (1024)
54#define HS_USB_PKT_SIZE (512)
55#define FS_USB_PKT_SIZE (64)
56
57#define MAX_RX_FIFO_SIZE (12 * 1024)
58#define MAX_TX_FIFO_SIZE (12 * 1024)
59#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
60#define DEFAULT_BULK_IN_DELAY (0x0800)
61#define MAX_SINGLE_PACKET_SIZE (9000)
62#define DEFAULT_TX_CSUM_ENABLE (true)
63#define DEFAULT_RX_CSUM_ENABLE (true)
64#define DEFAULT_TSO_CSUM_ENABLE (true)
65#define DEFAULT_VLAN_FILTER_ENABLE (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000066#define TX_OVERHEAD (8)
67#define RXW_PADDING 2
68
69#define LAN78XX_USB_VENDOR_ID (0x0424)
70#define LAN7800_USB_PRODUCT_ID (0x7800)
71#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000072#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000073#define LAN78XX_EEPROM_MAGIC (0x78A5)
74#define LAN78XX_OTP_MAGIC (0x78F3)
75
76#define MII_READ 1
77#define MII_WRITE 0
78
79#define EEPROM_INDICATOR (0xA5)
80#define EEPROM_MAC_OFFSET (0x01)
81#define MAX_EEPROM_SIZE 512
82#define OTP_INDICATOR_1 (0xF3)
83#define OTP_INDICATOR_2 (0xF7)
84
85#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
86 WAKE_MCAST | WAKE_BCAST | \
87 WAKE_ARP | WAKE_MAGIC)
88
89/* USB related defines */
90#define BULK_IN_PIPE 1
91#define BULK_OUT_PIPE 2
92
93/* default autosuspend delay (mSec)*/
94#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
95
Woojung Huh20ff5562016-03-16 22:10:40 +000096/* statistic update interval (mSec) */
97#define STAT_UPDATE_TIMER (1 * 1000)
98
Woojung Huhcc89c322016-11-01 20:02:00 +000099/* defines interrupts from interrupt EP */
100#define MAX_INT_EP (32)
101#define INT_EP_INTEP (31)
102#define INT_EP_OTP_WR_DONE (28)
103#define INT_EP_EEE_TX_LPI_START (26)
104#define INT_EP_EEE_TX_LPI_STOP (25)
105#define INT_EP_EEE_RX_LPI (24)
106#define INT_EP_MAC_RESET_TIMEOUT (23)
107#define INT_EP_RDFO (22)
108#define INT_EP_TXE (21)
109#define INT_EP_USB_STATUS (20)
110#define INT_EP_TX_DIS (19)
111#define INT_EP_RX_DIS (18)
112#define INT_EP_PHY (17)
113#define INT_EP_DP (16)
114#define INT_EP_MAC_ERR (15)
115#define INT_EP_TDFU (14)
116#define INT_EP_TDFO (13)
117#define INT_EP_UTX (12)
118#define INT_EP_GPIO_11 (11)
119#define INT_EP_GPIO_10 (10)
120#define INT_EP_GPIO_9 (9)
121#define INT_EP_GPIO_8 (8)
122#define INT_EP_GPIO_7 (7)
123#define INT_EP_GPIO_6 (6)
124#define INT_EP_GPIO_5 (5)
125#define INT_EP_GPIO_4 (4)
126#define INT_EP_GPIO_3 (3)
127#define INT_EP_GPIO_2 (2)
128#define INT_EP_GPIO_1 (1)
129#define INT_EP_GPIO_0 (0)
130
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000131static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
132 "RX FCS Errors",
133 "RX Alignment Errors",
134 "Rx Fragment Errors",
135 "RX Jabber Errors",
136 "RX Undersize Frame Errors",
137 "RX Oversize Frame Errors",
138 "RX Dropped Frames",
139 "RX Unicast Byte Count",
140 "RX Broadcast Byte Count",
141 "RX Multicast Byte Count",
142 "RX Unicast Frames",
143 "RX Broadcast Frames",
144 "RX Multicast Frames",
145 "RX Pause Frames",
146 "RX 64 Byte Frames",
147 "RX 65 - 127 Byte Frames",
148 "RX 128 - 255 Byte Frames",
149 "RX 256 - 511 Bytes Frames",
150 "RX 512 - 1023 Byte Frames",
151 "RX 1024 - 1518 Byte Frames",
152 "RX Greater 1518 Byte Frames",
153 "EEE RX LPI Transitions",
154 "EEE RX LPI Time",
155 "TX FCS Errors",
156 "TX Excess Deferral Errors",
157 "TX Carrier Errors",
158 "TX Bad Byte Count",
159 "TX Single Collisions",
160 "TX Multiple Collisions",
161 "TX Excessive Collision",
162 "TX Late Collisions",
163 "TX Unicast Byte Count",
164 "TX Broadcast Byte Count",
165 "TX Multicast Byte Count",
166 "TX Unicast Frames",
167 "TX Broadcast Frames",
168 "TX Multicast Frames",
169 "TX Pause Frames",
170 "TX 64 Byte Frames",
171 "TX 65 - 127 Byte Frames",
172 "TX 128 - 255 Byte Frames",
173 "TX 256 - 511 Bytes Frames",
174 "TX 512 - 1023 Byte Frames",
175 "TX 1024 - 1518 Byte Frames",
176 "TX Greater 1518 Byte Frames",
177 "EEE TX LPI Transitions",
178 "EEE TX LPI Time",
179};
180
181struct lan78xx_statstage {
182 u32 rx_fcs_errors;
183 u32 rx_alignment_errors;
184 u32 rx_fragment_errors;
185 u32 rx_jabber_errors;
186 u32 rx_undersize_frame_errors;
187 u32 rx_oversize_frame_errors;
188 u32 rx_dropped_frames;
189 u32 rx_unicast_byte_count;
190 u32 rx_broadcast_byte_count;
191 u32 rx_multicast_byte_count;
192 u32 rx_unicast_frames;
193 u32 rx_broadcast_frames;
194 u32 rx_multicast_frames;
195 u32 rx_pause_frames;
196 u32 rx_64_byte_frames;
197 u32 rx_65_127_byte_frames;
198 u32 rx_128_255_byte_frames;
199 u32 rx_256_511_bytes_frames;
200 u32 rx_512_1023_byte_frames;
201 u32 rx_1024_1518_byte_frames;
202 u32 rx_greater_1518_byte_frames;
203 u32 eee_rx_lpi_transitions;
204 u32 eee_rx_lpi_time;
205 u32 tx_fcs_errors;
206 u32 tx_excess_deferral_errors;
207 u32 tx_carrier_errors;
208 u32 tx_bad_byte_count;
209 u32 tx_single_collisions;
210 u32 tx_multiple_collisions;
211 u32 tx_excessive_collision;
212 u32 tx_late_collisions;
213 u32 tx_unicast_byte_count;
214 u32 tx_broadcast_byte_count;
215 u32 tx_multicast_byte_count;
216 u32 tx_unicast_frames;
217 u32 tx_broadcast_frames;
218 u32 tx_multicast_frames;
219 u32 tx_pause_frames;
220 u32 tx_64_byte_frames;
221 u32 tx_65_127_byte_frames;
222 u32 tx_128_255_byte_frames;
223 u32 tx_256_511_bytes_frames;
224 u32 tx_512_1023_byte_frames;
225 u32 tx_1024_1518_byte_frames;
226 u32 tx_greater_1518_byte_frames;
227 u32 eee_tx_lpi_transitions;
228 u32 eee_tx_lpi_time;
229};
230
Woojung Huh20ff5562016-03-16 22:10:40 +0000231struct lan78xx_statstage64 {
232 u64 rx_fcs_errors;
233 u64 rx_alignment_errors;
234 u64 rx_fragment_errors;
235 u64 rx_jabber_errors;
236 u64 rx_undersize_frame_errors;
237 u64 rx_oversize_frame_errors;
238 u64 rx_dropped_frames;
239 u64 rx_unicast_byte_count;
240 u64 rx_broadcast_byte_count;
241 u64 rx_multicast_byte_count;
242 u64 rx_unicast_frames;
243 u64 rx_broadcast_frames;
244 u64 rx_multicast_frames;
245 u64 rx_pause_frames;
246 u64 rx_64_byte_frames;
247 u64 rx_65_127_byte_frames;
248 u64 rx_128_255_byte_frames;
249 u64 rx_256_511_bytes_frames;
250 u64 rx_512_1023_byte_frames;
251 u64 rx_1024_1518_byte_frames;
252 u64 rx_greater_1518_byte_frames;
253 u64 eee_rx_lpi_transitions;
254 u64 eee_rx_lpi_time;
255 u64 tx_fcs_errors;
256 u64 tx_excess_deferral_errors;
257 u64 tx_carrier_errors;
258 u64 tx_bad_byte_count;
259 u64 tx_single_collisions;
260 u64 tx_multiple_collisions;
261 u64 tx_excessive_collision;
262 u64 tx_late_collisions;
263 u64 tx_unicast_byte_count;
264 u64 tx_broadcast_byte_count;
265 u64 tx_multicast_byte_count;
266 u64 tx_unicast_frames;
267 u64 tx_broadcast_frames;
268 u64 tx_multicast_frames;
269 u64 tx_pause_frames;
270 u64 tx_64_byte_frames;
271 u64 tx_65_127_byte_frames;
272 u64 tx_128_255_byte_frames;
273 u64 tx_256_511_bytes_frames;
274 u64 tx_512_1023_byte_frames;
275 u64 tx_1024_1518_byte_frames;
276 u64 tx_greater_1518_byte_frames;
277 u64 eee_tx_lpi_transitions;
278 u64 eee_tx_lpi_time;
279};
280
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000281struct lan78xx_net;
282
283struct lan78xx_priv {
284 struct lan78xx_net *dev;
285 u32 rfe_ctl;
286 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
287 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
288 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
289 struct mutex dataport_mutex; /* for dataport access */
290 spinlock_t rfe_ctl_lock; /* for rfe register access */
291 struct work_struct set_multicast;
292 struct work_struct set_vlan;
293 u32 wol;
294};
295
296enum skb_state {
297 illegal = 0,
298 tx_start,
299 tx_done,
300 rx_start,
301 rx_done,
302 rx_cleanup,
303 unlink_start
304};
305
306struct skb_data { /* skb->cb is one of these */
307 struct urb *urb;
308 struct lan78xx_net *dev;
309 enum skb_state state;
310 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000311 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000312};
313
314struct usb_context {
315 struct usb_ctrlrequest req;
316 struct lan78xx_net *dev;
317};
318
319#define EVENT_TX_HALT 0
320#define EVENT_RX_HALT 1
321#define EVENT_RX_MEMORY 2
322#define EVENT_STS_SPLIT 3
323#define EVENT_LINK_RESET 4
324#define EVENT_RX_PAUSED 5
325#define EVENT_DEV_WAKING 6
326#define EVENT_DEV_ASLEEP 7
327#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000328#define EVENT_STAT_UPDATE 9
329
330struct statstage {
331 struct mutex access_lock; /* for stats access */
332 struct lan78xx_statstage saved;
333 struct lan78xx_statstage rollover_count;
334 struct lan78xx_statstage rollover_max;
335 struct lan78xx_statstage64 curr_stat;
336};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000337
Woojung Huhcc89c322016-11-01 20:02:00 +0000338struct irq_domain_data {
339 struct irq_domain *irqdomain;
340 unsigned int phyirq;
341 struct irq_chip *irqchip;
342 irq_flow_handler_t irq_handler;
343 u32 irqenable;
344 struct mutex irq_lock; /* for irq bus access */
345};
346
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000347struct lan78xx_net {
348 struct net_device *net;
349 struct usb_device *udev;
350 struct usb_interface *intf;
351 void *driver_priv;
352
353 int rx_qlen;
354 int tx_qlen;
355 struct sk_buff_head rxq;
356 struct sk_buff_head txq;
357 struct sk_buff_head done;
358 struct sk_buff_head rxq_pause;
359 struct sk_buff_head txq_pend;
360
361 struct tasklet_struct bh;
362 struct delayed_work wq;
363
364 struct usb_host_endpoint *ep_blkin;
365 struct usb_host_endpoint *ep_blkout;
366 struct usb_host_endpoint *ep_intr;
367
368 int msg_enable;
369
370 struct urb *urb_intr;
371 struct usb_anchor deferred;
372
373 struct mutex phy_mutex; /* for phy access */
374 unsigned pipe_in, pipe_out, pipe_intr;
375
376 u32 hard_mtu; /* count any extra framing */
377 size_t rx_urb_size; /* size for rx urbs */
378
379 unsigned long flags;
380
381 wait_queue_head_t *wait;
382 unsigned char suspend_count;
383
384 unsigned maxpacket;
385 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000386 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000387
388 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000389
390 int link_on;
391 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000392
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000393 u32 chipid;
394 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000395 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000396 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000397
398 int fc_autoneg;
399 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000400
401 int delta;
402 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000403
404 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000405};
406
Woojung Huh02dc1f32016-12-07 20:26:25 +0000407/* define external phy id */
408#define PHY_LAN8835 (0x0007C130)
409#define PHY_KSZ9031RNX (0x00221620)
410
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000411/* use ethtool to change the level for any given device */
412static int msg_level = -1;
413module_param(msg_level, int, 0);
414MODULE_PARM_DESC(msg_level, "Override default message level");
415
416static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
417{
418 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
419 int ret;
420
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000421 if (!buf)
422 return -ENOMEM;
423
424 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
425 USB_VENDOR_REQUEST_READ_REGISTER,
426 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
427 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
428 if (likely(ret >= 0)) {
429 le32_to_cpus(buf);
430 *data = *buf;
431 } else {
432 netdev_warn(dev->net,
433 "Failed to read register index 0x%08x. ret = %d",
434 index, ret);
435 }
436
437 kfree(buf);
438
439 return ret;
440}
441
442static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
443{
444 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
445 int ret;
446
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000447 if (!buf)
448 return -ENOMEM;
449
450 *buf = data;
451 cpu_to_le32s(buf);
452
453 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
454 USB_VENDOR_REQUEST_WRITE_REGISTER,
455 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
456 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
457 if (unlikely(ret < 0)) {
458 netdev_warn(dev->net,
459 "Failed to write register index 0x%08x. ret = %d",
460 index, ret);
461 }
462
463 kfree(buf);
464
465 return ret;
466}
467
468static int lan78xx_read_stats(struct lan78xx_net *dev,
469 struct lan78xx_statstage *data)
470{
471 int ret = 0;
472 int i;
473 struct lan78xx_statstage *stats;
474 u32 *src;
475 u32 *dst;
476
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000477 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
478 if (!stats)
479 return -ENOMEM;
480
481 ret = usb_control_msg(dev->udev,
482 usb_rcvctrlpipe(dev->udev, 0),
483 USB_VENDOR_REQUEST_GET_STATS,
484 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
485 0,
486 0,
487 (void *)stats,
488 sizeof(*stats),
489 USB_CTRL_SET_TIMEOUT);
490 if (likely(ret >= 0)) {
491 src = (u32 *)stats;
492 dst = (u32 *)data;
493 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
494 le32_to_cpus(&src[i]);
495 dst[i] = src[i];
496 }
497 } else {
498 netdev_warn(dev->net,
499 "Failed to read stat ret = 0x%x", ret);
500 }
501
502 kfree(stats);
503
504 return ret;
505}
506
Woojung Huh20ff5562016-03-16 22:10:40 +0000507#define check_counter_rollover(struct1, dev_stats, member) { \
508 if (struct1->member < dev_stats.saved.member) \
509 dev_stats.rollover_count.member++; \
510 }
511
512static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
513 struct lan78xx_statstage *stats)
514{
515 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
516 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
517 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
518 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
519 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
520 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
521 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
522 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
523 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
524 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
525 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
526 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
527 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
528 check_counter_rollover(stats, dev->stats, rx_pause_frames);
529 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
530 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
531 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
532 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
533 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
534 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
535 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
536 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
537 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
538 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
539 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
540 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
541 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
542 check_counter_rollover(stats, dev->stats, tx_single_collisions);
543 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
544 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
545 check_counter_rollover(stats, dev->stats, tx_late_collisions);
546 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
547 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
548 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
549 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
550 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
551 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
552 check_counter_rollover(stats, dev->stats, tx_pause_frames);
553 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
554 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
555 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
556 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
557 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
558 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
559 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
560 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
561 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
562
563 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
564}
565
566static void lan78xx_update_stats(struct lan78xx_net *dev)
567{
568 u32 *p, *count, *max;
569 u64 *data;
570 int i;
571 struct lan78xx_statstage lan78xx_stats;
572
573 if (usb_autopm_get_interface(dev->intf) < 0)
574 return;
575
576 p = (u32 *)&lan78xx_stats;
577 count = (u32 *)&dev->stats.rollover_count;
578 max = (u32 *)&dev->stats.rollover_max;
579 data = (u64 *)&dev->stats.curr_stat;
580
581 mutex_lock(&dev->stats.access_lock);
582
583 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
584 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
585
586 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
587 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
588
589 mutex_unlock(&dev->stats.access_lock);
590
591 usb_autopm_put_interface(dev->intf);
592}
593
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000594/* Loop until the read is completed with timeout called with phy_mutex held */
595static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
596{
597 unsigned long start_time = jiffies;
598 u32 val;
599 int ret;
600
601 do {
602 ret = lan78xx_read_reg(dev, MII_ACC, &val);
603 if (unlikely(ret < 0))
604 return -EIO;
605
606 if (!(val & MII_ACC_MII_BUSY_))
607 return 0;
608 } while (!time_after(jiffies, start_time + HZ));
609
610 return -EIO;
611}
612
613static inline u32 mii_access(int id, int index, int read)
614{
615 u32 ret;
616
617 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
618 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
619 if (read)
620 ret |= MII_ACC_MII_READ_;
621 else
622 ret |= MII_ACC_MII_WRITE_;
623 ret |= MII_ACC_MII_BUSY_;
624
625 return ret;
626}
627
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000628static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
629{
630 unsigned long start_time = jiffies;
631 u32 val;
632 int ret;
633
634 do {
635 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
636 if (unlikely(ret < 0))
637 return -EIO;
638
639 if (!(val & E2P_CMD_EPC_BUSY_) ||
640 (val & E2P_CMD_EPC_TIMEOUT_))
641 break;
642 usleep_range(40, 100);
643 } while (!time_after(jiffies, start_time + HZ));
644
645 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
646 netdev_warn(dev->net, "EEPROM read operation timeout");
647 return -EIO;
648 }
649
650 return 0;
651}
652
653static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
654{
655 unsigned long start_time = jiffies;
656 u32 val;
657 int ret;
658
659 do {
660 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
661 if (unlikely(ret < 0))
662 return -EIO;
663
664 if (!(val & E2P_CMD_EPC_BUSY_))
665 return 0;
666
667 usleep_range(40, 100);
668 } while (!time_after(jiffies, start_time + HZ));
669
670 netdev_warn(dev->net, "EEPROM is busy");
671 return -EIO;
672}
673
674static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
675 u32 length, u8 *data)
676{
677 u32 val;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000678 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000679 int i, ret;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000680 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000681
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000682 /* depends on chip, some EEPROM pins are muxed with LED function.
683 * disable & restore LED function to access EEPROM.
684 */
685 ret = lan78xx_read_reg(dev, HW_CFG, &val);
686 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000687 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000688 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
689 ret = lan78xx_write_reg(dev, HW_CFG, val);
690 }
691
692 retval = lan78xx_eeprom_confirm_not_busy(dev);
693 if (retval)
694 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000695
696 for (i = 0; i < length; i++) {
697 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
698 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
699 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000700 if (unlikely(ret < 0)) {
701 retval = -EIO;
702 goto exit;
703 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000704
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000705 retval = lan78xx_wait_eeprom(dev);
706 if (retval < 0)
707 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000708
709 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000710 if (unlikely(ret < 0)) {
711 retval = -EIO;
712 goto exit;
713 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000714
715 data[i] = val & 0xFF;
716 offset++;
717 }
718
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000719 retval = 0;
720exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000721 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000722 ret = lan78xx_write_reg(dev, HW_CFG, saved);
723
724 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000725}
726
727static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
728 u32 length, u8 *data)
729{
730 u8 sig;
731 int ret;
732
733 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
734 if ((ret == 0) && (sig == EEPROM_INDICATOR))
735 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
736 else
737 ret = -EINVAL;
738
739 return ret;
740}
741
742static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
743 u32 length, u8 *data)
744{
745 u32 val;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000746 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000747 int i, ret;
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000748 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000749
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000750 /* depends on chip, some EEPROM pins are muxed with LED function.
751 * disable & restore LED function to access EEPROM.
752 */
753 ret = lan78xx_read_reg(dev, HW_CFG, &val);
754 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000755 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000756 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
757 ret = lan78xx_write_reg(dev, HW_CFG, val);
758 }
759
760 retval = lan78xx_eeprom_confirm_not_busy(dev);
761 if (retval)
762 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000763
764 /* Issue write/erase enable command */
765 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
766 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000767 if (unlikely(ret < 0)) {
768 retval = -EIO;
769 goto exit;
770 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000771
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000772 retval = lan78xx_wait_eeprom(dev);
773 if (retval < 0)
774 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000775
776 for (i = 0; i < length; i++) {
777 /* Fill data register */
778 val = data[i];
779 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000780 if (ret < 0) {
781 retval = -EIO;
782 goto exit;
783 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000784
785 /* Send "write" command */
786 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
787 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
788 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000789 if (ret < 0) {
790 retval = -EIO;
791 goto exit;
792 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000793
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000794 retval = lan78xx_wait_eeprom(dev);
795 if (retval < 0)
796 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000797
798 offset++;
799 }
800
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000801 retval = 0;
802exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000803 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d102016-01-27 22:57:53 +0000804 ret = lan78xx_write_reg(dev, HW_CFG, saved);
805
806 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000807}
808
809static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
810 u32 length, u8 *data)
811{
812 int i;
813 int ret;
814 u32 buf;
815 unsigned long timeout;
816
817 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
818
819 if (buf & OTP_PWR_DN_PWRDN_N_) {
820 /* clear it and wait to be cleared */
821 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
822
823 timeout = jiffies + HZ;
824 do {
825 usleep_range(1, 10);
826 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
827 if (time_after(jiffies, timeout)) {
828 netdev_warn(dev->net,
829 "timeout on OTP_PWR_DN");
830 return -EIO;
831 }
832 } while (buf & OTP_PWR_DN_PWRDN_N_);
833 }
834
835 for (i = 0; i < length; i++) {
836 ret = lan78xx_write_reg(dev, OTP_ADDR1,
837 ((offset + i) >> 8) & OTP_ADDR1_15_11);
838 ret = lan78xx_write_reg(dev, OTP_ADDR2,
839 ((offset + i) & OTP_ADDR2_10_3));
840
841 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
842 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
843
844 timeout = jiffies + HZ;
845 do {
846 udelay(1);
847 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
848 if (time_after(jiffies, timeout)) {
849 netdev_warn(dev->net,
850 "timeout on OTP_STATUS");
851 return -EIO;
852 }
853 } while (buf & OTP_STATUS_BUSY_);
854
855 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
856
857 data[i] = (u8)(buf & 0xFF);
858 }
859
860 return 0;
861}
862
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000863static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
864 u32 length, u8 *data)
865{
866 int i;
867 int ret;
868 u32 buf;
869 unsigned long timeout;
870
871 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
872
873 if (buf & OTP_PWR_DN_PWRDN_N_) {
874 /* clear it and wait to be cleared */
875 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
876
877 timeout = jiffies + HZ;
878 do {
879 udelay(1);
880 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
881 if (time_after(jiffies, timeout)) {
882 netdev_warn(dev->net,
883 "timeout on OTP_PWR_DN completion");
884 return -EIO;
885 }
886 } while (buf & OTP_PWR_DN_PWRDN_N_);
887 }
888
889 /* set to BYTE program mode */
890 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
891
892 for (i = 0; i < length; i++) {
893 ret = lan78xx_write_reg(dev, OTP_ADDR1,
894 ((offset + i) >> 8) & OTP_ADDR1_15_11);
895 ret = lan78xx_write_reg(dev, OTP_ADDR2,
896 ((offset + i) & OTP_ADDR2_10_3));
897 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
898 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
899 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
900
901 timeout = jiffies + HZ;
902 do {
903 udelay(1);
904 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
905 if (time_after(jiffies, timeout)) {
906 netdev_warn(dev->net,
907 "Timeout on OTP_STATUS completion");
908 return -EIO;
909 }
910 } while (buf & OTP_STATUS_BUSY_);
911 }
912
913 return 0;
914}
915
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000916static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
917 u32 length, u8 *data)
918{
919 u8 sig;
920 int ret;
921
922 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
923
924 if (ret == 0) {
925 if (sig == OTP_INDICATOR_1)
926 offset = offset;
927 else if (sig == OTP_INDICATOR_2)
928 offset += 0x100;
929 else
930 ret = -EINVAL;
931 ret = lan78xx_read_raw_otp(dev, offset, length, data);
932 }
933
934 return ret;
935}
936
937static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
938{
939 int i, ret;
940
941 for (i = 0; i < 100; i++) {
942 u32 dp_sel;
943
944 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
945 if (unlikely(ret < 0))
946 return -EIO;
947
948 if (dp_sel & DP_SEL_DPRDY_)
949 return 0;
950
951 usleep_range(40, 100);
952 }
953
954 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
955
956 return -EIO;
957}
958
959static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
960 u32 addr, u32 length, u32 *buf)
961{
962 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
963 u32 dp_sel;
964 int i, ret;
965
966 if (usb_autopm_get_interface(dev->intf) < 0)
967 return 0;
968
969 mutex_lock(&pdata->dataport_mutex);
970
971 ret = lan78xx_dataport_wait_not_busy(dev);
972 if (ret < 0)
973 goto done;
974
975 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
976
977 dp_sel &= ~DP_SEL_RSEL_MASK_;
978 dp_sel |= ram_select;
979 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
980
981 for (i = 0; i < length; i++) {
982 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
983
984 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
985
986 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
987
988 ret = lan78xx_dataport_wait_not_busy(dev);
989 if (ret < 0)
990 goto done;
991 }
992
993done:
994 mutex_unlock(&pdata->dataport_mutex);
995 usb_autopm_put_interface(dev->intf);
996
997 return ret;
998}
999
1000static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1001 int index, u8 addr[ETH_ALEN])
1002{
1003 u32 temp;
1004
1005 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1006 temp = addr[3];
1007 temp = addr[2] | (temp << 8);
1008 temp = addr[1] | (temp << 8);
1009 temp = addr[0] | (temp << 8);
1010 pdata->pfilter_table[index][1] = temp;
1011 temp = addr[5];
1012 temp = addr[4] | (temp << 8);
1013 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1014 pdata->pfilter_table[index][0] = temp;
1015 }
1016}
1017
1018/* returns hash bit number for given MAC address */
1019static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1020{
1021 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1022}
1023
1024static void lan78xx_deferred_multicast_write(struct work_struct *param)
1025{
1026 struct lan78xx_priv *pdata =
1027 container_of(param, struct lan78xx_priv, set_multicast);
1028 struct lan78xx_net *dev = pdata->dev;
1029 int i;
1030 int ret;
1031
1032 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1033 pdata->rfe_ctl);
1034
1035 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1036 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1037
1038 for (i = 1; i < NUM_OF_MAF; i++) {
1039 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1040 ret = lan78xx_write_reg(dev, MAF_LO(i),
1041 pdata->pfilter_table[i][1]);
1042 ret = lan78xx_write_reg(dev, MAF_HI(i),
1043 pdata->pfilter_table[i][0]);
1044 }
1045
1046 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1047}
1048
1049static void lan78xx_set_multicast(struct net_device *netdev)
1050{
1051 struct lan78xx_net *dev = netdev_priv(netdev);
1052 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1053 unsigned long flags;
1054 int i;
1055
1056 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1057
1058 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1059 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1060
1061 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1062 pdata->mchash_table[i] = 0;
1063 /* pfilter_table[0] has own HW address */
1064 for (i = 1; i < NUM_OF_MAF; i++) {
1065 pdata->pfilter_table[i][0] =
1066 pdata->pfilter_table[i][1] = 0;
1067 }
1068
1069 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1070
1071 if (dev->net->flags & IFF_PROMISC) {
1072 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1073 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1074 } else {
1075 if (dev->net->flags & IFF_ALLMULTI) {
1076 netif_dbg(dev, drv, dev->net,
1077 "receive all multicast enabled");
1078 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1079 }
1080 }
1081
1082 if (netdev_mc_count(dev->net)) {
1083 struct netdev_hw_addr *ha;
1084 int i;
1085
1086 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1087
1088 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1089
1090 i = 1;
1091 netdev_for_each_mc_addr(ha, netdev) {
1092 /* set first 32 into Perfect Filter */
1093 if (i < 33) {
1094 lan78xx_set_addr_filter(pdata, i, ha->addr);
1095 } else {
1096 u32 bitnum = lan78xx_hash(ha->addr);
1097
1098 pdata->mchash_table[bitnum / 32] |=
1099 (1 << (bitnum % 32));
1100 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1101 }
1102 i++;
1103 }
1104 }
1105
1106 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1107
1108 /* defer register writes to a sleepable context */
1109 schedule_work(&pdata->set_multicast);
1110}
1111
1112static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1113 u16 lcladv, u16 rmtadv)
1114{
1115 u32 flow = 0, fct_flow = 0;
1116 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001117 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001118
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001119 if (dev->fc_autoneg)
1120 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1121 else
1122 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001123
1124 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001125 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001126
1127 if (cap & FLOW_CTRL_RX)
1128 flow |= FLOW_CR_RX_FCEN_;
1129
1130 if (dev->udev->speed == USB_SPEED_SUPER)
1131 fct_flow = 0x817;
1132 else if (dev->udev->speed == USB_SPEED_HIGH)
1133 fct_flow = 0x211;
1134
1135 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1136 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1137 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1138
1139 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1140
1141 /* threshold value should be set before enabling flow */
1142 ret = lan78xx_write_reg(dev, FLOW, flow);
1143
1144 return 0;
1145}
1146
1147static int lan78xx_link_reset(struct lan78xx_net *dev)
1148{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001149 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001150 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001151 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001152 u32 buf;
1153
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001154 /* clear LAN78xx interrupt status */
1155 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1156 if (unlikely(ret < 0))
1157 return -EIO;
1158
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001159 phy_read_status(phydev);
1160
1161 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001162 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001163
1164 /* reset MAC */
1165 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1166 if (unlikely(ret < 0))
1167 return -EIO;
1168 buf |= MAC_CR_RST_;
1169 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1170 if (unlikely(ret < 0))
1171 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001172
Woojung Huh20ff5562016-03-16 22:10:40 +00001173 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001174 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001175 dev->link_on = true;
1176
Philippe Reynes6e765102016-10-09 12:07:04 +02001177 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001178
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001179 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001180 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001181 /* disable U2 */
1182 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1183 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1184 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1185 /* enable U1 */
1186 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1187 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1188 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1189 } else {
1190 /* enable U1 & U2 */
1191 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1192 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1193 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1194 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1195 }
1196 }
1197
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001198 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001199 if (ladv < 0)
1200 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001201
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001202 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001203 if (radv < 0)
1204 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001205
1206 netif_dbg(dev, link, dev->net,
1207 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001208 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001209
Philippe Reynes6e765102016-10-09 12:07:04 +02001210 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1211 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001212
1213 if (!timer_pending(&dev->stat_monitor)) {
1214 dev->delta = 1;
1215 mod_timer(&dev->stat_monitor,
1216 jiffies + STAT_UPDATE_TIMER);
1217 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001218 }
1219
1220 return ret;
1221}
1222
1223/* some work can't be done in tasklets, so we use keventd
1224 *
1225 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1226 * but tasklet_schedule() doesn't. hope the failure is rare.
1227 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001228static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001229{
1230 set_bit(work, &dev->flags);
1231 if (!schedule_delayed_work(&dev->wq, 0))
1232 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1233}
1234
1235static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1236{
1237 u32 intdata;
1238
1239 if (urb->actual_length != 4) {
1240 netdev_warn(dev->net,
1241 "unexpected urb length %d", urb->actual_length);
1242 return;
1243 }
1244
1245 memcpy(&intdata, urb->transfer_buffer, 4);
1246 le32_to_cpus(&intdata);
1247
1248 if (intdata & INT_ENP_PHY_INT) {
1249 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001250 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1251
1252 if (dev->domain_data.phyirq > 0)
1253 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001254 } else
1255 netdev_warn(dev->net,
1256 "unexpected interrupt: 0x%08x\n", intdata);
1257}
1258
1259static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1260{
1261 return MAX_EEPROM_SIZE;
1262}
1263
1264static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1265 struct ethtool_eeprom *ee, u8 *data)
1266{
1267 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301268 int ret;
1269
1270 ret = usb_autopm_get_interface(dev->intf);
1271 if (ret)
1272 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001273
1274 ee->magic = LAN78XX_EEPROM_MAGIC;
1275
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301276 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1277
1278 usb_autopm_put_interface(dev->intf);
1279
1280 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001281}
1282
1283static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1284 struct ethtool_eeprom *ee, u8 *data)
1285{
1286 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301287 int ret;
1288
1289 ret = usb_autopm_get_interface(dev->intf);
1290 if (ret)
1291 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001292
Nisar Sayedc0776822017-09-21 02:36:37 +05301293 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1294 * to load data from EEPROM
1295 */
1296 if (ee->magic == LAN78XX_EEPROM_MAGIC)
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301297 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001298 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1299 (ee->offset == 0) &&
1300 (ee->len == 512) &&
1301 (data[0] == OTP_INDICATOR_1))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301302 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001303
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301304 usb_autopm_put_interface(dev->intf);
1305
1306 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001307}
1308
1309static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1310 u8 *data)
1311{
1312 if (stringset == ETH_SS_STATS)
1313 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1314}
1315
1316static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1317{
1318 if (sset == ETH_SS_STATS)
1319 return ARRAY_SIZE(lan78xx_gstrings);
1320 else
1321 return -EOPNOTSUPP;
1322}
1323
1324static void lan78xx_get_stats(struct net_device *netdev,
1325 struct ethtool_stats *stats, u64 *data)
1326{
1327 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001328
Woojung Huh20ff5562016-03-16 22:10:40 +00001329 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001330
Woojung Huh20ff5562016-03-16 22:10:40 +00001331 mutex_lock(&dev->stats.access_lock);
1332 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1333 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001334}
1335
1336static void lan78xx_get_wol(struct net_device *netdev,
1337 struct ethtool_wolinfo *wol)
1338{
1339 struct lan78xx_net *dev = netdev_priv(netdev);
1340 int ret;
1341 u32 buf;
1342 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1343
1344 if (usb_autopm_get_interface(dev->intf) < 0)
1345 return;
1346
1347 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1348 if (unlikely(ret < 0)) {
1349 wol->supported = 0;
1350 wol->wolopts = 0;
1351 } else {
1352 if (buf & USB_CFG_RMT_WKP_) {
1353 wol->supported = WAKE_ALL;
1354 wol->wolopts = pdata->wol;
1355 } else {
1356 wol->supported = 0;
1357 wol->wolopts = 0;
1358 }
1359 }
1360
1361 usb_autopm_put_interface(dev->intf);
1362}
1363
1364static int lan78xx_set_wol(struct net_device *netdev,
1365 struct ethtool_wolinfo *wol)
1366{
1367 struct lan78xx_net *dev = netdev_priv(netdev);
1368 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1369 int ret;
1370
1371 ret = usb_autopm_get_interface(dev->intf);
1372 if (ret < 0)
1373 return ret;
1374
1375 pdata->wol = 0;
1376 if (wol->wolopts & WAKE_UCAST)
1377 pdata->wol |= WAKE_UCAST;
1378 if (wol->wolopts & WAKE_MCAST)
1379 pdata->wol |= WAKE_MCAST;
1380 if (wol->wolopts & WAKE_BCAST)
1381 pdata->wol |= WAKE_BCAST;
1382 if (wol->wolopts & WAKE_MAGIC)
1383 pdata->wol |= WAKE_MAGIC;
1384 if (wol->wolopts & WAKE_PHY)
1385 pdata->wol |= WAKE_PHY;
1386 if (wol->wolopts & WAKE_ARP)
1387 pdata->wol |= WAKE_ARP;
1388
1389 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1390
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001391 phy_ethtool_set_wol(netdev->phydev, wol);
1392
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001393 usb_autopm_put_interface(dev->intf);
1394
1395 return ret;
1396}
1397
1398static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1399{
1400 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001401 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001402 int ret;
1403 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001404
1405 ret = usb_autopm_get_interface(dev->intf);
1406 if (ret < 0)
1407 return ret;
1408
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001409 ret = phy_ethtool_get_eee(phydev, edata);
1410 if (ret < 0)
1411 goto exit;
1412
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001413 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1414 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001415 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001416 edata->eee_active = !!(edata->advertised &
1417 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001418 edata->tx_lpi_enabled = true;
1419 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1420 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1421 edata->tx_lpi_timer = buf;
1422 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001423 edata->eee_enabled = false;
1424 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001425 edata->tx_lpi_enabled = false;
1426 edata->tx_lpi_timer = 0;
1427 }
1428
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001429 ret = 0;
1430exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001431 usb_autopm_put_interface(dev->intf);
1432
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001433 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001434}
1435
1436static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1437{
1438 struct lan78xx_net *dev = netdev_priv(net);
1439 int ret;
1440 u32 buf;
1441
1442 ret = usb_autopm_get_interface(dev->intf);
1443 if (ret < 0)
1444 return ret;
1445
1446 if (edata->eee_enabled) {
1447 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1448 buf |= MAC_CR_EEE_EN_;
1449 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1450
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001451 phy_ethtool_set_eee(net->phydev, edata);
1452
1453 buf = (u32)edata->tx_lpi_timer;
1454 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001455 } else {
1456 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1457 buf &= ~MAC_CR_EEE_EN_;
1458 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1459 }
1460
1461 usb_autopm_put_interface(dev->intf);
1462
1463 return 0;
1464}
1465
1466static u32 lan78xx_get_link(struct net_device *net)
1467{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001468 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001469
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001470 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001471}
1472
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001473static void lan78xx_get_drvinfo(struct net_device *net,
1474 struct ethtool_drvinfo *info)
1475{
1476 struct lan78xx_net *dev = netdev_priv(net);
1477
1478 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
1479 strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
1480 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1481}
1482
1483static u32 lan78xx_get_msglevel(struct net_device *net)
1484{
1485 struct lan78xx_net *dev = netdev_priv(net);
1486
1487 return dev->msg_enable;
1488}
1489
1490static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1491{
1492 struct lan78xx_net *dev = netdev_priv(net);
1493
1494 dev->msg_enable = level;
1495}
1496
Philippe Reynes6e765102016-10-09 12:07:04 +02001497static int lan78xx_get_link_ksettings(struct net_device *net,
1498 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001499{
1500 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001501 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001502 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001503
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001504 ret = usb_autopm_get_interface(dev->intf);
1505 if (ret < 0)
1506 return ret;
1507
yuval.shaia@oracle.com55141742017-06-13 10:09:46 +03001508 phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001509
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001510 usb_autopm_put_interface(dev->intf);
1511
1512 return ret;
1513}
1514
Philippe Reynes6e765102016-10-09 12:07:04 +02001515static int lan78xx_set_link_ksettings(struct net_device *net,
1516 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001517{
1518 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001519 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001520 int ret = 0;
1521 int temp;
1522
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001523 ret = usb_autopm_get_interface(dev->intf);
1524 if (ret < 0)
1525 return ret;
1526
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001527 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001528 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001529
Philippe Reynes6e765102016-10-09 12:07:04 +02001530 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001531 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001532 temp = phy_read(phydev, MII_BMCR);
1533 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001534 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001535 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001536 }
1537
1538 usb_autopm_put_interface(dev->intf);
1539
1540 return ret;
1541}
1542
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001543static void lan78xx_get_pause(struct net_device *net,
1544 struct ethtool_pauseparam *pause)
1545{
1546 struct lan78xx_net *dev = netdev_priv(net);
1547 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001548 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001549
Philippe Reynes6e765102016-10-09 12:07:04 +02001550 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001551
1552 pause->autoneg = dev->fc_autoneg;
1553
1554 if (dev->fc_request_control & FLOW_CTRL_TX)
1555 pause->tx_pause = 1;
1556
1557 if (dev->fc_request_control & FLOW_CTRL_RX)
1558 pause->rx_pause = 1;
1559}
1560
1561static int lan78xx_set_pause(struct net_device *net,
1562 struct ethtool_pauseparam *pause)
1563{
1564 struct lan78xx_net *dev = netdev_priv(net);
1565 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001566 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001567 int ret;
1568
Philippe Reynes6e765102016-10-09 12:07:04 +02001569 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001570
Philippe Reynes6e765102016-10-09 12:07:04 +02001571 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001572 ret = -EINVAL;
1573 goto exit;
1574 }
1575
1576 dev->fc_request_control = 0;
1577 if (pause->rx_pause)
1578 dev->fc_request_control |= FLOW_CTRL_RX;
1579
1580 if (pause->tx_pause)
1581 dev->fc_request_control |= FLOW_CTRL_TX;
1582
Philippe Reynes6e765102016-10-09 12:07:04 +02001583 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001584 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001585 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001586
Philippe Reynes6e765102016-10-09 12:07:04 +02001587 ethtool_convert_link_mode_to_legacy_u32(
1588 &advertising, ecmd.link_modes.advertising);
1589
1590 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001591 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001592 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1593
1594 ethtool_convert_legacy_u32_to_link_mode(
1595 ecmd.link_modes.advertising, advertising);
1596
1597 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001598 }
1599
1600 dev->fc_autoneg = pause->autoneg;
1601
1602 ret = 0;
1603exit:
1604 return ret;
1605}
1606
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001607static const struct ethtool_ops lan78xx_ethtool_ops = {
1608 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001609 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001610 .get_drvinfo = lan78xx_get_drvinfo,
1611 .get_msglevel = lan78xx_get_msglevel,
1612 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001613 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1614 .get_eeprom = lan78xx_ethtool_get_eeprom,
1615 .set_eeprom = lan78xx_ethtool_set_eeprom,
1616 .get_ethtool_stats = lan78xx_get_stats,
1617 .get_sset_count = lan78xx_get_sset_count,
1618 .get_strings = lan78xx_get_strings,
1619 .get_wol = lan78xx_get_wol,
1620 .set_wol = lan78xx_set_wol,
1621 .get_eee = lan78xx_get_eee,
1622 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001623 .get_pauseparam = lan78xx_get_pause,
1624 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001625 .get_link_ksettings = lan78xx_get_link_ksettings,
1626 .set_link_ksettings = lan78xx_set_link_ksettings,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001627};
1628
1629static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1630{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001631 if (!netif_running(netdev))
1632 return -EINVAL;
1633
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001634 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001635}
1636
1637static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1638{
1639 u32 addr_lo, addr_hi;
1640 int ret;
1641 u8 addr[6];
1642
1643 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1644 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1645
1646 addr[0] = addr_lo & 0xFF;
1647 addr[1] = (addr_lo >> 8) & 0xFF;
1648 addr[2] = (addr_lo >> 16) & 0xFF;
1649 addr[3] = (addr_lo >> 24) & 0xFF;
1650 addr[4] = addr_hi & 0xFF;
1651 addr[5] = (addr_hi >> 8) & 0xFF;
1652
1653 if (!is_valid_ether_addr(addr)) {
1654 /* reading mac address from EEPROM or OTP */
1655 if ((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1656 addr) == 0) ||
1657 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1658 addr) == 0)) {
1659 if (is_valid_ether_addr(addr)) {
1660 /* eeprom values are valid so use them */
1661 netif_dbg(dev, ifup, dev->net,
1662 "MAC address read from EEPROM");
1663 } else {
1664 /* generate random MAC */
1665 random_ether_addr(addr);
1666 netif_dbg(dev, ifup, dev->net,
1667 "MAC address set to random addr");
1668 }
1669
1670 addr_lo = addr[0] | (addr[1] << 8) |
1671 (addr[2] << 16) | (addr[3] << 24);
1672 addr_hi = addr[4] | (addr[5] << 8);
1673
1674 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1675 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
1676 } else {
1677 /* generate random MAC */
1678 random_ether_addr(addr);
1679 netif_dbg(dev, ifup, dev->net,
1680 "MAC address set to random addr");
1681 }
1682 }
1683
1684 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1685 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1686
1687 ether_addr_copy(dev->net->dev_addr, addr);
1688}
1689
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001690/* MDIO read and write wrappers for phylib */
1691static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001692{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001693 struct lan78xx_net *dev = bus->priv;
1694 u32 val, addr;
1695 int ret;
1696
1697 ret = usb_autopm_get_interface(dev->intf);
1698 if (ret < 0)
1699 return ret;
1700
1701 mutex_lock(&dev->phy_mutex);
1702
1703 /* confirm MII not busy */
1704 ret = lan78xx_phy_wait_not_busy(dev);
1705 if (ret < 0)
1706 goto done;
1707
1708 /* set the address, index & direction (read from PHY) */
1709 addr = mii_access(phy_id, idx, MII_READ);
1710 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1711
1712 ret = lan78xx_phy_wait_not_busy(dev);
1713 if (ret < 0)
1714 goto done;
1715
1716 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1717
1718 ret = (int)(val & 0xFFFF);
1719
1720done:
1721 mutex_unlock(&dev->phy_mutex);
1722 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001723
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001724 return ret;
1725}
1726
1727static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1728 u16 regval)
1729{
1730 struct lan78xx_net *dev = bus->priv;
1731 u32 val, addr;
1732 int ret;
1733
1734 ret = usb_autopm_get_interface(dev->intf);
1735 if (ret < 0)
1736 return ret;
1737
1738 mutex_lock(&dev->phy_mutex);
1739
1740 /* confirm MII not busy */
1741 ret = lan78xx_phy_wait_not_busy(dev);
1742 if (ret < 0)
1743 goto done;
1744
1745 val = (u32)regval;
1746 ret = lan78xx_write_reg(dev, MII_DATA, val);
1747
1748 /* set the address, index & direction (write to PHY) */
1749 addr = mii_access(phy_id, idx, MII_WRITE);
1750 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1751
1752 ret = lan78xx_phy_wait_not_busy(dev);
1753 if (ret < 0)
1754 goto done;
1755
1756done:
1757 mutex_unlock(&dev->phy_mutex);
1758 usb_autopm_put_interface(dev->intf);
1759 return 0;
1760}
1761
1762static int lan78xx_mdio_init(struct lan78xx_net *dev)
1763{
1764 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001765
1766 dev->mdiobus = mdiobus_alloc();
1767 if (!dev->mdiobus) {
1768 netdev_err(dev->net, "can't allocate MDIO bus\n");
1769 return -ENOMEM;
1770 }
1771
1772 dev->mdiobus->priv = (void *)dev;
1773 dev->mdiobus->read = lan78xx_mdiobus_read;
1774 dev->mdiobus->write = lan78xx_mdiobus_write;
1775 dev->mdiobus->name = "lan78xx-mdiobus";
1776
1777 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1778 dev->udev->bus->busnum, dev->udev->devnum);
1779
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001780 switch (dev->chipid) {
1781 case ID_REV_CHIP_ID_7800_:
1782 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001783 /* set to internal PHY id */
1784 dev->mdiobus->phy_mask = ~(1 << 1);
1785 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001786 case ID_REV_CHIP_ID_7801_:
1787 /* scan thru PHYAD[2..0] */
1788 dev->mdiobus->phy_mask = ~(0xFF);
1789 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001790 }
1791
1792 ret = mdiobus_register(dev->mdiobus);
1793 if (ret) {
1794 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001795 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001796 }
1797
1798 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1799 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001800exit1:
1801 mdiobus_free(dev->mdiobus);
1802 return ret;
1803}
1804
1805static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1806{
1807 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001808 mdiobus_free(dev->mdiobus);
1809}
1810
1811static void lan78xx_link_status_change(struct net_device *net)
1812{
Woojung Huh14437e32016-04-25 22:22:36 +00001813 struct phy_device *phydev = net->phydev;
1814 int ret, temp;
1815
1816 /* At forced 100 F/H mode, chip may fail to set mode correctly
1817 * when cable is switched between long(~50+m) and short one.
1818 * As workaround, set to 10 before setting to 100
1819 * at forced 100 F/H mode.
1820 */
1821 if (!phydev->autoneg && (phydev->speed == 100)) {
1822 /* disable phy interrupt */
1823 temp = phy_read(phydev, LAN88XX_INT_MASK);
1824 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1825 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1826
1827 temp = phy_read(phydev, MII_BMCR);
1828 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1829 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1830 temp |= BMCR_SPEED100;
1831 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1832
1833 /* clear pending interrupt generated while workaround */
1834 temp = phy_read(phydev, LAN88XX_INT_STS);
1835
1836 /* enable phy interrupt back */
1837 temp = phy_read(phydev, LAN88XX_INT_MASK);
1838 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1839 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1840 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001841}
1842
Woojung Huhcc89c322016-11-01 20:02:00 +00001843static int irq_map(struct irq_domain *d, unsigned int irq,
1844 irq_hw_number_t hwirq)
1845{
1846 struct irq_domain_data *data = d->host_data;
1847
1848 irq_set_chip_data(irq, data);
1849 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1850 irq_set_noprobe(irq);
1851
1852 return 0;
1853}
1854
1855static void irq_unmap(struct irq_domain *d, unsigned int irq)
1856{
1857 irq_set_chip_and_handler(irq, NULL, NULL);
1858 irq_set_chip_data(irq, NULL);
1859}
1860
1861static const struct irq_domain_ops chip_domain_ops = {
1862 .map = irq_map,
1863 .unmap = irq_unmap,
1864};
1865
1866static void lan78xx_irq_mask(struct irq_data *irqd)
1867{
1868 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1869
1870 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1871}
1872
1873static void lan78xx_irq_unmask(struct irq_data *irqd)
1874{
1875 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1876
1877 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1878}
1879
1880static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1881{
1882 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1883
1884 mutex_lock(&data->irq_lock);
1885}
1886
1887static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1888{
1889 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1890 struct lan78xx_net *dev =
1891 container_of(data, struct lan78xx_net, domain_data);
1892 u32 buf;
1893 int ret;
1894
1895 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1896 * are only two callbacks executed in non-atomic contex.
1897 */
1898 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1899 if (buf != data->irqenable)
1900 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1901
1902 mutex_unlock(&data->irq_lock);
1903}
1904
1905static struct irq_chip lan78xx_irqchip = {
1906 .name = "lan78xx-irqs",
1907 .irq_mask = lan78xx_irq_mask,
1908 .irq_unmask = lan78xx_irq_unmask,
1909 .irq_bus_lock = lan78xx_irq_bus_lock,
1910 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1911};
1912
1913static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1914{
1915 struct device_node *of_node;
1916 struct irq_domain *irqdomain;
1917 unsigned int irqmap = 0;
1918 u32 buf;
1919 int ret = 0;
1920
1921 of_node = dev->udev->dev.parent->of_node;
1922
1923 mutex_init(&dev->domain_data.irq_lock);
1924
1925 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1926 dev->domain_data.irqenable = buf;
1927
1928 dev->domain_data.irqchip = &lan78xx_irqchip;
1929 dev->domain_data.irq_handler = handle_simple_irq;
1930
1931 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1932 &chip_domain_ops, &dev->domain_data);
1933 if (irqdomain) {
1934 /* create mapping for PHY interrupt */
1935 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1936 if (!irqmap) {
1937 irq_domain_remove(irqdomain);
1938
1939 irqdomain = NULL;
1940 ret = -EINVAL;
1941 }
1942 } else {
1943 ret = -EINVAL;
1944 }
1945
1946 dev->domain_data.irqdomain = irqdomain;
1947 dev->domain_data.phyirq = irqmap;
1948
1949 return ret;
1950}
1951
1952static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
1953{
1954 if (dev->domain_data.phyirq > 0) {
1955 irq_dispose_mapping(dev->domain_data.phyirq);
1956
1957 if (dev->domain_data.irqdomain)
1958 irq_domain_remove(dev->domain_data.irqdomain);
1959 }
1960 dev->domain_data.phyirq = 0;
1961 dev->domain_data.irqdomain = NULL;
1962}
1963
Woojung Huh02dc1f32016-12-07 20:26:25 +00001964static int lan8835_fixup(struct phy_device *phydev)
1965{
1966 int buf;
1967 int ret;
1968 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1969
1970 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
Russell King5f613672017-03-21 16:36:48 +00001971 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001972 buf &= ~0x1800;
1973 buf |= 0x0800;
Russell King5f613672017-03-21 16:36:48 +00001974 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001975
1976 /* RGMII MAC TXC Delay Enable */
1977 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
1978 MAC_RGMII_ID_TXC_DELAY_EN_);
1979
1980 /* RGMII TX DLL Tune Adjust */
1981 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
1982
1983 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
1984
1985 return 1;
1986}
1987
1988static int ksz9031rnx_fixup(struct phy_device *phydev)
1989{
1990 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1991
1992 /* Micrel9301RNX PHY configuration */
1993 /* RGMII Control Signal Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001994 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001995 /* RGMII RX Data Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001996 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001997 /* RGMII RX Clock Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001998 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001999
2000 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2001
2002 return 1;
2003}
2004
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002005static int lan78xx_phy_init(struct lan78xx_net *dev)
2006{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002007 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002008 u32 mii_adv;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002009 struct phy_device *phydev = dev->net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002010
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002011 phydev = phy_find_first(dev->mdiobus);
2012 if (!phydev) {
2013 netdev_err(dev->net, "no PHY found\n");
2014 return -EIO;
2015 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002016
Woojung Huh02dc1f32016-12-07 20:26:25 +00002017 if ((dev->chipid == ID_REV_CHIP_ID_7800_) ||
2018 (dev->chipid == ID_REV_CHIP_ID_7850_)) {
2019 phydev->is_internal = true;
2020 dev->interface = PHY_INTERFACE_MODE_GMII;
2021
2022 } else if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2023 if (!phydev->drv) {
2024 netdev_err(dev->net, "no PHY driver found\n");
2025 return -EIO;
2026 }
2027
2028 dev->interface = PHY_INTERFACE_MODE_RGMII;
2029
2030 /* external PHY fixup for KSZ9031RNX */
2031 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2032 ksz9031rnx_fixup);
2033 if (ret < 0) {
2034 netdev_err(dev->net, "fail to register fixup\n");
2035 return ret;
2036 }
2037 /* external PHY fixup for LAN8835 */
2038 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2039 lan8835_fixup);
2040 if (ret < 0) {
2041 netdev_err(dev->net, "fail to register fixup\n");
2042 return ret;
2043 }
2044 /* add more external PHY fixup here if needed */
2045
2046 phydev->is_internal = false;
2047 } else {
2048 netdev_err(dev->net, "unknown ID found\n");
2049 ret = -EIO;
2050 goto error;
2051 }
2052
Woojung Huhcc89c322016-11-01 20:02:00 +00002053 /* if phyirq is not set, use polling mode in phylib */
2054 if (dev->domain_data.phyirq > 0)
2055 phydev->irq = dev->domain_data.phyirq;
2056 else
2057 phydev->irq = 0;
2058 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002059
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002060 /* set to AUTOMDIX */
2061 phydev->mdix = ETH_TP_MDI_AUTO;
2062
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002063 ret = phy_connect_direct(dev->net, phydev,
2064 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002065 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002066 if (ret) {
2067 netdev_err(dev->net, "can't attach PHY to %s\n",
2068 dev->mdiobus->id);
2069 return -EIO;
2070 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002071
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002072 /* MAC doesn't support 1000T Half */
2073 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002074
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002075 /* support both flow controls */
2076 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2077 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2078 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2079 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2080
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002081 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002082
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002083 dev->fc_autoneg = phydev->autoneg;
2084
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002085 phy_start(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002086
2087 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
2088
2089 return 0;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002090
2091error:
2092 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2093 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2094
2095 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002096}
2097
2098static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2099{
2100 int ret = 0;
2101 u32 buf;
2102 bool rxenabled;
2103
2104 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2105
2106 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2107
2108 if (rxenabled) {
2109 buf &= ~MAC_RX_RXEN_;
2110 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2111 }
2112
2113 /* add 4 to size for FCS */
2114 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2115 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2116
2117 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2118
2119 if (rxenabled) {
2120 buf |= MAC_RX_RXEN_;
2121 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2122 }
2123
2124 return 0;
2125}
2126
2127static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2128{
2129 struct sk_buff *skb;
2130 unsigned long flags;
2131 int count = 0;
2132
2133 spin_lock_irqsave(&q->lock, flags);
2134 while (!skb_queue_empty(q)) {
2135 struct skb_data *entry;
2136 struct urb *urb;
2137 int ret;
2138
2139 skb_queue_walk(q, skb) {
2140 entry = (struct skb_data *)skb->cb;
2141 if (entry->state != unlink_start)
2142 goto found;
2143 }
2144 break;
2145found:
2146 entry->state = unlink_start;
2147 urb = entry->urb;
2148
2149 /* Get reference count of the URB to avoid it to be
2150 * freed during usb_unlink_urb, which may trigger
2151 * use-after-free problem inside usb_unlink_urb since
2152 * usb_unlink_urb is always racing with .complete
2153 * handler(include defer_bh).
2154 */
2155 usb_get_urb(urb);
2156 spin_unlock_irqrestore(&q->lock, flags);
2157 /* during some PM-driven resume scenarios,
2158 * these (async) unlinks complete immediately
2159 */
2160 ret = usb_unlink_urb(urb);
2161 if (ret != -EINPROGRESS && ret != 0)
2162 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2163 else
2164 count++;
2165 usb_put_urb(urb);
2166 spin_lock_irqsave(&q->lock, flags);
2167 }
2168 spin_unlock_irqrestore(&q->lock, flags);
2169 return count;
2170}
2171
2172static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2173{
2174 struct lan78xx_net *dev = netdev_priv(netdev);
2175 int ll_mtu = new_mtu + netdev->hard_header_len;
2176 int old_hard_mtu = dev->hard_mtu;
2177 int old_rx_urb_size = dev->rx_urb_size;
2178 int ret;
2179
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002180 /* no second zero-length packet read wanted after mtu-sized packets */
2181 if ((ll_mtu % dev->maxpacket) == 0)
2182 return -EDOM;
2183
2184 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
2185
2186 netdev->mtu = new_mtu;
2187
2188 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2189 if (dev->rx_urb_size == old_hard_mtu) {
2190 dev->rx_urb_size = dev->hard_mtu;
2191 if (dev->rx_urb_size > old_rx_urb_size) {
2192 if (netif_running(dev->net)) {
2193 unlink_urbs(dev, &dev->rxq);
2194 tasklet_schedule(&dev->bh);
2195 }
2196 }
2197 }
2198
2199 return 0;
2200}
2201
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002202static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002203{
2204 struct lan78xx_net *dev = netdev_priv(netdev);
2205 struct sockaddr *addr = p;
2206 u32 addr_lo, addr_hi;
2207 int ret;
2208
2209 if (netif_running(netdev))
2210 return -EBUSY;
2211
2212 if (!is_valid_ether_addr(addr->sa_data))
2213 return -EADDRNOTAVAIL;
2214
2215 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2216
2217 addr_lo = netdev->dev_addr[0] |
2218 netdev->dev_addr[1] << 8 |
2219 netdev->dev_addr[2] << 16 |
2220 netdev->dev_addr[3] << 24;
2221 addr_hi = netdev->dev_addr[4] |
2222 netdev->dev_addr[5] << 8;
2223
2224 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2225 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2226
2227 return 0;
2228}
2229
2230/* Enable or disable Rx checksum offload engine */
2231static int lan78xx_set_features(struct net_device *netdev,
2232 netdev_features_t features)
2233{
2234 struct lan78xx_net *dev = netdev_priv(netdev);
2235 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2236 unsigned long flags;
2237 int ret;
2238
2239 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2240
2241 if (features & NETIF_F_RXCSUM) {
2242 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2243 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2244 } else {
2245 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2246 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2247 }
2248
2249 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2250 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2251 else
2252 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2253
2254 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2255
2256 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2257
2258 return 0;
2259}
2260
2261static void lan78xx_deferred_vlan_write(struct work_struct *param)
2262{
2263 struct lan78xx_priv *pdata =
2264 container_of(param, struct lan78xx_priv, set_vlan);
2265 struct lan78xx_net *dev = pdata->dev;
2266
2267 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2268 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2269}
2270
2271static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2272 __be16 proto, u16 vid)
2273{
2274 struct lan78xx_net *dev = netdev_priv(netdev);
2275 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2276 u16 vid_bit_index;
2277 u16 vid_dword_index;
2278
2279 vid_dword_index = (vid >> 5) & 0x7F;
2280 vid_bit_index = vid & 0x1F;
2281
2282 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2283
2284 /* defer register writes to a sleepable context */
2285 schedule_work(&pdata->set_vlan);
2286
2287 return 0;
2288}
2289
2290static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2291 __be16 proto, u16 vid)
2292{
2293 struct lan78xx_net *dev = netdev_priv(netdev);
2294 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2295 u16 vid_bit_index;
2296 u16 vid_dword_index;
2297
2298 vid_dword_index = (vid >> 5) & 0x7F;
2299 vid_bit_index = vid & 0x1F;
2300
2301 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2302
2303 /* defer register writes to a sleepable context */
2304 schedule_work(&pdata->set_vlan);
2305
2306 return 0;
2307}
2308
2309static void lan78xx_init_ltm(struct lan78xx_net *dev)
2310{
2311 int ret;
2312 u32 buf;
2313 u32 regs[6] = { 0 };
2314
2315 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2316 if (buf & USB_CFG1_LTM_ENABLE_) {
2317 u8 temp[2];
2318 /* Get values from EEPROM first */
2319 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2320 if (temp[0] == 24) {
2321 ret = lan78xx_read_raw_eeprom(dev,
2322 temp[1] * 2,
2323 24,
2324 (u8 *)regs);
2325 if (ret < 0)
2326 return;
2327 }
2328 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2329 if (temp[0] == 24) {
2330 ret = lan78xx_read_raw_otp(dev,
2331 temp[1] * 2,
2332 24,
2333 (u8 *)regs);
2334 if (ret < 0)
2335 return;
2336 }
2337 }
2338 }
2339
2340 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2341 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2342 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2343 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2344 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2345 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2346}
2347
2348static int lan78xx_reset(struct lan78xx_net *dev)
2349{
2350 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2351 u32 buf;
2352 int ret = 0;
2353 unsigned long timeout;
2354
2355 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2356 buf |= HW_CFG_LRST_;
2357 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2358
2359 timeout = jiffies + HZ;
2360 do {
2361 mdelay(1);
2362 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2363 if (time_after(jiffies, timeout)) {
2364 netdev_warn(dev->net,
2365 "timeout on completion of LiteReset");
2366 return -EIO;
2367 }
2368 } while (buf & HW_CFG_LRST_);
2369
2370 lan78xx_init_mac_address(dev);
2371
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002372 /* save DEVID for later usage */
2373 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002374 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2375 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002376
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002377 /* Respond to the IN token with a NAK */
2378 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2379 buf |= USB_CFG_BIR_;
2380 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2381
2382 /* Init LTM */
2383 lan78xx_init_ltm(dev);
2384
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002385 if (dev->udev->speed == USB_SPEED_SUPER) {
2386 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2387 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2388 dev->rx_qlen = 4;
2389 dev->tx_qlen = 4;
2390 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2391 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2392 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2393 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2394 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2395 } else {
2396 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2397 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2398 dev->rx_qlen = 4;
2399 }
2400
2401 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2402 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2403
2404 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2405 buf |= HW_CFG_MEF_;
2406 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2407
2408 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2409 buf |= USB_CFG_BCE_;
2410 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2411
2412 /* set FIFO sizes */
2413 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2414 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2415
2416 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2417 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2418
2419 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2420 ret = lan78xx_write_reg(dev, FLOW, 0);
2421 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2422
2423 /* Don't need rfe_ctl_lock during initialisation */
2424 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2425 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2426 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2427
2428 /* Enable or disable checksum offload engines */
2429 lan78xx_set_features(dev->net, dev->net->features);
2430
2431 lan78xx_set_multicast(dev->net);
2432
2433 /* reset PHY */
2434 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2435 buf |= PMT_CTL_PHY_RST_;
2436 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2437
2438 timeout = jiffies + HZ;
2439 do {
2440 mdelay(1);
2441 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2442 if (time_after(jiffies, timeout)) {
2443 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2444 return -EIO;
2445 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002446 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002447
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002448 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002449 /* LAN7801 only has RGMII mode */
2450 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2451 buf &= ~MAC_CR_GMII_EN_;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002452 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2453
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002454 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2455 buf |= MAC_TX_TXEN_;
2456 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2457
2458 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2459 buf |= FCT_TX_CTL_EN_;
2460 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2461
2462 ret = lan78xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
2463
2464 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2465 buf |= MAC_RX_RXEN_;
2466 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2467
2468 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2469 buf |= FCT_RX_CTL_EN_;
2470 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2471
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002472 return 0;
2473}
2474
Woojung Huh20ff5562016-03-16 22:10:40 +00002475static void lan78xx_init_stats(struct lan78xx_net *dev)
2476{
2477 u32 *p;
2478 int i;
2479
2480 /* initialize for stats update
2481 * some counters are 20bits and some are 32bits
2482 */
2483 p = (u32 *)&dev->stats.rollover_max;
2484 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2485 p[i] = 0xFFFFF;
2486
2487 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2488 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2489 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2490 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2491 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2492 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2493 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2494 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2495 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2496 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2497
2498 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
2499}
2500
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002501static int lan78xx_open(struct net_device *net)
2502{
2503 struct lan78xx_net *dev = netdev_priv(net);
2504 int ret;
2505
2506 ret = usb_autopm_get_interface(dev->intf);
2507 if (ret < 0)
2508 goto out;
2509
2510 ret = lan78xx_reset(dev);
2511 if (ret < 0)
2512 goto done;
2513
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002514 ret = lan78xx_phy_init(dev);
2515 if (ret < 0)
2516 goto done;
2517
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002518 /* for Link Check */
2519 if (dev->urb_intr) {
2520 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2521 if (ret < 0) {
2522 netif_err(dev, ifup, dev->net,
2523 "intr submit %d\n", ret);
2524 goto done;
2525 }
2526 }
2527
Woojung Huh20ff5562016-03-16 22:10:40 +00002528 lan78xx_init_stats(dev);
2529
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002530 set_bit(EVENT_DEV_OPEN, &dev->flags);
2531
2532 netif_start_queue(net);
2533
2534 dev->link_on = false;
2535
2536 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2537done:
2538 usb_autopm_put_interface(dev->intf);
2539
2540out:
2541 return ret;
2542}
2543
2544static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2545{
2546 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2547 DECLARE_WAITQUEUE(wait, current);
2548 int temp;
2549
2550 /* ensure there are no more active urbs */
2551 add_wait_queue(&unlink_wakeup, &wait);
2552 set_current_state(TASK_UNINTERRUPTIBLE);
2553 dev->wait = &unlink_wakeup;
2554 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2555
2556 /* maybe wait for deletions to finish. */
2557 while (!skb_queue_empty(&dev->rxq) &&
2558 !skb_queue_empty(&dev->txq) &&
2559 !skb_queue_empty(&dev->done)) {
2560 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2561 set_current_state(TASK_UNINTERRUPTIBLE);
2562 netif_dbg(dev, ifdown, dev->net,
2563 "waited for %d urb completions\n", temp);
2564 }
2565 set_current_state(TASK_RUNNING);
2566 dev->wait = NULL;
2567 remove_wait_queue(&unlink_wakeup, &wait);
2568}
2569
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002570static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002571{
2572 struct lan78xx_net *dev = netdev_priv(net);
2573
Woojung Huh20ff5562016-03-16 22:10:40 +00002574 if (timer_pending(&dev->stat_monitor))
2575 del_timer_sync(&dev->stat_monitor);
2576
Woojung Huh02dc1f32016-12-07 20:26:25 +00002577 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2578 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2579
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002580 phy_stop(net->phydev);
2581 phy_disconnect(net->phydev);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002582
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002583 net->phydev = NULL;
2584
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002585 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2586 netif_stop_queue(net);
2587
2588 netif_info(dev, ifdown, dev->net,
2589 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2590 net->stats.rx_packets, net->stats.tx_packets,
2591 net->stats.rx_errors, net->stats.tx_errors);
2592
2593 lan78xx_terminate_urbs(dev);
2594
2595 usb_kill_urb(dev->urb_intr);
2596
2597 skb_queue_purge(&dev->rxq_pause);
2598
2599 /* deferred work (task, timer, softirq) must also stop.
2600 * can't flush_scheduled_work() until we drop rtnl (later),
2601 * else workers could deadlock; so make workers a NOP.
2602 */
2603 dev->flags = 0;
2604 cancel_delayed_work_sync(&dev->wq);
2605 tasklet_kill(&dev->bh);
2606
2607 usb_autopm_put_interface(dev->intf);
2608
2609 return 0;
2610}
2611
2612static int lan78xx_linearize(struct sk_buff *skb)
2613{
2614 return skb_linearize(skb);
2615}
2616
2617static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2618 struct sk_buff *skb, gfp_t flags)
2619{
2620 u32 tx_cmd_a, tx_cmd_b;
2621
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002622 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002623 dev_kfree_skb_any(skb);
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002624 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002625 }
2626
2627 if (lan78xx_linearize(skb) < 0)
2628 return NULL;
2629
2630 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2631
2632 if (skb->ip_summed == CHECKSUM_PARTIAL)
2633 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2634
2635 tx_cmd_b = 0;
2636 if (skb_is_gso(skb)) {
2637 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2638
2639 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2640
2641 tx_cmd_a |= TX_CMD_A_LSO_;
2642 }
2643
2644 if (skb_vlan_tag_present(skb)) {
2645 tx_cmd_a |= TX_CMD_A_IVTG_;
2646 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2647 }
2648
2649 skb_push(skb, 4);
2650 cpu_to_le32s(&tx_cmd_b);
2651 memcpy(skb->data, &tx_cmd_b, 4);
2652
2653 skb_push(skb, 4);
2654 cpu_to_le32s(&tx_cmd_a);
2655 memcpy(skb->data, &tx_cmd_a, 4);
2656
2657 return skb;
2658}
2659
2660static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2661 struct sk_buff_head *list, enum skb_state state)
2662{
2663 unsigned long flags;
2664 enum skb_state old_state;
2665 struct skb_data *entry = (struct skb_data *)skb->cb;
2666
2667 spin_lock_irqsave(&list->lock, flags);
2668 old_state = entry->state;
2669 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002670
2671 __skb_unlink(skb, list);
2672 spin_unlock(&list->lock);
2673 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002674
2675 __skb_queue_tail(&dev->done, skb);
2676 if (skb_queue_len(&dev->done) == 1)
2677 tasklet_schedule(&dev->bh);
2678 spin_unlock_irqrestore(&dev->done.lock, flags);
2679
2680 return old_state;
2681}
2682
2683static void tx_complete(struct urb *urb)
2684{
2685 struct sk_buff *skb = (struct sk_buff *)urb->context;
2686 struct skb_data *entry = (struct skb_data *)skb->cb;
2687 struct lan78xx_net *dev = entry->dev;
2688
2689 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002690 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002691 dev->net->stats.tx_bytes += entry->length;
2692 } else {
2693 dev->net->stats.tx_errors++;
2694
2695 switch (urb->status) {
2696 case -EPIPE:
2697 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2698 break;
2699
2700 /* software-driven interface shutdown */
2701 case -ECONNRESET:
2702 case -ESHUTDOWN:
2703 break;
2704
2705 case -EPROTO:
2706 case -ETIME:
2707 case -EILSEQ:
2708 netif_stop_queue(dev->net);
2709 break;
2710 default:
2711 netif_dbg(dev, tx_err, dev->net,
2712 "tx err %d\n", entry->urb->status);
2713 break;
2714 }
2715 }
2716
2717 usb_autopm_put_interface_async(dev->intf);
2718
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002719 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002720}
2721
2722static void lan78xx_queue_skb(struct sk_buff_head *list,
2723 struct sk_buff *newsk, enum skb_state state)
2724{
2725 struct skb_data *entry = (struct skb_data *)newsk->cb;
2726
2727 __skb_queue_tail(list, newsk);
2728 entry->state = state;
2729}
2730
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002731static netdev_tx_t
2732lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002733{
2734 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002735 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002736
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002737 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002738 skb_tx_timestamp(skb);
2739 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2740 }
2741
2742 if (skb2) {
2743 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002744
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002745 /* throttle TX patch at slower than SUPER SPEED USB */
2746 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2747 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002748 netif_stop_queue(net);
2749 } else {
2750 netif_dbg(dev, tx_err, dev->net,
2751 "lan78xx_tx_prep return NULL\n");
2752 dev->net->stats.tx_errors++;
2753 dev->net->stats.tx_dropped++;
2754 }
2755
2756 tasklet_schedule(&dev->bh);
2757
2758 return NETDEV_TX_OK;
2759}
2760
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002761static int
2762lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002763{
2764 int tmp;
2765 struct usb_host_interface *alt = NULL;
2766 struct usb_host_endpoint *in = NULL, *out = NULL;
2767 struct usb_host_endpoint *status = NULL;
2768
2769 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2770 unsigned ep;
2771
2772 in = NULL;
2773 out = NULL;
2774 status = NULL;
2775 alt = intf->altsetting + tmp;
2776
2777 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2778 struct usb_host_endpoint *e;
2779 int intr = 0;
2780
2781 e = alt->endpoint + ep;
2782 switch (e->desc.bmAttributes) {
2783 case USB_ENDPOINT_XFER_INT:
2784 if (!usb_endpoint_dir_in(&e->desc))
2785 continue;
2786 intr = 1;
2787 /* FALLTHROUGH */
2788 case USB_ENDPOINT_XFER_BULK:
2789 break;
2790 default:
2791 continue;
2792 }
2793 if (usb_endpoint_dir_in(&e->desc)) {
2794 if (!intr && !in)
2795 in = e;
2796 else if (intr && !status)
2797 status = e;
2798 } else {
2799 if (!out)
2800 out = e;
2801 }
2802 }
2803 if (in && out)
2804 break;
2805 }
2806 if (!alt || !in || !out)
2807 return -EINVAL;
2808
2809 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2810 in->desc.bEndpointAddress &
2811 USB_ENDPOINT_NUMBER_MASK);
2812 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2813 out->desc.bEndpointAddress &
2814 USB_ENDPOINT_NUMBER_MASK);
2815 dev->ep_intr = status;
2816
2817 return 0;
2818}
2819
2820static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2821{
2822 struct lan78xx_priv *pdata = NULL;
2823 int ret;
2824 int i;
2825
2826 ret = lan78xx_get_endpoints(dev, intf);
2827
2828 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2829
2830 pdata = (struct lan78xx_priv *)(dev->data[0]);
2831 if (!pdata) {
2832 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2833 return -ENOMEM;
2834 }
2835
2836 pdata->dev = dev;
2837
2838 spin_lock_init(&pdata->rfe_ctl_lock);
2839 mutex_init(&pdata->dataport_mutex);
2840
2841 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2842
2843 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2844 pdata->vlan_table[i] = 0;
2845
2846 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2847
2848 dev->net->features = 0;
2849
2850 if (DEFAULT_TX_CSUM_ENABLE)
2851 dev->net->features |= NETIF_F_HW_CSUM;
2852
2853 if (DEFAULT_RX_CSUM_ENABLE)
2854 dev->net->features |= NETIF_F_RXCSUM;
2855
2856 if (DEFAULT_TSO_CSUM_ENABLE)
2857 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2858
2859 dev->net->hw_features = dev->net->features;
2860
Woojung Huhcc89c322016-11-01 20:02:00 +00002861 ret = lan78xx_setup_irq_domain(dev);
2862 if (ret < 0) {
2863 netdev_warn(dev->net,
2864 "lan78xx_setup_irq_domain() failed : %d", ret);
2865 kfree(pdata);
2866 return ret;
2867 }
2868
Nisar Sayed0573f942017-08-01 10:24:33 +00002869 dev->net->hard_header_len += TX_OVERHEAD;
2870 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2871
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002872 /* Init all registers */
2873 ret = lan78xx_reset(dev);
2874
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002875 ret = lan78xx_mdio_init(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002876
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002877 dev->net->flags |= IFF_MULTICAST;
2878
2879 pdata->wol = WAKE_MAGIC;
2880
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002881 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002882}
2883
2884static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
2885{
2886 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2887
Woojung Huhcc89c322016-11-01 20:02:00 +00002888 lan78xx_remove_irq_domain(dev);
2889
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002890 lan78xx_remove_mdio(dev);
2891
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002892 if (pdata) {
2893 netif_dbg(dev, ifdown, dev->net, "free pdata");
2894 kfree(pdata);
2895 pdata = NULL;
2896 dev->data[0] = 0;
2897 }
2898}
2899
2900static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
2901 struct sk_buff *skb,
2902 u32 rx_cmd_a, u32 rx_cmd_b)
2903{
2904 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2905 unlikely(rx_cmd_a & RX_CMD_A_ICSM_)) {
2906 skb->ip_summed = CHECKSUM_NONE;
2907 } else {
2908 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
2909 skb->ip_summed = CHECKSUM_COMPLETE;
2910 }
2911}
2912
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002913static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002914{
2915 int status;
2916
2917 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
2918 skb_queue_tail(&dev->rxq_pause, skb);
2919 return;
2920 }
2921
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002922 dev->net->stats.rx_packets++;
2923 dev->net->stats.rx_bytes += skb->len;
2924
Woojung Huh74d79a22016-04-25 22:22:32 +00002925 skb->protocol = eth_type_trans(skb, dev->net);
2926
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002927 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
2928 skb->len + sizeof(struct ethhdr), skb->protocol);
2929 memset(skb->cb, 0, sizeof(struct skb_data));
2930
2931 if (skb_defer_rx_timestamp(skb))
2932 return;
2933
2934 status = netif_rx(skb);
2935 if (status != NET_RX_SUCCESS)
2936 netif_dbg(dev, rx_err, dev->net,
2937 "netif_rx status %d\n", status);
2938}
2939
2940static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
2941{
2942 if (skb->len < dev->net->hard_header_len)
2943 return 0;
2944
2945 while (skb->len > 0) {
2946 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2947 u16 rx_cmd_c;
2948 struct sk_buff *skb2;
2949 unsigned char *packet;
2950
2951 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2952 le32_to_cpus(&rx_cmd_a);
2953 skb_pull(skb, sizeof(rx_cmd_a));
2954
2955 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
2956 le32_to_cpus(&rx_cmd_b);
2957 skb_pull(skb, sizeof(rx_cmd_b));
2958
2959 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
2960 le16_to_cpus(&rx_cmd_c);
2961 skb_pull(skb, sizeof(rx_cmd_c));
2962
2963 packet = skb->data;
2964
2965 /* get the packet length */
2966 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
2967 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2968
2969 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
2970 netif_dbg(dev, rx_err, dev->net,
2971 "Error rx_cmd_a=0x%08x", rx_cmd_a);
2972 } else {
2973 /* last frame in this batch */
2974 if (skb->len == size) {
2975 lan78xx_rx_csum_offload(dev, skb,
2976 rx_cmd_a, rx_cmd_b);
2977
2978 skb_trim(skb, skb->len - 4); /* remove fcs */
2979 skb->truesize = size + sizeof(struct sk_buff);
2980
2981 return 1;
2982 }
2983
2984 skb2 = skb_clone(skb, GFP_ATOMIC);
2985 if (unlikely(!skb2)) {
2986 netdev_warn(dev->net, "Error allocating skb");
2987 return 0;
2988 }
2989
2990 skb2->len = size;
2991 skb2->data = packet;
2992 skb_set_tail_pointer(skb2, size);
2993
2994 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
2995
2996 skb_trim(skb2, skb2->len - 4); /* remove fcs */
2997 skb2->truesize = size + sizeof(struct sk_buff);
2998
2999 lan78xx_skb_return(dev, skb2);
3000 }
3001
3002 skb_pull(skb, size);
3003
3004 /* padding bytes before the next frame starts */
3005 if (skb->len)
3006 skb_pull(skb, align_count);
3007 }
3008
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003009 return 1;
3010}
3011
3012static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3013{
3014 if (!lan78xx_rx(dev, skb)) {
3015 dev->net->stats.rx_errors++;
3016 goto done;
3017 }
3018
3019 if (skb->len) {
3020 lan78xx_skb_return(dev, skb);
3021 return;
3022 }
3023
3024 netif_dbg(dev, rx_err, dev->net, "drop\n");
3025 dev->net->stats.rx_errors++;
3026done:
3027 skb_queue_tail(&dev->done, skb);
3028}
3029
3030static void rx_complete(struct urb *urb);
3031
3032static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3033{
3034 struct sk_buff *skb;
3035 struct skb_data *entry;
3036 unsigned long lockflags;
3037 size_t size = dev->rx_urb_size;
3038 int ret = 0;
3039
3040 skb = netdev_alloc_skb_ip_align(dev->net, size);
3041 if (!skb) {
3042 usb_free_urb(urb);
3043 return -ENOMEM;
3044 }
3045
3046 entry = (struct skb_data *)skb->cb;
3047 entry->urb = urb;
3048 entry->dev = dev;
3049 entry->length = 0;
3050
3051 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3052 skb->data, size, rx_complete, skb);
3053
3054 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3055
3056 if (netif_device_present(dev->net) &&
3057 netif_running(dev->net) &&
3058 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3059 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3060 ret = usb_submit_urb(urb, GFP_ATOMIC);
3061 switch (ret) {
3062 case 0:
3063 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3064 break;
3065 case -EPIPE:
3066 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3067 break;
3068 case -ENODEV:
3069 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3070 netif_device_detach(dev->net);
3071 break;
3072 case -EHOSTUNREACH:
3073 ret = -ENOLINK;
3074 break;
3075 default:
3076 netif_dbg(dev, rx_err, dev->net,
3077 "rx submit, %d\n", ret);
3078 tasklet_schedule(&dev->bh);
3079 }
3080 } else {
3081 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3082 ret = -ENOLINK;
3083 }
3084 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3085 if (ret) {
3086 dev_kfree_skb_any(skb);
3087 usb_free_urb(urb);
3088 }
3089 return ret;
3090}
3091
3092static void rx_complete(struct urb *urb)
3093{
3094 struct sk_buff *skb = (struct sk_buff *)urb->context;
3095 struct skb_data *entry = (struct skb_data *)skb->cb;
3096 struct lan78xx_net *dev = entry->dev;
3097 int urb_status = urb->status;
3098 enum skb_state state;
3099
3100 skb_put(skb, urb->actual_length);
3101 state = rx_done;
3102 entry->urb = NULL;
3103
3104 switch (urb_status) {
3105 case 0:
3106 if (skb->len < dev->net->hard_header_len) {
3107 state = rx_cleanup;
3108 dev->net->stats.rx_errors++;
3109 dev->net->stats.rx_length_errors++;
3110 netif_dbg(dev, rx_err, dev->net,
3111 "rx length %d\n", skb->len);
3112 }
3113 usb_mark_last_busy(dev->udev);
3114 break;
3115 case -EPIPE:
3116 dev->net->stats.rx_errors++;
3117 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3118 /* FALLTHROUGH */
3119 case -ECONNRESET: /* async unlink */
3120 case -ESHUTDOWN: /* hardware gone */
3121 netif_dbg(dev, ifdown, dev->net,
3122 "rx shutdown, code %d\n", urb_status);
3123 state = rx_cleanup;
3124 entry->urb = urb;
3125 urb = NULL;
3126 break;
3127 case -EPROTO:
3128 case -ETIME:
3129 case -EILSEQ:
3130 dev->net->stats.rx_errors++;
3131 state = rx_cleanup;
3132 entry->urb = urb;
3133 urb = NULL;
3134 break;
3135
3136 /* data overrun ... flush fifo? */
3137 case -EOVERFLOW:
3138 dev->net->stats.rx_over_errors++;
3139 /* FALLTHROUGH */
3140
3141 default:
3142 state = rx_cleanup;
3143 dev->net->stats.rx_errors++;
3144 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3145 break;
3146 }
3147
3148 state = defer_bh(dev, skb, &dev->rxq, state);
3149
3150 if (urb) {
3151 if (netif_running(dev->net) &&
3152 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3153 state != unlink_start) {
3154 rx_submit(dev, urb, GFP_ATOMIC);
3155 return;
3156 }
3157 usb_free_urb(urb);
3158 }
3159 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3160}
3161
3162static void lan78xx_tx_bh(struct lan78xx_net *dev)
3163{
3164 int length;
3165 struct urb *urb = NULL;
3166 struct skb_data *entry;
3167 unsigned long flags;
3168 struct sk_buff_head *tqp = &dev->txq_pend;
3169 struct sk_buff *skb, *skb2;
3170 int ret;
3171 int count, pos;
3172 int skb_totallen, pkt_cnt;
3173
3174 skb_totallen = 0;
3175 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003176 count = 0;
3177 length = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003178 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3179 if (skb_is_gso(skb)) {
3180 if (pkt_cnt) {
3181 /* handle previous packets first */
3182 break;
3183 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003184 count = 1;
3185 length = skb->len - TX_OVERHEAD;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003186 skb2 = skb_dequeue(tqp);
3187 goto gso_skb;
3188 }
3189
3190 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3191 break;
3192 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3193 pkt_cnt++;
3194 }
3195
3196 /* copy to a single skb */
3197 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3198 if (!skb)
3199 goto drop;
3200
3201 skb_put(skb, skb_totallen);
3202
3203 for (count = pos = 0; count < pkt_cnt; count++) {
3204 skb2 = skb_dequeue(tqp);
3205 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003206 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003207 memcpy(skb->data + pos, skb2->data, skb2->len);
3208 pos += roundup(skb2->len, sizeof(u32));
3209 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003210 }
3211 }
3212
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003213gso_skb:
3214 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003215 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003216 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003217
3218 entry = (struct skb_data *)skb->cb;
3219 entry->urb = urb;
3220 entry->dev = dev;
3221 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003222 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003223
3224 spin_lock_irqsave(&dev->txq.lock, flags);
3225 ret = usb_autopm_get_interface_async(dev->intf);
3226 if (ret < 0) {
3227 spin_unlock_irqrestore(&dev->txq.lock, flags);
3228 goto drop;
3229 }
3230
3231 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3232 skb->data, skb->len, tx_complete, skb);
3233
3234 if (length % dev->maxpacket == 0) {
3235 /* send USB_ZERO_PACKET */
3236 urb->transfer_flags |= URB_ZERO_PACKET;
3237 }
3238
3239#ifdef CONFIG_PM
3240 /* if this triggers the device is still a sleep */
3241 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3242 /* transmission will be done in resume */
3243 usb_anchor_urb(urb, &dev->deferred);
3244 /* no use to process more packets */
3245 netif_stop_queue(dev->net);
3246 usb_put_urb(urb);
3247 spin_unlock_irqrestore(&dev->txq.lock, flags);
3248 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3249 return;
3250 }
3251#endif
3252
3253 ret = usb_submit_urb(urb, GFP_ATOMIC);
3254 switch (ret) {
3255 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003256 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003257 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3258 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3259 netif_stop_queue(dev->net);
3260 break;
3261 case -EPIPE:
3262 netif_stop_queue(dev->net);
3263 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3264 usb_autopm_put_interface_async(dev->intf);
3265 break;
3266 default:
3267 usb_autopm_put_interface_async(dev->intf);
3268 netif_dbg(dev, tx_err, dev->net,
3269 "tx: submit urb err %d\n", ret);
3270 break;
3271 }
3272
3273 spin_unlock_irqrestore(&dev->txq.lock, flags);
3274
3275 if (ret) {
3276 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3277drop:
3278 dev->net->stats.tx_dropped++;
3279 if (skb)
3280 dev_kfree_skb_any(skb);
3281 usb_free_urb(urb);
3282 } else
3283 netif_dbg(dev, tx_queued, dev->net,
3284 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3285}
3286
3287static void lan78xx_rx_bh(struct lan78xx_net *dev)
3288{
3289 struct urb *urb;
3290 int i;
3291
3292 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3293 for (i = 0; i < 10; i++) {
3294 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3295 break;
3296 urb = usb_alloc_urb(0, GFP_ATOMIC);
3297 if (urb)
3298 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3299 return;
3300 }
3301
3302 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3303 tasklet_schedule(&dev->bh);
3304 }
3305 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3306 netif_wake_queue(dev->net);
3307}
3308
3309static void lan78xx_bh(unsigned long param)
3310{
3311 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3312 struct sk_buff *skb;
3313 struct skb_data *entry;
3314
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003315 while ((skb = skb_dequeue(&dev->done))) {
3316 entry = (struct skb_data *)(skb->cb);
3317 switch (entry->state) {
3318 case rx_done:
3319 entry->state = rx_cleanup;
3320 rx_process(dev, skb);
3321 continue;
3322 case tx_done:
3323 usb_free_urb(entry->urb);
3324 dev_kfree_skb(skb);
3325 continue;
3326 case rx_cleanup:
3327 usb_free_urb(entry->urb);
3328 dev_kfree_skb(skb);
3329 continue;
3330 default:
3331 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3332 return;
3333 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003334 }
3335
3336 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003337 /* reset update timer delta */
3338 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3339 dev->delta = 1;
3340 mod_timer(&dev->stat_monitor,
3341 jiffies + STAT_UPDATE_TIMER);
3342 }
3343
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003344 if (!skb_queue_empty(&dev->txq_pend))
3345 lan78xx_tx_bh(dev);
3346
3347 if (!timer_pending(&dev->delay) &&
3348 !test_bit(EVENT_RX_HALT, &dev->flags))
3349 lan78xx_rx_bh(dev);
3350 }
3351}
3352
3353static void lan78xx_delayedwork(struct work_struct *work)
3354{
3355 int status;
3356 struct lan78xx_net *dev;
3357
3358 dev = container_of(work, struct lan78xx_net, wq.work);
3359
3360 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3361 unlink_urbs(dev, &dev->txq);
3362 status = usb_autopm_get_interface(dev->intf);
3363 if (status < 0)
3364 goto fail_pipe;
3365 status = usb_clear_halt(dev->udev, dev->pipe_out);
3366 usb_autopm_put_interface(dev->intf);
3367 if (status < 0 &&
3368 status != -EPIPE &&
3369 status != -ESHUTDOWN) {
3370 if (netif_msg_tx_err(dev))
3371fail_pipe:
3372 netdev_err(dev->net,
3373 "can't clear tx halt, status %d\n",
3374 status);
3375 } else {
3376 clear_bit(EVENT_TX_HALT, &dev->flags);
3377 if (status != -ESHUTDOWN)
3378 netif_wake_queue(dev->net);
3379 }
3380 }
3381 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3382 unlink_urbs(dev, &dev->rxq);
3383 status = usb_autopm_get_interface(dev->intf);
3384 if (status < 0)
3385 goto fail_halt;
3386 status = usb_clear_halt(dev->udev, dev->pipe_in);
3387 usb_autopm_put_interface(dev->intf);
3388 if (status < 0 &&
3389 status != -EPIPE &&
3390 status != -ESHUTDOWN) {
3391 if (netif_msg_rx_err(dev))
3392fail_halt:
3393 netdev_err(dev->net,
3394 "can't clear rx halt, status %d\n",
3395 status);
3396 } else {
3397 clear_bit(EVENT_RX_HALT, &dev->flags);
3398 tasklet_schedule(&dev->bh);
3399 }
3400 }
3401
3402 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3403 int ret = 0;
3404
3405 clear_bit(EVENT_LINK_RESET, &dev->flags);
3406 status = usb_autopm_get_interface(dev->intf);
3407 if (status < 0)
3408 goto skip_reset;
3409 if (lan78xx_link_reset(dev) < 0) {
3410 usb_autopm_put_interface(dev->intf);
3411skip_reset:
3412 netdev_info(dev->net, "link reset failed (%d)\n",
3413 ret);
3414 } else {
3415 usb_autopm_put_interface(dev->intf);
3416 }
3417 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003418
3419 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3420 lan78xx_update_stats(dev);
3421
3422 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3423
3424 mod_timer(&dev->stat_monitor,
3425 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3426
3427 dev->delta = min((dev->delta * 2), 50);
3428 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003429}
3430
3431static void intr_complete(struct urb *urb)
3432{
3433 struct lan78xx_net *dev = urb->context;
3434 int status = urb->status;
3435
3436 switch (status) {
3437 /* success */
3438 case 0:
3439 lan78xx_status(dev, urb);
3440 break;
3441
3442 /* software-driven interface shutdown */
3443 case -ENOENT: /* urb killed */
3444 case -ESHUTDOWN: /* hardware gone */
3445 netif_dbg(dev, ifdown, dev->net,
3446 "intr shutdown, code %d\n", status);
3447 return;
3448
3449 /* NOTE: not throttling like RX/TX, since this endpoint
3450 * already polls infrequently
3451 */
3452 default:
3453 netdev_dbg(dev->net, "intr status %d\n", status);
3454 break;
3455 }
3456
3457 if (!netif_running(dev->net))
3458 return;
3459
3460 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3461 status = usb_submit_urb(urb, GFP_ATOMIC);
3462 if (status != 0)
3463 netif_err(dev, timer, dev->net,
3464 "intr resubmit --> %d\n", status);
3465}
3466
3467static void lan78xx_disconnect(struct usb_interface *intf)
3468{
3469 struct lan78xx_net *dev;
3470 struct usb_device *udev;
3471 struct net_device *net;
3472
3473 dev = usb_get_intfdata(intf);
3474 usb_set_intfdata(intf, NULL);
3475 if (!dev)
3476 return;
3477
3478 udev = interface_to_usbdev(intf);
3479
3480 net = dev->net;
3481 unregister_netdev(net);
3482
3483 cancel_delayed_work_sync(&dev->wq);
3484
3485 usb_scuttle_anchored_urbs(&dev->deferred);
3486
3487 lan78xx_unbind(dev, intf);
3488
3489 usb_kill_urb(dev->urb_intr);
3490 usb_free_urb(dev->urb_intr);
3491
3492 free_netdev(net);
3493 usb_put_dev(udev);
3494}
3495
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003496static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003497{
3498 struct lan78xx_net *dev = netdev_priv(net);
3499
3500 unlink_urbs(dev, &dev->txq);
3501 tasklet_schedule(&dev->bh);
3502}
3503
3504static const struct net_device_ops lan78xx_netdev_ops = {
3505 .ndo_open = lan78xx_open,
3506 .ndo_stop = lan78xx_stop,
3507 .ndo_start_xmit = lan78xx_start_xmit,
3508 .ndo_tx_timeout = lan78xx_tx_timeout,
3509 .ndo_change_mtu = lan78xx_change_mtu,
3510 .ndo_set_mac_address = lan78xx_set_mac_addr,
3511 .ndo_validate_addr = eth_validate_addr,
3512 .ndo_do_ioctl = lan78xx_ioctl,
3513 .ndo_set_rx_mode = lan78xx_set_multicast,
3514 .ndo_set_features = lan78xx_set_features,
3515 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3516 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3517};
3518
Woojung Huh20ff5562016-03-16 22:10:40 +00003519static void lan78xx_stat_monitor(unsigned long param)
3520{
3521 struct lan78xx_net *dev;
3522
3523 dev = (struct lan78xx_net *)param;
3524
3525 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3526}
3527
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003528static int lan78xx_probe(struct usb_interface *intf,
3529 const struct usb_device_id *id)
3530{
3531 struct lan78xx_net *dev;
3532 struct net_device *netdev;
3533 struct usb_device *udev;
3534 int ret;
3535 unsigned maxp;
3536 unsigned period;
3537 u8 *buf = NULL;
3538
3539 udev = interface_to_usbdev(intf);
3540 udev = usb_get_dev(udev);
3541
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003542 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3543 if (!netdev) {
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003544 dev_err(&intf->dev, "Error: OOM\n");
3545 ret = -ENOMEM;
3546 goto out1;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003547 }
3548
3549 /* netdev_printk() needs this */
3550 SET_NETDEV_DEV(netdev, &intf->dev);
3551
3552 dev = netdev_priv(netdev);
3553 dev->udev = udev;
3554 dev->intf = intf;
3555 dev->net = netdev;
3556 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3557 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3558
3559 skb_queue_head_init(&dev->rxq);
3560 skb_queue_head_init(&dev->txq);
3561 skb_queue_head_init(&dev->done);
3562 skb_queue_head_init(&dev->rxq_pause);
3563 skb_queue_head_init(&dev->txq_pend);
3564 mutex_init(&dev->phy_mutex);
3565
3566 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3567 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3568 init_usb_anchor(&dev->deferred);
3569
3570 netdev->netdev_ops = &lan78xx_netdev_ops;
3571 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3572 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3573
Woojung Huh20ff5562016-03-16 22:10:40 +00003574 dev->stat_monitor.function = lan78xx_stat_monitor;
3575 dev->stat_monitor.data = (unsigned long)dev;
3576 dev->delta = 1;
3577 init_timer(&dev->stat_monitor);
3578
3579 mutex_init(&dev->stats.access_lock);
3580
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003581 ret = lan78xx_bind(dev, intf);
3582 if (ret < 0)
3583 goto out2;
3584 strcpy(netdev->name, "eth%d");
3585
3586 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3587 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3588
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003589 /* MTU range: 68 - 9000 */
3590 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3591
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003592 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3593 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3594 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3595
3596 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3597 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3598
3599 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3600 dev->ep_intr->desc.bEndpointAddress &
3601 USB_ENDPOINT_NUMBER_MASK);
3602 period = dev->ep_intr->desc.bInterval;
3603
3604 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3605 buf = kmalloc(maxp, GFP_KERNEL);
3606 if (buf) {
3607 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3608 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003609 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003610 kfree(buf);
3611 goto out3;
3612 } else {
3613 usb_fill_int_urb(dev->urb_intr, dev->udev,
3614 dev->pipe_intr, buf, maxp,
3615 intr_complete, dev, period);
3616 }
3617 }
3618
3619 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3620
3621 /* driver requires remote-wakeup capability during autosuspend. */
3622 intf->needs_remote_wakeup = 1;
3623
3624 ret = register_netdev(netdev);
3625 if (ret != 0) {
3626 netif_err(dev, probe, netdev, "couldn't register the device\n");
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003627 goto out3;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003628 }
3629
3630 usb_set_intfdata(intf, dev);
3631
3632 ret = device_set_wakeup_enable(&udev->dev, true);
3633
3634 /* Default delay of 2sec has more overhead than advantage.
3635 * Set to 10sec as default.
3636 */
3637 pm_runtime_set_autosuspend_delay(&udev->dev,
3638 DEFAULT_AUTOSUSPEND_DELAY);
3639
3640 return 0;
3641
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003642out3:
3643 lan78xx_unbind(dev, intf);
3644out2:
3645 free_netdev(netdev);
3646out1:
3647 usb_put_dev(udev);
3648
3649 return ret;
3650}
3651
3652static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3653{
3654 const u16 crc16poly = 0x8005;
3655 int i;
3656 u16 bit, crc, msb;
3657 u8 data;
3658
3659 crc = 0xFFFF;
3660 for (i = 0; i < len; i++) {
3661 data = *buf++;
3662 for (bit = 0; bit < 8; bit++) {
3663 msb = crc >> 15;
3664 crc <<= 1;
3665
3666 if (msb ^ (u16)(data & 1)) {
3667 crc ^= crc16poly;
3668 crc |= (u16)0x0001U;
3669 }
3670 data >>= 1;
3671 }
3672 }
3673
3674 return crc;
3675}
3676
3677static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3678{
3679 u32 buf;
3680 int ret;
3681 int mask_index;
3682 u16 crc;
3683 u32 temp_wucsr;
3684 u32 temp_pmt_ctl;
3685 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3686 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3687 const u8 arp_type[2] = { 0x08, 0x06 };
3688
3689 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3690 buf &= ~MAC_TX_TXEN_;
3691 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3692 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3693 buf &= ~MAC_RX_RXEN_;
3694 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3695
3696 ret = lan78xx_write_reg(dev, WUCSR, 0);
3697 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3698 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3699
3700 temp_wucsr = 0;
3701
3702 temp_pmt_ctl = 0;
3703 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3704 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3705 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3706
3707 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3708 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3709
3710 mask_index = 0;
3711 if (wol & WAKE_PHY) {
3712 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3713
3714 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3715 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3716 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3717 }
3718 if (wol & WAKE_MAGIC) {
3719 temp_wucsr |= WUCSR_MPEN_;
3720
3721 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3722 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3723 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3724 }
3725 if (wol & WAKE_BCAST) {
3726 temp_wucsr |= WUCSR_BCST_EN_;
3727
3728 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3729 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3730 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3731 }
3732 if (wol & WAKE_MCAST) {
3733 temp_wucsr |= WUCSR_WAKE_EN_;
3734
3735 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3736 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3737 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3738 WUF_CFGX_EN_ |
3739 WUF_CFGX_TYPE_MCAST_ |
3740 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3741 (crc & WUF_CFGX_CRC16_MASK_));
3742
3743 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3744 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3745 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3746 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3747 mask_index++;
3748
3749 /* for IPv6 Multicast */
3750 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3751 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3752 WUF_CFGX_EN_ |
3753 WUF_CFGX_TYPE_MCAST_ |
3754 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3755 (crc & WUF_CFGX_CRC16_MASK_));
3756
3757 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3758 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3759 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3760 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3761 mask_index++;
3762
3763 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3764 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3765 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3766 }
3767 if (wol & WAKE_UCAST) {
3768 temp_wucsr |= WUCSR_PFDA_EN_;
3769
3770 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3771 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3772 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3773 }
3774 if (wol & WAKE_ARP) {
3775 temp_wucsr |= WUCSR_WAKE_EN_;
3776
3777 /* set WUF_CFG & WUF_MASK
3778 * for packettype (offset 12,13) = ARP (0x0806)
3779 */
3780 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3781 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3782 WUF_CFGX_EN_ |
3783 WUF_CFGX_TYPE_ALL_ |
3784 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3785 (crc & WUF_CFGX_CRC16_MASK_));
3786
3787 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3788 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3789 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3790 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3791 mask_index++;
3792
3793 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3794 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3795 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3796 }
3797
3798 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3799
3800 /* when multiple WOL bits are set */
3801 if (hweight_long((unsigned long)wol) > 1) {
3802 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3803 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3804 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3805 }
3806 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3807
3808 /* clear WUPS */
3809 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3810 buf |= PMT_CTL_WUPS_MASK_;
3811 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3812
3813 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3814 buf |= MAC_RX_RXEN_;
3815 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3816
3817 return 0;
3818}
3819
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003820static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003821{
3822 struct lan78xx_net *dev = usb_get_intfdata(intf);
3823 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3824 u32 buf;
3825 int ret;
3826 int event;
3827
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003828 event = message.event;
3829
3830 if (!dev->suspend_count++) {
3831 spin_lock_irq(&dev->txq.lock);
3832 /* don't autosuspend while transmitting */
3833 if ((skb_queue_len(&dev->txq) ||
3834 skb_queue_len(&dev->txq_pend)) &&
3835 PMSG_IS_AUTO(message)) {
3836 spin_unlock_irq(&dev->txq.lock);
3837 ret = -EBUSY;
3838 goto out;
3839 } else {
3840 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
3841 spin_unlock_irq(&dev->txq.lock);
3842 }
3843
3844 /* stop TX & RX */
3845 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3846 buf &= ~MAC_TX_TXEN_;
3847 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3848 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3849 buf &= ~MAC_RX_RXEN_;
3850 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3851
3852 /* empty out the rx and queues */
3853 netif_device_detach(dev->net);
3854 lan78xx_terminate_urbs(dev);
3855 usb_kill_urb(dev->urb_intr);
3856
3857 /* reattach */
3858 netif_device_attach(dev->net);
3859 }
3860
3861 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003862 del_timer(&dev->stat_monitor);
3863
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003864 if (PMSG_IS_AUTO(message)) {
3865 /* auto suspend (selective suspend) */
3866 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3867 buf &= ~MAC_TX_TXEN_;
3868 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3869 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3870 buf &= ~MAC_RX_RXEN_;
3871 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3872
3873 ret = lan78xx_write_reg(dev, WUCSR, 0);
3874 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3875 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3876
3877 /* set goodframe wakeup */
3878 ret = lan78xx_read_reg(dev, WUCSR, &buf);
3879
3880 buf |= WUCSR_RFE_WAKE_EN_;
3881 buf |= WUCSR_STORE_WAKE_;
3882
3883 ret = lan78xx_write_reg(dev, WUCSR, buf);
3884
3885 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3886
3887 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
3888 buf |= PMT_CTL_RES_CLR_WKP_STS_;
3889
3890 buf |= PMT_CTL_PHY_WAKE_EN_;
3891 buf |= PMT_CTL_WOL_EN_;
3892 buf &= ~PMT_CTL_SUS_MODE_MASK_;
3893 buf |= PMT_CTL_SUS_MODE_3_;
3894
3895 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3896
3897 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3898
3899 buf |= PMT_CTL_WUPS_MASK_;
3900
3901 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3902
3903 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3904 buf |= MAC_RX_RXEN_;
3905 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3906 } else {
3907 lan78xx_set_suspend(dev, pdata->wol);
3908 }
3909 }
3910
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00003911 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003912out:
3913 return ret;
3914}
3915
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003916static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003917{
3918 struct lan78xx_net *dev = usb_get_intfdata(intf);
3919 struct sk_buff *skb;
3920 struct urb *res;
3921 int ret;
3922 u32 buf;
3923
Woojung Huh20ff5562016-03-16 22:10:40 +00003924 if (!timer_pending(&dev->stat_monitor)) {
3925 dev->delta = 1;
3926 mod_timer(&dev->stat_monitor,
3927 jiffies + STAT_UPDATE_TIMER);
3928 }
3929
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003930 if (!--dev->suspend_count) {
3931 /* resume interrupt URBs */
3932 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
3933 usb_submit_urb(dev->urb_intr, GFP_NOIO);
3934
3935 spin_lock_irq(&dev->txq.lock);
3936 while ((res = usb_get_from_anchor(&dev->deferred))) {
3937 skb = (struct sk_buff *)res->context;
3938 ret = usb_submit_urb(res, GFP_ATOMIC);
3939 if (ret < 0) {
3940 dev_kfree_skb_any(skb);
3941 usb_free_urb(res);
3942 usb_autopm_put_interface_async(dev->intf);
3943 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02003944 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003945 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3946 }
3947 }
3948
3949 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
3950 spin_unlock_irq(&dev->txq.lock);
3951
3952 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
3953 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
3954 netif_start_queue(dev->net);
3955 tasklet_schedule(&dev->bh);
3956 }
3957 }
3958
3959 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3960 ret = lan78xx_write_reg(dev, WUCSR, 0);
3961 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3962
3963 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
3964 WUCSR2_ARP_RCD_ |
3965 WUCSR2_IPV6_TCPSYN_RCD_ |
3966 WUCSR2_IPV4_TCPSYN_RCD_);
3967
3968 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
3969 WUCSR_EEE_RX_WAKE_ |
3970 WUCSR_PFDA_FR_ |
3971 WUCSR_RFE_WAKE_FR_ |
3972 WUCSR_WUFR_ |
3973 WUCSR_MPR_ |
3974 WUCSR_BCST_FR_);
3975
3976 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3977 buf |= MAC_TX_TXEN_;
3978 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3979
3980 return 0;
3981}
3982
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003983static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003984{
3985 struct lan78xx_net *dev = usb_get_intfdata(intf);
3986
3987 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003988
3989 lan78xx_phy_init(dev);
3990
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003991 return lan78xx_resume(intf);
3992}
3993
3994static const struct usb_device_id products[] = {
3995 {
3996 /* LAN7800 USB Gigabit Ethernet Device */
3997 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
3998 },
3999 {
4000 /* LAN7850 USB Gigabit Ethernet Device */
4001 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4002 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00004003 {
4004 /* LAN7801 USB Gigabit Ethernet Device */
4005 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4006 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004007 {},
4008};
4009MODULE_DEVICE_TABLE(usb, products);
4010
4011static struct usb_driver lan78xx_driver = {
4012 .name = DRIVER_NAME,
4013 .id_table = products,
4014 .probe = lan78xx_probe,
4015 .disconnect = lan78xx_disconnect,
4016 .suspend = lan78xx_suspend,
4017 .resume = lan78xx_resume,
4018 .reset_resume = lan78xx_reset_resume,
4019 .supports_autosuspend = 1,
4020 .disable_hub_initiated_lpm = 1,
4021};
4022
4023module_usb_driver(lan78xx_driver);
4024
4025MODULE_AUTHOR(DRIVER_AUTHOR);
4026MODULE_DESCRIPTION(DRIVER_DESC);
4027MODULE_LICENSE("GPL");