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Bjorn Helgaas8cfab3c2018-01-26 12:50:27 -06001// SPDX-License-Identifier: GPL-2.0
Zhou Wang500a1d92015-10-29 20:02:51 -05002/*
Gabriele Paoloni5930fe42015-11-27 01:17:05 +08003 * PCIe host controller driver for HiSilicon SoCs
Zhou Wang500a1d92015-10-29 20:02:51 -05004 *
5 * Copyright (C) 2015 HiSilicon Co., Ltd. http://www.hisilicon.com
6 *
Gabriele Paoloni5930fe42015-11-27 01:17:05 +08007 * Authors: Zhou Wang <wangzhou1@hisilicon.com>
8 * Dacai Zhu <zhudacai@hisilicon.com>
9 * Gabriele Paoloni <gabriele.paoloni@huawei.com>
Zhou Wang500a1d92015-10-29 20:02:51 -050010 */
11#include <linux/interrupt.h>
Paul Gortmakerfb381182016-07-02 19:13:25 -040012#include <linux/init.h>
Zhou Wang500a1d92015-10-29 20:02:51 -050013#include <linux/platform_device.h>
Dongdong Liu5f00f1a2016-12-01 00:45:35 -060014#include <linux/pci.h>
15#include <linux/pci-acpi.h>
16#include <linux/pci-ecam.h>
Shawn Lin6e0832f2018-05-31 09:12:37 +080017#include "../../pci.h"
Dongdong Liu5f00f1a2016-12-01 00:45:35 -060018
Dongdong Liua2ec1996092017-02-06 14:25:04 +080019#if defined(CONFIG_PCI_HISI) || (defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS))
Dongdong Liu5f00f1a2016-12-01 00:45:35 -060020
Bjorn Helgaas47883162017-02-07 08:41:09 -060021static int hisi_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
22 int size, u32 *val)
Dongdong Liu5f00f1a2016-12-01 00:45:35 -060023{
24 struct pci_config_window *cfg = bus->sysdata;
25 int dev = PCI_SLOT(devfn);
26
27 if (bus->number == cfg->busr.start) {
28 /* access only one slot on each root port */
29 if (dev > 0)
30 return PCIBIOS_DEVICE_NOT_FOUND;
31 else
32 return pci_generic_config_read32(bus, devfn, where,
33 size, val);
34 }
35
36 return pci_generic_config_read(bus, devfn, where, size, val);
37}
38
Bjorn Helgaas47883162017-02-07 08:41:09 -060039static int hisi_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
40 int where, int size, u32 val)
Dongdong Liu5f00f1a2016-12-01 00:45:35 -060041{
42 struct pci_config_window *cfg = bus->sysdata;
43 int dev = PCI_SLOT(devfn);
44
45 if (bus->number == cfg->busr.start) {
46 /* access only one slot on each root port */
47 if (dev > 0)
48 return PCIBIOS_DEVICE_NOT_FOUND;
49 else
50 return pci_generic_config_write32(bus, devfn, where,
51 size, val);
52 }
53
54 return pci_generic_config_write(bus, devfn, where, size, val);
55}
56
57static void __iomem *hisi_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
58 int where)
59{
60 struct pci_config_window *cfg = bus->sysdata;
61 void __iomem *reg_base = cfg->priv;
62
63 if (bus->number == cfg->busr.start)
64 return reg_base + where;
65 else
66 return pci_ecam_map_bus(bus, devfn, where);
67}
68
Dongdong Liua2ec1996092017-02-06 14:25:04 +080069#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
70
Dongdong Liu5f00f1a2016-12-01 00:45:35 -060071static int hisi_pcie_init(struct pci_config_window *cfg)
72{
73 struct device *dev = cfg->parent;
74 struct acpi_device *adev = to_acpi_device(dev);
75 struct acpi_pci_root *root = acpi_driver_data(adev);
76 struct resource *res;
77 void __iomem *reg_base;
78 int ret;
79
80 /*
81 * Retrieve RC base and size from a HISI0081 device with _UID
82 * matching our segment.
83 */
84 res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL);
85 if (!res)
86 return -ENOMEM;
87
88 ret = acpi_get_rc_resources(dev, "HISI0081", root->segment, res);
89 if (ret) {
90 dev_err(dev, "can't get rc base address\n");
91 return -ENOMEM;
92 }
93
Lorenzo Pieralisie313a442017-04-19 17:49:07 +010094 reg_base = devm_pci_remap_cfgspace(dev, res->start, resource_size(res));
Dongdong Liu5f00f1a2016-12-01 00:45:35 -060095 if (!reg_base)
96 return -ENOMEM;
97
98 cfg->priv = reg_base;
99 return 0;
100}
101
Rob Herring0b104772020-04-09 17:49:21 -0600102const struct pci_ecam_ops hisi_pcie_ops = {
Dongdong Liu5f00f1a2016-12-01 00:45:35 -0600103 .init = hisi_pcie_init,
104 .pci_ops = {
105 .map_bus = hisi_pcie_map_bus,
Bjorn Helgaas47883162017-02-07 08:41:09 -0600106 .read = hisi_pcie_rd_conf,
107 .write = hisi_pcie_wr_conf,
Dongdong Liu5f00f1a2016-12-01 00:45:35 -0600108 }
109};
110
111#endif
112
113#ifdef CONFIG_PCI_HISI
Zhou Wang500a1d92015-10-29 20:02:51 -0500114
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800115static int hisi_pcie_platform_init(struct pci_config_window *cfg)
116{
117 struct device *dev = cfg->parent;
118 struct platform_device *pdev = to_platform_device(dev);
119 struct resource *res;
120 void __iomem *reg_base;
121
122 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
123 if (!res) {
124 dev_err(dev, "missing \"reg[1]\"property\n");
125 return -EINVAL;
126 }
127
Lorenzo Pieralisie313a442017-04-19 17:49:07 +0100128 reg_base = devm_pci_remap_cfgspace(dev, res->start, resource_size(res));
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800129 if (!reg_base)
130 return -ENOMEM;
131
132 cfg->priv = reg_base;
133 return 0;
134}
135
Bjorn Helgaasd388e542020-06-04 12:59:16 -0500136static const struct pci_ecam_ops hisi_pcie_platform_ops = {
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800137 .init = hisi_pcie_platform_init,
138 .pci_ops = {
139 .map_bus = hisi_pcie_map_bus,
Bjorn Helgaas47883162017-02-07 08:41:09 -0600140 .read = hisi_pcie_rd_conf,
141 .write = hisi_pcie_wr_conf,
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800142 }
143};
144
145static const struct of_device_id hisi_pcie_almost_ecam_of_match[] = {
146 {
Dongdong Liub9c11532017-03-23 21:18:17 +0800147 .compatible = "hisilicon,hip06-pcie-ecam",
Rob Herring0b104772020-04-09 17:49:21 -0600148 .data = &hisi_pcie_platform_ops,
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800149 },
Dongdong Liub9c11532017-03-23 21:18:17 +0800150 {
151 .compatible = "hisilicon,hip07-pcie-ecam",
Rob Herring0b104772020-04-09 17:49:21 -0600152 .data = &hisi_pcie_platform_ops,
Dongdong Liub9c11532017-03-23 21:18:17 +0800153 },
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800154 {},
155};
156
157static struct platform_driver hisi_pcie_almost_ecam_driver = {
Rob Herringb2f75a42020-04-09 17:49:23 -0600158 .probe = pci_host_common_probe,
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800159 .driver = {
160 .name = "hisi-pcie-almost-ecam",
161 .of_match_table = hisi_pcie_almost_ecam_of_match,
Brian Norrisa5f40e82017-04-20 15:36:25 -0500162 .suppress_bind_attrs = true,
Dongdong Liua2ec1996092017-02-06 14:25:04 +0800163 },
164};
165builtin_platform_driver(hisi_pcie_almost_ecam_driver);
166
167#endif
Dongdong Liu5f00f1a2016-12-01 00:45:35 -0600168#endif