Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 1 | /* |
| 2 | * net/dsa/dsa2.c - Hardware switch handling, binding version 2 |
| 3 | * Copyright (c) 2008-2009 Marvell Semiconductor |
| 4 | * Copyright (c) 2013 Florian Fainelli <florian@openwrt.org> |
| 5 | * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/device.h> |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/list.h> |
Andrew Lunn | c6e970a | 2017-03-28 23:45:06 +0200 | [diff] [blame] | 16 | #include <linux/netdevice.h> |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 17 | #include <linux/slab.h> |
| 18 | #include <linux/rtnetlink.h> |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 19 | #include <linux/of.h> |
| 20 | #include <linux/of_net.h> |
Vivien Didelot | ea5dd34 | 2017-05-17 15:46:03 -0400 | [diff] [blame] | 21 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 22 | #include "dsa_priv.h" |
| 23 | |
| 24 | static LIST_HEAD(dsa_switch_trees); |
| 25 | static DEFINE_MUTEX(dsa2_mutex); |
| 26 | |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 27 | static const struct devlink_ops dsa_devlink_ops = { |
| 28 | }; |
| 29 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 30 | static struct dsa_switch_tree *dsa_get_dst(u32 tree) |
| 31 | { |
| 32 | struct dsa_switch_tree *dst; |
| 33 | |
| 34 | list_for_each_entry(dst, &dsa_switch_trees, list) |
Nikita Yushchenko | 7a99cd6 | 2016-11-28 09:48:48 +0300 | [diff] [blame] | 35 | if (dst->tree == tree) { |
| 36 | kref_get(&dst->refcount); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 37 | return dst; |
Nikita Yushchenko | 7a99cd6 | 2016-11-28 09:48:48 +0300 | [diff] [blame] | 38 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 39 | return NULL; |
| 40 | } |
| 41 | |
| 42 | static void dsa_free_dst(struct kref *ref) |
| 43 | { |
| 44 | struct dsa_switch_tree *dst = container_of(ref, struct dsa_switch_tree, |
| 45 | refcount); |
| 46 | |
| 47 | list_del(&dst->list); |
| 48 | kfree(dst); |
| 49 | } |
| 50 | |
| 51 | static void dsa_put_dst(struct dsa_switch_tree *dst) |
| 52 | { |
| 53 | kref_put(&dst->refcount, dsa_free_dst); |
| 54 | } |
| 55 | |
| 56 | static struct dsa_switch_tree *dsa_add_dst(u32 tree) |
| 57 | { |
| 58 | struct dsa_switch_tree *dst; |
| 59 | |
| 60 | dst = kzalloc(sizeof(*dst), GFP_KERNEL); |
| 61 | if (!dst) |
| 62 | return NULL; |
| 63 | dst->tree = tree; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 64 | INIT_LIST_HEAD(&dst->list); |
| 65 | list_add_tail(&dsa_switch_trees, &dst->list); |
| 66 | kref_init(&dst->refcount); |
| 67 | |
| 68 | return dst; |
| 69 | } |
| 70 | |
| 71 | static void dsa_dst_add_ds(struct dsa_switch_tree *dst, |
| 72 | struct dsa_switch *ds, u32 index) |
| 73 | { |
| 74 | kref_get(&dst->refcount); |
| 75 | dst->ds[index] = ds; |
| 76 | } |
| 77 | |
| 78 | static void dsa_dst_del_ds(struct dsa_switch_tree *dst, |
| 79 | struct dsa_switch *ds, u32 index) |
| 80 | { |
| 81 | dst->ds[index] = NULL; |
| 82 | kref_put(&dst->refcount, dsa_free_dst); |
| 83 | } |
| 84 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 85 | /* For platform data configurations, we need to have a valid name argument to |
| 86 | * differentiate a disabled port from an enabled one |
| 87 | */ |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 88 | static bool dsa_port_is_valid(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 89 | { |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 90 | return !!(port->dn || port->name); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 91 | } |
| 92 | |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 93 | static bool dsa_port_is_dsa(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 94 | { |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 95 | if (port->name && !strcmp(port->name, "dsa")) |
| 96 | return true; |
| 97 | else |
| 98 | return !!of_parse_phandle(port->dn, "link", 0); |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 99 | } |
| 100 | |
| 101 | static bool dsa_port_is_cpu(struct dsa_port *port) |
| 102 | { |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 103 | if (port->name && !strcmp(port->name, "cpu")) |
| 104 | return true; |
| 105 | else |
| 106 | return !!of_parse_phandle(port->dn, "ethernet", 0); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 107 | } |
| 108 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 109 | static bool dsa_ds_find_port_dn(struct dsa_switch *ds, |
| 110 | struct device_node *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 111 | { |
| 112 | u32 index; |
| 113 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 114 | for (index = 0; index < ds->num_ports; index++) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 115 | if (ds->ports[index].dn == port) |
| 116 | return true; |
| 117 | return false; |
| 118 | } |
| 119 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 120 | static struct dsa_switch *dsa_dst_find_port_dn(struct dsa_switch_tree *dst, |
| 121 | struct device_node *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 122 | { |
| 123 | struct dsa_switch *ds; |
| 124 | u32 index; |
| 125 | |
| 126 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 127 | ds = dst->ds[index]; |
| 128 | if (!ds) |
| 129 | continue; |
| 130 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 131 | if (dsa_ds_find_port_dn(ds, port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 132 | return ds; |
| 133 | } |
| 134 | |
| 135 | return NULL; |
| 136 | } |
| 137 | |
| 138 | static int dsa_port_complete(struct dsa_switch_tree *dst, |
| 139 | struct dsa_switch *src_ds, |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 140 | struct dsa_port *port, |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 141 | u32 src_port) |
| 142 | { |
| 143 | struct device_node *link; |
| 144 | int index; |
| 145 | struct dsa_switch *dst_ds; |
| 146 | |
| 147 | for (index = 0;; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 148 | link = of_parse_phandle(port->dn, "link", index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 149 | if (!link) |
| 150 | break; |
| 151 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 152 | dst_ds = dsa_dst_find_port_dn(dst, link); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 153 | of_node_put(link); |
| 154 | |
| 155 | if (!dst_ds) |
| 156 | return 1; |
| 157 | |
| 158 | src_ds->rtable[dst_ds->index] = src_port; |
| 159 | } |
| 160 | |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | /* A switch is complete if all the DSA ports phandles point to ports |
| 165 | * known in the tree. A return value of 1 means the tree is not |
| 166 | * complete. This is not an error condition. A value of 0 is |
| 167 | * success. |
| 168 | */ |
| 169 | static int dsa_ds_complete(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 170 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 171 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 172 | u32 index; |
| 173 | int err; |
| 174 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 175 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 176 | port = &ds->ports[index]; |
| 177 | if (!dsa_port_is_valid(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 178 | continue; |
| 179 | |
| 180 | if (!dsa_port_is_dsa(port)) |
| 181 | continue; |
| 182 | |
| 183 | err = dsa_port_complete(dst, ds, port, index); |
| 184 | if (err != 0) |
| 185 | return err; |
| 186 | |
| 187 | ds->dsa_port_mask |= BIT(index); |
| 188 | } |
| 189 | |
| 190 | return 0; |
| 191 | } |
| 192 | |
| 193 | /* A tree is complete if all the DSA ports phandles point to ports |
| 194 | * known in the tree. A return value of 1 means the tree is not |
| 195 | * complete. This is not an error condition. A value of 0 is |
| 196 | * success. |
| 197 | */ |
| 198 | static int dsa_dst_complete(struct dsa_switch_tree *dst) |
| 199 | { |
| 200 | struct dsa_switch *ds; |
| 201 | u32 index; |
| 202 | int err; |
| 203 | |
| 204 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 205 | ds = dst->ds[index]; |
| 206 | if (!ds) |
| 207 | continue; |
| 208 | |
| 209 | err = dsa_ds_complete(dst, ds); |
| 210 | if (err != 0) |
| 211 | return err; |
| 212 | } |
| 213 | |
| 214 | return 0; |
| 215 | } |
| 216 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 217 | static int dsa_dsa_port_apply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 218 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 219 | struct dsa_switch *ds = port->ds; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 220 | int err; |
| 221 | |
Vivien Didelot | 47d0dcc | 2017-08-05 16:20:18 -0400 | [diff] [blame] | 222 | err = dsa_cpu_dsa_setup(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 223 | if (err) { |
| 224 | dev_warn(ds->dev, "Failed to setup dsa port %d: %d\n", |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 225 | port->index, err); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 226 | return err; |
| 227 | } |
| 228 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 229 | memset(&port->devlink_port, 0, sizeof(port->devlink_port)); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 230 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 231 | return devlink_port_register(ds->devlink, &port->devlink_port, |
| 232 | port->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 233 | } |
| 234 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 235 | static void dsa_dsa_port_unapply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 236 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 237 | devlink_port_unregister(&port->devlink_port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 238 | dsa_cpu_dsa_destroy(port); |
| 239 | } |
| 240 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 241 | static int dsa_cpu_port_apply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 242 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 243 | struct dsa_switch *ds = port->ds; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 244 | int err; |
| 245 | |
Vivien Didelot | 47d0dcc | 2017-08-05 16:20:18 -0400 | [diff] [blame] | 246 | err = dsa_cpu_dsa_setup(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 247 | if (err) { |
| 248 | dev_warn(ds->dev, "Failed to setup cpu port %d: %d\n", |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 249 | port->index, err); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 250 | return err; |
| 251 | } |
| 252 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 253 | memset(&port->devlink_port, 0, sizeof(port->devlink_port)); |
| 254 | err = devlink_port_register(ds->devlink, &port->devlink_port, |
| 255 | port->index); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 256 | return err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 257 | } |
| 258 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 259 | static void dsa_cpu_port_unapply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 260 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 261 | devlink_port_unregister(&port->devlink_port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 262 | dsa_cpu_dsa_destroy(port); |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 263 | port->ds->cpu_port_mask &= ~BIT(port->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 264 | |
| 265 | } |
| 266 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 267 | static int dsa_user_port_apply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 268 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 269 | struct dsa_switch *ds = port->ds; |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 270 | const char *name = port->name; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 271 | int err; |
| 272 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 273 | if (port->dn) |
| 274 | name = of_get_property(port->dn, "label", NULL); |
Vivien Didelot | 9f91484 | 2017-01-09 18:13:51 -0500 | [diff] [blame] | 275 | if (!name) |
| 276 | name = "eth%d"; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 277 | |
Vivien Didelot | 4cfbf09 | 2017-08-05 16:20:19 -0400 | [diff] [blame] | 278 | err = dsa_slave_create(port, name); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 279 | if (err) { |
| 280 | dev_warn(ds->dev, "Failed to create slave %d: %d\n", |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 281 | port->index, err); |
| 282 | port->netdev = NULL; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 283 | return err; |
| 284 | } |
| 285 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 286 | memset(&port->devlink_port, 0, sizeof(port->devlink_port)); |
| 287 | err = devlink_port_register(ds->devlink, &port->devlink_port, |
| 288 | port->index); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 289 | if (err) |
| 290 | return err; |
| 291 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 292 | devlink_port_type_eth_set(&port->devlink_port, port->netdev); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 293 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 294 | return 0; |
| 295 | } |
| 296 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 297 | static void dsa_user_port_unapply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 298 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 299 | devlink_port_unregister(&port->devlink_port); |
| 300 | if (port->netdev) { |
| 301 | dsa_slave_destroy(port->netdev); |
| 302 | port->netdev = NULL; |
| 303 | port->ds->enabled_port_mask &= ~(1 << port->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 304 | } |
| 305 | } |
| 306 | |
| 307 | static int dsa_ds_apply(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 308 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 309 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 310 | u32 index; |
| 311 | int err; |
| 312 | |
Florian Fainelli | 6e830d8 | 2016-06-07 16:32:39 -0700 | [diff] [blame] | 313 | /* Initialize ds->phys_mii_mask before registering the slave MDIO bus |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 314 | * driver and before ops->setup() has run, since the switch drivers and |
Florian Fainelli | 6e830d8 | 2016-06-07 16:32:39 -0700 | [diff] [blame] | 315 | * the slave MDIO bus driver rely on these values for probing PHY |
| 316 | * devices or not |
| 317 | */ |
| 318 | ds->phys_mii_mask = ds->enabled_port_mask; |
| 319 | |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 320 | /* Add the switch to devlink before calling setup, so that setup can |
| 321 | * add dpipe tables |
| 322 | */ |
| 323 | ds->devlink = devlink_alloc(&dsa_devlink_ops, 0); |
| 324 | if (!ds->devlink) |
| 325 | return -ENOMEM; |
| 326 | |
| 327 | err = devlink_register(ds->devlink, ds->dev); |
| 328 | if (err) |
| 329 | return err; |
| 330 | |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 331 | err = ds->ops->setup(ds); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 332 | if (err < 0) |
| 333 | return err; |
| 334 | |
Vivien Didelot | f515f19 | 2017-02-03 13:20:20 -0500 | [diff] [blame] | 335 | err = dsa_switch_register_notifier(ds); |
| 336 | if (err) |
| 337 | return err; |
| 338 | |
John Crispin | 092183d | 2016-09-19 15:28:01 +0200 | [diff] [blame] | 339 | if (ds->ops->set_addr) { |
Florian Fainelli | 6d3c8c0 | 2017-06-13 13:27:19 -0700 | [diff] [blame] | 340 | err = ds->ops->set_addr(ds, dst->cpu_dp->netdev->dev_addr); |
John Crispin | 092183d | 2016-09-19 15:28:01 +0200 | [diff] [blame] | 341 | if (err < 0) |
| 342 | return err; |
| 343 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 344 | |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 345 | if (!ds->slave_mii_bus && ds->ops->phy_read) { |
Florian Fainelli | 1eb5944 | 2016-06-07 16:32:40 -0700 | [diff] [blame] | 346 | ds->slave_mii_bus = devm_mdiobus_alloc(ds->dev); |
| 347 | if (!ds->slave_mii_bus) |
| 348 | return -ENOMEM; |
| 349 | |
| 350 | dsa_slave_mii_bus_init(ds); |
| 351 | |
| 352 | err = mdiobus_register(ds->slave_mii_bus); |
| 353 | if (err < 0) |
| 354 | return err; |
| 355 | } |
| 356 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 357 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 358 | port = &ds->ports[index]; |
| 359 | if (!dsa_port_is_valid(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 360 | continue; |
| 361 | |
| 362 | if (dsa_port_is_dsa(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 363 | err = dsa_dsa_port_apply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 364 | if (err) |
| 365 | return err; |
| 366 | continue; |
| 367 | } |
| 368 | |
| 369 | if (dsa_port_is_cpu(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 370 | err = dsa_cpu_port_apply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 371 | if (err) |
| 372 | return err; |
| 373 | continue; |
| 374 | } |
| 375 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 376 | err = dsa_user_port_apply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 377 | if (err) |
| 378 | continue; |
| 379 | } |
| 380 | |
| 381 | return 0; |
| 382 | } |
| 383 | |
| 384 | static void dsa_ds_unapply(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 385 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 386 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 387 | u32 index; |
| 388 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 389 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 390 | port = &ds->ports[index]; |
| 391 | if (!dsa_port_is_valid(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 392 | continue; |
| 393 | |
| 394 | if (dsa_port_is_dsa(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 395 | dsa_dsa_port_unapply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 396 | continue; |
| 397 | } |
| 398 | |
| 399 | if (dsa_port_is_cpu(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 400 | dsa_cpu_port_unapply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 401 | continue; |
| 402 | } |
| 403 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 404 | dsa_user_port_unapply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 405 | } |
Florian Fainelli | 1eb5944 | 2016-06-07 16:32:40 -0700 | [diff] [blame] | 406 | |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 407 | if (ds->slave_mii_bus && ds->ops->phy_read) |
Florian Fainelli | 1eb5944 | 2016-06-07 16:32:40 -0700 | [diff] [blame] | 408 | mdiobus_unregister(ds->slave_mii_bus); |
Vivien Didelot | f515f19 | 2017-02-03 13:20:20 -0500 | [diff] [blame] | 409 | |
| 410 | dsa_switch_unregister_notifier(ds); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 411 | |
| 412 | if (ds->devlink) { |
| 413 | devlink_unregister(ds->devlink); |
| 414 | devlink_free(ds->devlink); |
| 415 | ds->devlink = NULL; |
| 416 | } |
| 417 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 418 | } |
| 419 | |
| 420 | static int dsa_dst_apply(struct dsa_switch_tree *dst) |
| 421 | { |
| 422 | struct dsa_switch *ds; |
| 423 | u32 index; |
| 424 | int err; |
| 425 | |
| 426 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 427 | ds = dst->ds[index]; |
| 428 | if (!ds) |
| 429 | continue; |
| 430 | |
| 431 | err = dsa_ds_apply(dst, ds); |
| 432 | if (err) |
| 433 | return err; |
| 434 | } |
| 435 | |
| 436 | /* If we use a tagging format that doesn't have an ethertype |
| 437 | * field, make sure that all packets from this point on get |
| 438 | * sent to the tag format's receive function. |
| 439 | */ |
| 440 | wmb(); |
Florian Fainelli | 6d3c8c0 | 2017-06-13 13:27:19 -0700 | [diff] [blame] | 441 | dst->cpu_dp->netdev->dsa_ptr = dst; |
Vivien Didelot | 1943563 | 2017-09-19 11:56:59 -0400 | [diff] [blame] | 442 | |
Vivien Didelot | f2f2356 | 2017-09-19 11:57:00 -0400 | [diff] [blame] | 443 | err = dsa_master_ethtool_setup(dst->cpu_dp->netdev); |
Vivien Didelot | 1943563 | 2017-09-19 11:56:59 -0400 | [diff] [blame] | 444 | if (err) |
| 445 | return err; |
| 446 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 447 | dst->applied = true; |
| 448 | |
| 449 | return 0; |
| 450 | } |
| 451 | |
| 452 | static void dsa_dst_unapply(struct dsa_switch_tree *dst) |
| 453 | { |
| 454 | struct dsa_switch *ds; |
| 455 | u32 index; |
| 456 | |
| 457 | if (!dst->applied) |
| 458 | return; |
| 459 | |
Vivien Didelot | f2f2356 | 2017-09-19 11:57:00 -0400 | [diff] [blame] | 460 | dsa_master_ethtool_restore(dst->cpu_dp->netdev); |
Vivien Didelot | 1943563 | 2017-09-19 11:56:59 -0400 | [diff] [blame] | 461 | |
Florian Fainelli | 6d3c8c0 | 2017-06-13 13:27:19 -0700 | [diff] [blame] | 462 | dst->cpu_dp->netdev->dsa_ptr = NULL; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 463 | |
| 464 | /* If we used a tagging format that doesn't have an ethertype |
| 465 | * field, make sure that all packets from this point get sent |
| 466 | * without the tag and go through the regular receive path. |
| 467 | */ |
| 468 | wmb(); |
| 469 | |
| 470 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 471 | ds = dst->ds[index]; |
| 472 | if (!ds) |
| 473 | continue; |
| 474 | |
| 475 | dsa_ds_unapply(dst, ds); |
| 476 | } |
| 477 | |
Vivien Didelot | cd8d7dd | 2017-09-19 11:56:58 -0400 | [diff] [blame] | 478 | dst->cpu_dp = NULL; |
Florian Fainelli | 0c73c52 | 2016-06-07 16:32:42 -0700 | [diff] [blame] | 479 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 480 | pr_info("DSA: tree %d unapplied\n", dst->tree); |
| 481 | dst->applied = false; |
| 482 | } |
| 483 | |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 484 | static int dsa_cpu_parse(struct dsa_port *port, u32 index, |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 485 | struct dsa_switch_tree *dst, |
| 486 | struct dsa_switch *ds) |
| 487 | { |
Vivien Didelot | 62fc958 | 2017-09-29 17:19:17 -0400 | [diff] [blame] | 488 | const struct dsa_device_ops *tag_ops; |
Andrew Lunn | 7b31436 | 2016-08-22 16:01:01 +0200 | [diff] [blame] | 489 | enum dsa_tag_protocol tag_protocol; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 490 | struct net_device *ethernet_dev; |
| 491 | struct device_node *ethernet; |
| 492 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 493 | if (port->dn) { |
| 494 | ethernet = of_parse_phandle(port->dn, "ethernet", 0); |
| 495 | if (!ethernet) |
| 496 | return -EINVAL; |
| 497 | ethernet_dev = of_find_net_device_by_node(ethernet); |
| 498 | } else { |
| 499 | ethernet_dev = dsa_dev_to_net_device(ds->cd->netdev[index]); |
| 500 | dev_put(ethernet_dev); |
| 501 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 502 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 503 | if (!ethernet_dev) |
| 504 | return -EPROBE_DEFER; |
| 505 | |
Florian Fainelli | 6d3c8c0 | 2017-06-13 13:27:19 -0700 | [diff] [blame] | 506 | if (!dst->cpu_dp) { |
Vivien Didelot | 8b0d3ea | 2017-05-16 14:10:33 -0400 | [diff] [blame] | 507 | dst->cpu_dp = port; |
Florian Fainelli | 6d3c8c0 | 2017-06-13 13:27:19 -0700 | [diff] [blame] | 508 | dst->cpu_dp->netdev = ethernet_dev; |
| 509 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 510 | |
Florian Fainelli | 14be36c | 2017-06-02 12:31:23 -0700 | [diff] [blame] | 511 | /* Initialize cpu_port_mask now for drv->setup() |
| 512 | * to have access to a correct value, just like what |
| 513 | * net/dsa/dsa.c::dsa_switch_setup_one does. |
| 514 | */ |
| 515 | ds->cpu_port_mask |= BIT(index); |
| 516 | |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 517 | tag_protocol = ds->ops->get_tag_protocol(ds); |
Vivien Didelot | 62fc958 | 2017-09-29 17:19:17 -0400 | [diff] [blame] | 518 | tag_ops = dsa_resolve_tag_protocol(tag_protocol); |
| 519 | if (IS_ERR(tag_ops)) { |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 520 | dev_warn(ds->dev, "No tagger for this switch\n"); |
| 521 | ds->cpu_port_mask &= ~BIT(index); |
Vivien Didelot | 62fc958 | 2017-09-29 17:19:17 -0400 | [diff] [blame] | 522 | return PTR_ERR(tag_ops); |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 523 | } |
| 524 | |
Vivien Didelot | 1524024 | 2017-09-29 17:19:18 -0400 | [diff] [blame] | 525 | dst->cpu_dp->tag_ops = tag_ops; |
Vivien Didelot | 62fc958 | 2017-09-29 17:19:17 -0400 | [diff] [blame] | 526 | dst->tag_ops = tag_ops; |
Vivien Didelot | 3e41f93 | 2017-09-29 17:19:19 -0400 | [diff] [blame^] | 527 | |
| 528 | /* Make a few copies for faster access in master receive hot path */ |
| 529 | dst->cpu_dp->rcv = dst->cpu_dp->tag_ops->rcv; |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 530 | dst->rcv = dst->tag_ops->rcv; |
Vivien Didelot | 3e41f93 | 2017-09-29 17:19:19 -0400 | [diff] [blame^] | 531 | dst->cpu_dp->dst = dst; |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 532 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 533 | return 0; |
| 534 | } |
| 535 | |
| 536 | static int dsa_ds_parse(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 537 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 538 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 539 | u32 index; |
| 540 | int err; |
| 541 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 542 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 543 | port = &ds->ports[index]; |
Florian Fainelli | 14be36c | 2017-06-02 12:31:23 -0700 | [diff] [blame] | 544 | if (!dsa_port_is_valid(port) || |
| 545 | dsa_port_is_dsa(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 546 | continue; |
| 547 | |
| 548 | if (dsa_port_is_cpu(port)) { |
| 549 | err = dsa_cpu_parse(port, index, dst, ds); |
| 550 | if (err) |
| 551 | return err; |
Florian Fainelli | 14be36c | 2017-06-02 12:31:23 -0700 | [diff] [blame] | 552 | } else { |
| 553 | /* Initialize enabled_port_mask now for drv->setup() |
| 554 | * to have access to a correct value, just like what |
| 555 | * net/dsa/dsa.c::dsa_switch_setup_one does. |
| 556 | */ |
| 557 | ds->enabled_port_mask |= BIT(index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 558 | } |
Florian Fainelli | 14be36c | 2017-06-02 12:31:23 -0700 | [diff] [blame] | 559 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 560 | } |
| 561 | |
| 562 | pr_info("DSA: switch %d %d parsed\n", dst->tree, ds->index); |
| 563 | |
| 564 | return 0; |
| 565 | } |
| 566 | |
| 567 | static int dsa_dst_parse(struct dsa_switch_tree *dst) |
| 568 | { |
| 569 | struct dsa_switch *ds; |
Vivien Didelot | e4b7778 | 2017-06-15 15:06:54 -0400 | [diff] [blame] | 570 | struct dsa_port *dp; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 571 | u32 index; |
Vivien Didelot | e4b7778 | 2017-06-15 15:06:54 -0400 | [diff] [blame] | 572 | int port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 573 | int err; |
| 574 | |
| 575 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 576 | ds = dst->ds[index]; |
| 577 | if (!ds) |
| 578 | continue; |
| 579 | |
| 580 | err = dsa_ds_parse(dst, ds); |
| 581 | if (err) |
| 582 | return err; |
| 583 | } |
| 584 | |
Florian Fainelli | c784839 | 2017-08-28 17:10:51 -0700 | [diff] [blame] | 585 | if (!dst->cpu_dp) { |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 586 | pr_warn("Tree has no master device\n"); |
| 587 | return -EINVAL; |
| 588 | } |
| 589 | |
Vivien Didelot | e4b7778 | 2017-06-15 15:06:54 -0400 | [diff] [blame] | 590 | /* Assign the default CPU port to all ports of the fabric */ |
| 591 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 592 | ds = dst->ds[index]; |
| 593 | if (!ds) |
| 594 | continue; |
| 595 | |
| 596 | for (port = 0; port < ds->num_ports; port++) { |
| 597 | dp = &ds->ports[port]; |
| 598 | if (!dsa_port_is_valid(dp) || |
| 599 | dsa_port_is_dsa(dp) || |
| 600 | dsa_port_is_cpu(dp)) |
| 601 | continue; |
| 602 | |
| 603 | dp->cpu_dp = dst->cpu_dp; |
| 604 | } |
| 605 | } |
| 606 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 607 | pr_info("DSA: tree %d parsed\n", dst->tree); |
| 608 | |
| 609 | return 0; |
| 610 | } |
| 611 | |
| 612 | static int dsa_parse_ports_dn(struct device_node *ports, struct dsa_switch *ds) |
| 613 | { |
| 614 | struct device_node *port; |
| 615 | int err; |
| 616 | u32 reg; |
| 617 | |
| 618 | for_each_available_child_of_node(ports, port) { |
| 619 | err = of_property_read_u32(port, "reg", ®); |
| 620 | if (err) |
| 621 | return err; |
| 622 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 623 | if (reg >= ds->num_ports) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 624 | return -EINVAL; |
| 625 | |
| 626 | ds->ports[reg].dn = port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 627 | } |
| 628 | |
| 629 | return 0; |
| 630 | } |
| 631 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 632 | static int dsa_parse_ports(struct dsa_chip_data *cd, struct dsa_switch *ds) |
| 633 | { |
| 634 | bool valid_name_found = false; |
| 635 | unsigned int i; |
| 636 | |
| 637 | for (i = 0; i < DSA_MAX_PORTS; i++) { |
| 638 | if (!cd->port_names[i]) |
| 639 | continue; |
| 640 | |
| 641 | ds->ports[i].name = cd->port_names[i]; |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 642 | valid_name_found = true; |
| 643 | } |
| 644 | |
| 645 | if (!valid_name_found && i == DSA_MAX_PORTS) |
| 646 | return -EINVAL; |
| 647 | |
| 648 | return 0; |
| 649 | } |
| 650 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 651 | static int dsa_parse_member_dn(struct device_node *np, u32 *tree, u32 *index) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 652 | { |
| 653 | int err; |
| 654 | |
| 655 | *tree = *index = 0; |
| 656 | |
| 657 | err = of_property_read_u32_index(np, "dsa,member", 0, tree); |
| 658 | if (err) { |
| 659 | /* Does not exist, but it is optional */ |
| 660 | if (err == -EINVAL) |
| 661 | return 0; |
| 662 | return err; |
| 663 | } |
| 664 | |
| 665 | err = of_property_read_u32_index(np, "dsa,member", 1, index); |
| 666 | if (err) |
| 667 | return err; |
| 668 | |
| 669 | if (*index >= DSA_MAX_SWITCHES) |
| 670 | return -EINVAL; |
| 671 | |
| 672 | return 0; |
| 673 | } |
| 674 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 675 | static int dsa_parse_member(struct dsa_chip_data *pd, u32 *tree, u32 *index) |
| 676 | { |
| 677 | if (!pd) |
| 678 | return -ENODEV; |
| 679 | |
| 680 | /* We do not support complex trees with dsa_chip_data */ |
| 681 | *tree = 0; |
| 682 | *index = 0; |
| 683 | |
| 684 | return 0; |
| 685 | } |
| 686 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 687 | static struct device_node *dsa_get_ports(struct dsa_switch *ds, |
| 688 | struct device_node *np) |
| 689 | { |
| 690 | struct device_node *ports; |
| 691 | |
| 692 | ports = of_get_child_by_name(np, "ports"); |
| 693 | if (!ports) { |
| 694 | dev_err(ds->dev, "no ports child node found\n"); |
| 695 | return ERR_PTR(-EINVAL); |
| 696 | } |
| 697 | |
| 698 | return ports; |
| 699 | } |
| 700 | |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 701 | static int _dsa_register_switch(struct dsa_switch *ds) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 702 | { |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 703 | struct dsa_chip_data *pdata = ds->dev->platform_data; |
| 704 | struct device_node *np = ds->dev->of_node; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 705 | struct dsa_switch_tree *dst; |
Florian Fainelli | bc1727d | 2017-01-26 10:45:54 -0800 | [diff] [blame] | 706 | struct device_node *ports; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 707 | u32 tree, index; |
Vivien Didelot | d390238 | 2016-07-06 20:03:54 -0400 | [diff] [blame] | 708 | int i, err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 709 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 710 | if (np) { |
| 711 | err = dsa_parse_member_dn(np, &tree, &index); |
| 712 | if (err) |
| 713 | return err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 714 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 715 | ports = dsa_get_ports(ds, np); |
| 716 | if (IS_ERR(ports)) |
| 717 | return PTR_ERR(ports); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 718 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 719 | err = dsa_parse_ports_dn(ports, ds); |
| 720 | if (err) |
| 721 | return err; |
| 722 | } else { |
| 723 | err = dsa_parse_member(pdata, &tree, &index); |
| 724 | if (err) |
| 725 | return err; |
| 726 | |
| 727 | err = dsa_parse_ports(pdata, ds); |
| 728 | if (err) |
| 729 | return err; |
| 730 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 731 | |
| 732 | dst = dsa_get_dst(tree); |
| 733 | if (!dst) { |
| 734 | dst = dsa_add_dst(tree); |
| 735 | if (!dst) |
| 736 | return -ENOMEM; |
| 737 | } |
| 738 | |
| 739 | if (dst->ds[index]) { |
| 740 | err = -EBUSY; |
| 741 | goto out; |
| 742 | } |
| 743 | |
| 744 | ds->dst = dst; |
| 745 | ds->index = index; |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 746 | ds->cd = pdata; |
Vivien Didelot | d390238 | 2016-07-06 20:03:54 -0400 | [diff] [blame] | 747 | |
| 748 | /* Initialize the routing table */ |
| 749 | for (i = 0; i < DSA_MAX_SWITCHES; ++i) |
| 750 | ds->rtable[i] = DSA_RTABLE_NONE; |
| 751 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 752 | dsa_dst_add_ds(dst, ds, index); |
| 753 | |
| 754 | err = dsa_dst_complete(dst); |
| 755 | if (err < 0) |
| 756 | goto out_del_dst; |
| 757 | |
| 758 | if (err == 1) { |
| 759 | /* Not all switches registered yet */ |
| 760 | err = 0; |
| 761 | goto out; |
| 762 | } |
| 763 | |
| 764 | if (dst->applied) { |
| 765 | pr_info("DSA: Disjoint trees?\n"); |
| 766 | return -EINVAL; |
| 767 | } |
| 768 | |
| 769 | err = dsa_dst_parse(dst); |
Volodymyr Bendiuga | 5e6eb45 | 2017-01-05 11:10:13 +0100 | [diff] [blame] | 770 | if (err) { |
| 771 | if (err == -EPROBE_DEFER) { |
| 772 | dsa_dst_del_ds(dst, ds, ds->index); |
| 773 | return err; |
| 774 | } |
| 775 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 776 | goto out_del_dst; |
Volodymyr Bendiuga | 5e6eb45 | 2017-01-05 11:10:13 +0100 | [diff] [blame] | 777 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 778 | |
| 779 | err = dsa_dst_apply(dst); |
| 780 | if (err) { |
| 781 | dsa_dst_unapply(dst); |
| 782 | goto out_del_dst; |
| 783 | } |
| 784 | |
| 785 | dsa_put_dst(dst); |
| 786 | return 0; |
| 787 | |
| 788 | out_del_dst: |
| 789 | dsa_dst_del_ds(dst, ds, ds->index); |
| 790 | out: |
| 791 | dsa_put_dst(dst); |
| 792 | |
| 793 | return err; |
| 794 | } |
| 795 | |
Vivien Didelot | a0c0216 | 2017-01-27 15:29:36 -0500 | [diff] [blame] | 796 | struct dsa_switch *dsa_switch_alloc(struct device *dev, size_t n) |
| 797 | { |
| 798 | size_t size = sizeof(struct dsa_switch) + n * sizeof(struct dsa_port); |
| 799 | struct dsa_switch *ds; |
Vivien Didelot | 818be84 | 2017-01-27 15:29:38 -0500 | [diff] [blame] | 800 | int i; |
Vivien Didelot | a0c0216 | 2017-01-27 15:29:36 -0500 | [diff] [blame] | 801 | |
| 802 | ds = devm_kzalloc(dev, size, GFP_KERNEL); |
| 803 | if (!ds) |
| 804 | return NULL; |
| 805 | |
| 806 | ds->dev = dev; |
| 807 | ds->num_ports = n; |
| 808 | |
Vivien Didelot | 818be84 | 2017-01-27 15:29:38 -0500 | [diff] [blame] | 809 | for (i = 0; i < ds->num_ports; ++i) { |
| 810 | ds->ports[i].index = i; |
| 811 | ds->ports[i].ds = ds; |
| 812 | } |
| 813 | |
Vivien Didelot | a0c0216 | 2017-01-27 15:29:36 -0500 | [diff] [blame] | 814 | return ds; |
| 815 | } |
| 816 | EXPORT_SYMBOL_GPL(dsa_switch_alloc); |
| 817 | |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 818 | int dsa_register_switch(struct dsa_switch *ds) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 819 | { |
| 820 | int err; |
| 821 | |
| 822 | mutex_lock(&dsa2_mutex); |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 823 | err = _dsa_register_switch(ds); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 824 | mutex_unlock(&dsa2_mutex); |
| 825 | |
| 826 | return err; |
| 827 | } |
| 828 | EXPORT_SYMBOL_GPL(dsa_register_switch); |
| 829 | |
Wei Yongjun | 85c22ba | 2016-07-12 15:24:10 +0000 | [diff] [blame] | 830 | static void _dsa_unregister_switch(struct dsa_switch *ds) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 831 | { |
| 832 | struct dsa_switch_tree *dst = ds->dst; |
| 833 | |
| 834 | dsa_dst_unapply(dst); |
| 835 | |
| 836 | dsa_dst_del_ds(dst, ds, ds->index); |
| 837 | } |
| 838 | |
| 839 | void dsa_unregister_switch(struct dsa_switch *ds) |
| 840 | { |
| 841 | mutex_lock(&dsa2_mutex); |
| 842 | _dsa_unregister_switch(ds); |
| 843 | mutex_unlock(&dsa2_mutex); |
| 844 | } |
| 845 | EXPORT_SYMBOL_GPL(dsa_unregister_switch); |