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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 3cfa958b08a4f81645903a364825b2b18f41c117 / . / arch / arm / boot / dts / imx53-cx9020.dts
blob: c875e23ee45fb936e025abbac515e30d6bc0eae7 [file] [log] [blame]
Patrick Bruenn9ef86e22017-07-26 14:05:34 +0200[diff] [blame]1/*
2 * Copyright 2017 Beckhoff Automation GmbH & Co. KG
3 * based on imx53-qsb.dts
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14#include "imx53.dtsi"
15
16/ {
17 model = "Beckhoff CX9020 Embedded PC";
18 compatible = "bhf,cx9020", "fsl,imx53";
19
20 chosen {
21 stdout-path = &uart2;
22 };
23
Marco Franchiad00e082018-01-24 11:22:14 -0200[diff] [blame]24 memory@70000000 {
Fabio Estevame8fd17b2018-11-05 19:14:46 -0200[diff] [blame]25 device_type = "memory";
Patrick Bruenn9ef86e22017-07-26 14:05:34 +0200[diff] [blame]26 reg = <0x70000000 0x20000000>,
27 <0xb0000000 0x20000000>;
28 };
29
30 display-0 {
31 #address-cells =<1>;
32 #size-cells = <0>;
33 compatible = "fsl,imx-parallel-display";
34 interface-pix-fmt = "rgb24";
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_ipu_disp0>;
37
38 port@0 {
39 reg = <0>;
40
41 display0_in: endpoint {
42 remote-endpoint = <&ipu_di0_disp0>;
43 };
44 };
45
46 port@1 {
47 reg = <1>;
48
49 display0_out: endpoint {
50 remote-endpoint = <&tfp410_in>;
51 };
52 };
53 };
54
55 dvi-connector {
56 compatible = "dvi-connector";
57 ddc-i2c-bus = <&i2c2>;
58 digital;
59
60 port {
61 dvi_connector_in: endpoint {
62 remote-endpoint = <&tfp410_out>;
63 };
64 };
65 };
66
67 dvi-converter {
68 #address-cells = <1>;
69 #size-cells = <0>;
70 compatible = "ti,tfp410";
71
72 port@0 {
73 reg = <0>;
74
75 tfp410_in: endpoint {
76 remote-endpoint = <&display0_out>;
77 };
78 };
79
80 port@1 {
81 reg = <1>;
82
83 tfp410_out: endpoint {
84 remote-endpoint = <&dvi_connector_in>;
85 };
86 };
87 };
88
89 leds {
90 compatible = "gpio-leds";
91
92 pwr-r {
93 gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
94 default-state = "off";
95 };
96
97 pwr-g {
98 gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
99 default-state = "on";
100 };
101
102 pwr-b {
103 gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
104 default-state = "off";
105 };
106
107 sd1-b {
108 linux,default-trigger = "mmc0";
109 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
110 };
111
112 sd2-b {
113 linux,default-trigger = "mmc1";
114 gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
115 };
116 };
117
118 regulator-3p2v {
119 compatible = "regulator-fixed";
120 regulator-name = "3P2V";
121 regulator-min-microvolt = <3200000>;
122 regulator-max-microvolt = <3200000>;
123 regulator-always-on;
124 };
125
126 reg_usb_vbus: regulator-vbus {
127 compatible = "regulator-fixed";
128 regulator-name = "usb_vbus";
129 regulator-min-microvolt = <5000000>;
130 regulator-max-microvolt = <5000000>;
131 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
132 enable-active-high;
133 };
134};
135
136&esdhc1 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_esdhc1>;
139 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
140 bus-width = <4>;
141 status = "okay";
142};
143
144&esdhc2 {
145 pinctrl-names = "default";
146 pinctrl-0 = <&pinctrl_esdhc2>;
147 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
148 bus-width = <4>;
149 status = "okay";
150};
151
152&fec {
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_fec>;
155 phy-mode = "rmii";
Fabio Estevamc709ddf2017-11-25 20:51:07 -0200[diff] [blame]156 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
Patrick Bruenn9ef86e22017-07-26 14:05:34 +0200[diff] [blame]157 status = "okay";
158};
159
160&i2c2 {
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_i2c2>;
163 status = "okay";
164};
165
166&ipu_di0_disp0 {
167 remote-endpoint = <&display0_in>;
168};
169
170&uart2 {
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_uart2>;
173 fsl,dte-mode;
174 status = "okay";
175};
176
177&usbh1 {
178 vbus-supply = <&reg_usb_vbus>;
179 phy_type = "utmi";
180 status = "okay";
181};
182
183&usbotg {
184 dr_mode = "peripheral";
185 status = "okay";
186};
187
188&vpu {
189 status = "okay";
190};
191
192&iomuxc {
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_hog>;
195
196 pinctrl_hog: hoggrp {
197 fsl,pins = <
198 MX53_PAD_GPIO_0__CCM_CLKO 0x1c4
199 MX53_PAD_GPIO_16__I2C3_SDA 0x1c4
200 MX53_PAD_EIM_D22__GPIO3_22 0x1c4
201 MX53_PAD_EIM_D23__GPIO3_23 0x1e4
202 MX53_PAD_EIM_D24__GPIO3_24 0x1e4
203 >;
204 };
205
206 pinctrl_esdhc1: esdhc1grp {
207 fsl,pins = <
208 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
209 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
210 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
211 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
212 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
213 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
214 MX53_PAD_GPIO_1__ESDHC1_CD 0x1c4
215 MX53_PAD_EIM_D17__GPIO3_17 0x1e4
216 MX53_PAD_GPIO_3__GPIO1_3 0x1c4
217 >;
218 };
219
220 pinctrl_esdhc2: esdhc2grp {
221 fsl,pins = <
222 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
223 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
224 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
225 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
226 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
227 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
228 MX53_PAD_GPIO_4__ESDHC2_CD 0x1e4
229 MX53_PAD_EIM_D20__GPIO3_20 0x1e4
230 MX53_PAD_GPIO_8__GPIO1_8 0x1c4
231 >;
232 };
233
234 pinctrl_fec: fecgrp {
235 fsl,pins = <
236 MX53_PAD_FEC_MDC__FEC_MDC 0x4
237 MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc
238 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180
239 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x180
240 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180
241 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180
242 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180
243 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4
244 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4
245 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4
246 >;
247 };
248
249 pinctrl_i2c2: i2c2grp {
250 fsl,pins = <
251 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
252 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
253 >;
254 };
255
256 pinctrl_ipu_disp0: ipudisp0grp {
257 fsl,pins = <
258 MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
259 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
260 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
261 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
262 MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5
263 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
264 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
265 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
266 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
267 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
268 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
269 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
270 MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
271 MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
272 MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
273 MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
274 MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
275 MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
276 MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
277 MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
278 MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
279 MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
280 MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
281 MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
282 MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
283 MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
284 MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
285 MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
286 MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
287 >;
288 };
289
290 pinctrl_uart2: uart2grp {
291 fsl,pins = <
292 MX53_PAD_EIM_D26__UART2_RXD_MUX 0x1e4
293 MX53_PAD_EIM_D27__UART2_TXD_MUX 0x1e4
294 MX53_PAD_EIM_D28__UART2_RTS 0x1e4
295 MX53_PAD_EIM_D29__UART2_CTS 0x1e4
296 >;
297 };
298};