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Chris Wilson73cb9702016-10-28 13:58:46 +01001/*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
Chris Wilsona89d1f92018-05-02 17:38:39 +010025#ifndef I915_TIMELINE_H
26#define I915_TIMELINE_H
Chris Wilson73cb9702016-10-28 13:58:46 +010027
Chris Wilson39e2f502019-03-08 13:25:17 +000028#include <linux/lockdep.h>
Chris Wilson73cb9702016-10-28 13:58:46 +010029
Chris Wilson47979482017-05-03 10:39:21 +010030#include "i915_syncmap.h"
Chris Wilson39e2f502019-03-08 13:25:17 +000031#include "i915_timeline_types.h"
Chris Wilson73cb9702016-10-28 13:58:46 +010032
Chris Wilson52954ed2019-01-28 18:18:09 +000033int i915_timeline_init(struct drm_i915_private *i915,
34 struct i915_timeline *tl,
35 const char *name,
36 struct i915_vma *hwsp);
Chris Wilsona89d1f92018-05-02 17:38:39 +010037void i915_timeline_fini(struct i915_timeline *tl);
Chris Wilson73cb9702016-10-28 13:58:46 +010038
Chris Wilsonf911e722018-11-15 20:38:51 +000039static inline void
40i915_timeline_set_subclass(struct i915_timeline *timeline,
41 unsigned int subclass)
42{
43 lockdep_set_subclass(&timeline->lock, subclass);
44
45 /*
46 * Due to an interesting quirk in lockdep's internal debug tracking,
47 * after setting a subclass we must ensure the lock is used. Otherwise,
48 * nr_unused_locks is incremented once too often.
49 */
50#ifdef CONFIG_DEBUG_LOCK_ALLOC
51 local_irq_disable();
52 lock_map_acquire(&timeline->lock.dep_map);
53 lock_map_release(&timeline->lock.dep_map);
54 local_irq_enable();
55#endif
56}
57
Chris Wilsona89d1f92018-05-02 17:38:39 +010058struct i915_timeline *
Chris Wilson52954ed2019-01-28 18:18:09 +000059i915_timeline_create(struct drm_i915_private *i915,
60 const char *name,
61 struct i915_vma *global_hwsp);
Chris Wilson65fcb802018-05-02 17:38:38 +010062
Chris Wilsona89d1f92018-05-02 17:38:39 +010063static inline struct i915_timeline *
64i915_timeline_get(struct i915_timeline *timeline)
65{
66 kref_get(&timeline->kref);
67 return timeline;
68}
69
70void __i915_timeline_free(struct kref *kref);
71static inline void i915_timeline_put(struct i915_timeline *timeline)
72{
73 kref_put(&timeline->kref, __i915_timeline_free);
74}
75
76static inline int __i915_timeline_sync_set(struct i915_timeline *tl,
77 u64 context, u32 seqno)
Chris Wilson47979482017-05-03 10:39:21 +010078{
79 return i915_syncmap_set(&tl->sync, context, seqno);
80}
81
Chris Wilsona89d1f92018-05-02 17:38:39 +010082static inline int i915_timeline_sync_set(struct i915_timeline *tl,
83 const struct dma_fence *fence)
Chris Wilson47979482017-05-03 10:39:21 +010084{
Chris Wilsona89d1f92018-05-02 17:38:39 +010085 return __i915_timeline_sync_set(tl, fence->context, fence->seqno);
Chris Wilson47979482017-05-03 10:39:21 +010086}
87
Chris Wilsona89d1f92018-05-02 17:38:39 +010088static inline bool __i915_timeline_sync_is_later(struct i915_timeline *tl,
89 u64 context, u32 seqno)
Chris Wilson47979482017-05-03 10:39:21 +010090{
91 return i915_syncmap_is_later(&tl->sync, context, seqno);
92}
93
Chris Wilsona89d1f92018-05-02 17:38:39 +010094static inline bool i915_timeline_sync_is_later(struct i915_timeline *tl,
95 const struct dma_fence *fence)
Chris Wilson47979482017-05-03 10:39:21 +010096{
Chris Wilsona89d1f92018-05-02 17:38:39 +010097 return __i915_timeline_sync_is_later(tl, fence->context, fence->seqno);
Chris Wilson47979482017-05-03 10:39:21 +010098}
99
Chris Wilson52954ed2019-01-28 18:18:09 +0000100int i915_timeline_pin(struct i915_timeline *tl);
Chris Wilsonebece752019-03-01 17:08:59 +0000101int i915_timeline_get_seqno(struct i915_timeline *tl,
102 struct i915_request *rq,
103 u32 *seqno);
Chris Wilson52954ed2019-01-28 18:18:09 +0000104void i915_timeline_unpin(struct i915_timeline *tl);
105
Chris Wilsonebece752019-03-01 17:08:59 +0000106int i915_timeline_read_hwsp(struct i915_request *from,
107 struct i915_request *until,
108 u32 *hwsp_offset);
109
Chris Wilson1e345562019-01-28 10:23:56 +0000110void i915_timelines_init(struct drm_i915_private *i915);
Chris Wilsona89d1f92018-05-02 17:38:39 +0100111void i915_timelines_park(struct drm_i915_private *i915);
Chris Wilson1e345562019-01-28 10:23:56 +0000112void i915_timelines_fini(struct drm_i915_private *i915);
Chris Wilsona89d1f92018-05-02 17:38:39 +0100113
Tvrtko Ursulin78108582019-02-05 09:50:30 +0000114/**
115 * i915_timeline_set_barrier - orders submission between different timelines
116 * @timeline: timeline to set the barrier on
117 * @rq: request after which new submissions can proceed
118 *
119 * Sets the passed in request as the serialization point for all subsequent
120 * submissions on @timeline. Subsequent requests will not be submitted to GPU
121 * until the barrier has been completed.
122 */
Chris Wilson21950ee2019-02-05 13:00:05 +0000123static inline int
124i915_timeline_set_barrier(struct i915_timeline *tl, struct i915_request *rq)
125{
126 return i915_active_request_set(&tl->barrier, rq);
127}
Tvrtko Ursulin78108582019-02-05 09:50:30 +0000128
Chris Wilson73cb9702016-10-28 13:58:46 +0100129#endif