H. Peter Anvin | 2decb19 | 2010-07-19 18:32:04 -0700 | [diff] [blame] | 1 | /* |
Maxime Jayat | 3f79410 | 2013-10-12 01:29:46 +0200 | [diff] [blame] | 2 | * Routines to identify additional cpu features that are scattered in |
H. Peter Anvin | 2decb19 | 2010-07-19 18:32:04 -0700 | [diff] [blame] | 3 | * cpuid space. |
| 4 | */ |
| 5 | #include <linux/cpu.h> |
| 6 | |
| 7 | #include <asm/pat.h> |
| 8 | #include <asm/processor.h> |
| 9 | |
| 10 | #include <asm/apic.h> |
| 11 | |
| 12 | struct cpuid_bit { |
| 13 | u16 feature; |
| 14 | u8 reg; |
| 15 | u8 bit; |
| 16 | u32 level; |
| 17 | u32 sub_leaf; |
| 18 | }; |
| 19 | |
He Chen | 47bdf33 | 2016-11-11 17:25:35 +0800 | [diff] [blame] | 20 | /* Please keep the leaf sorted by cpuid_bit.level for faster search. */ |
| 21 | static const struct cpuid_bit cpuid_bits[] = { |
| 22 | { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, |
Thomas Gleixner | 7ce7f35 | 2016-11-16 14:19:34 +0100 | [diff] [blame] | 23 | { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, |
Thomas Gleixner | 7ce7f35 | 2016-11-16 14:19:34 +0100 | [diff] [blame] | 24 | { X86_FEATURE_CAT_L3, CPUID_EBX, 1, 0x00000010, 0 }, |
| 25 | { X86_FEATURE_CAT_L2, CPUID_EBX, 2, 0x00000010, 0 }, |
| 26 | { X86_FEATURE_CDP_L3, CPUID_ECX, 2, 0x00000010, 1 }, |
Fenghua Yu | a511e79 | 2017-12-20 14:57:21 -0800 | [diff] [blame] | 27 | { X86_FEATURE_CDP_L2, CPUID_ECX, 2, 0x00000010, 2 }, |
Vikas Shivappa | ab66a33 | 2017-04-07 17:33:52 -0700 | [diff] [blame] | 28 | { X86_FEATURE_MBA, CPUID_EBX, 3, 0x00000010, 0 }, |
Thomas Gleixner | 7ce7f35 | 2016-11-16 14:19:34 +0100 | [diff] [blame] | 29 | { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, |
| 30 | { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, |
He Chen | 47bdf33 | 2016-11-11 17:25:35 +0800 | [diff] [blame] | 31 | { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, |
Tom Lendacky | 872cbef | 2017-07-17 16:10:01 -0500 | [diff] [blame] | 32 | { X86_FEATURE_SME, CPUID_EAX, 0, 0x8000001f, 0 }, |
Tom Lendacky | 18c71ce | 2017-12-04 10:57:23 -0600 | [diff] [blame] | 33 | { X86_FEATURE_SEV, CPUID_EAX, 1, 0x8000001f, 0 }, |
He Chen | 47bdf33 | 2016-11-11 17:25:35 +0800 | [diff] [blame] | 34 | { 0, 0, 0, 0, 0 } |
H. Peter Anvin | 2decb19 | 2010-07-19 18:32:04 -0700 | [diff] [blame] | 35 | }; |
| 36 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 37 | void init_scattered_cpuid_features(struct cpuinfo_x86 *c) |
H. Peter Anvin | 2decb19 | 2010-07-19 18:32:04 -0700 | [diff] [blame] | 38 | { |
| 39 | u32 max_level; |
| 40 | u32 regs[4]; |
| 41 | const struct cpuid_bit *cb; |
| 42 | |
H. Peter Anvin | 2decb19 | 2010-07-19 18:32:04 -0700 | [diff] [blame] | 43 | for (cb = cpuid_bits; cb->feature; cb++) { |
| 44 | |
| 45 | /* Verify that the level is valid */ |
| 46 | max_level = cpuid_eax(cb->level & 0xffff0000); |
| 47 | if (max_level < cb->level || |
| 48 | max_level > (cb->level | 0xffff)) |
| 49 | continue; |
| 50 | |
He Chen | 47f10a3 | 2016-11-11 17:25:34 +0800 | [diff] [blame] | 51 | cpuid_count(cb->level, cb->sub_leaf, ®s[CPUID_EAX], |
| 52 | ®s[CPUID_EBX], ®s[CPUID_ECX], |
| 53 | ®s[CPUID_EDX]); |
H. Peter Anvin | 2decb19 | 2010-07-19 18:32:04 -0700 | [diff] [blame] | 54 | |
| 55 | if (regs[cb->reg] & (1 << cb->bit)) |
| 56 | set_cpu_cap(c, cb->feature); |
| 57 | } |
| 58 | } |
He Chen | 47bdf33 | 2016-11-11 17:25:35 +0800 | [diff] [blame] | 59 | |
| 60 | u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf, |
| 61 | enum cpuid_regs_idx reg) |
| 62 | { |
| 63 | const struct cpuid_bit *cb; |
| 64 | u32 cpuid_val = 0; |
| 65 | |
| 66 | for (cb = cpuid_bits; cb->feature; cb++) { |
| 67 | |
| 68 | if (level > cb->level) |
| 69 | continue; |
| 70 | |
| 71 | if (level < cb->level) |
| 72 | break; |
| 73 | |
| 74 | if (reg == cb->reg && sub_leaf == cb->sub_leaf) { |
| 75 | if (cpu_has(&boot_cpu_data, cb->feature)) |
| 76 | cpuid_val |= BIT(cb->bit); |
| 77 | } |
| 78 | } |
| 79 | |
| 80 | return cpuid_val; |
| 81 | } |
| 82 | EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf); |