blob: 6739a74551741dfbc5522bba6381a9b9e3856070 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010050#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080051
Jesse Barnes79e53942008-11-07 14:24:08 -080052
Chris Wilson2e88e402010-08-07 11:01:27 +010053static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080054 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61};
62
63#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
Chris Wilsonea5b2132010-08-04 13:50:23 +010065struct intel_sdvo {
66 struct intel_encoder base;
67
Chris Wilsonf899fc62010-07-20 15:44:45 -070068 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070069 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080070
Chris Wilsone957d772010-09-24 12:52:03 +010071 struct i2c_adapter ddc;
72
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070074 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080075
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /*
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
82 */
Jesse Barnes79e53942008-11-07 14:24:08 -080083 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080084
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 int pixel_clock_min, pixel_clock_max;
87
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080088 /*
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
91 */
92 uint16_t attached_output;
93
Jesse Barnese2f0ba92009-02-02 15:11:52 -080094 /**
95 * This is set if we're going to treat the device as TV-out.
96 *
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
100 */
101 bool is_tv;
102
Zhao Yakuice6feab2009-08-24 13:50:26 +0800103 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100104 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800105
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800106 /**
107 * This is set if we treat the device as HDMI, instead of DVI.
108 */
109 bool is_hdmi;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100110 bool has_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800111
Ma Ling7086c872009-05-13 11:20:06 +0800112 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100113 * This is set if we detect output of sdvo device as LVDS and
114 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800115 */
116 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800117
118 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800119 * This is sdvo fixed pannel mode pointer
120 */
121 struct drm_display_mode *sdvo_lvds_fixed_mode;
122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /*
124 * supported encoding mode, used to determine whether HDMI is
125 * supported
126 */
127 struct intel_sdvo_encode encode;
128
Eric Anholtc751ce42010-03-25 11:48:48 -0700129 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800130 uint8_t ddc_bus;
131
Chris Wilson6c9547f2010-08-25 10:05:17 +0100132 /* Input timings for adjusted_mode */
133 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800134};
135
136struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100137 struct intel_connector base;
138
Zhenyu Wang14571b42010-03-30 14:06:33 +0800139 /* Mark the type of connector */
140 uint16_t output_flag;
141
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100142 int force_audio;
143
Zhenyu Wang14571b42010-03-30 14:06:33 +0800144 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100145 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800146 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100147 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800148
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100149 struct drm_property *force_audio_property;
150
Zhao Yakuib9219c52009-09-10 15:45:46 +0800151 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100152 struct drm_property *left;
153 struct drm_property *right;
154 struct drm_property *top;
155 struct drm_property *bottom;
156 struct drm_property *hpos;
157 struct drm_property *vpos;
158 struct drm_property *contrast;
159 struct drm_property *saturation;
160 struct drm_property *hue;
161 struct drm_property *sharpness;
162 struct drm_property *flicker_filter;
163 struct drm_property *flicker_filter_adaptive;
164 struct drm_property *flicker_filter_2d;
165 struct drm_property *tv_chroma_filter;
166 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100167 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800168
169 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100170 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800171
172 /* Add variable to record current setting for the above property */
173 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100174
Zhao Yakuib9219c52009-09-10 15:45:46 +0800175 /* this is to get the range of margin.*/
176 u32 max_hscan, max_vscan;
177 u32 max_hpos, cur_hpos;
178 u32 max_vpos, cur_vpos;
179 u32 cur_brightness, max_brightness;
180 u32 cur_contrast, max_contrast;
181 u32 cur_saturation, max_saturation;
182 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100183 u32 cur_sharpness, max_sharpness;
184 u32 cur_flicker_filter, max_flicker_filter;
185 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
186 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
187 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
188 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100189 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800190};
191
Chris Wilson890f3352010-09-14 16:46:59 +0100192static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100193{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100194 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100195}
196
Chris Wilsondf0e9242010-09-09 16:20:55 +0100197static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
198{
199 return container_of(intel_attached_encoder(connector),
200 struct intel_sdvo, base);
201}
202
Chris Wilson615fb932010-08-04 13:50:24 +0100203static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
204{
205 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
206}
207
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800208static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100209intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100210static bool
211intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
212 struct intel_sdvo_connector *intel_sdvo_connector,
213 int type);
214static bool
215intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
216 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800217
Jesse Barnes79e53942008-11-07 14:24:08 -0800218/**
219 * Writes the SDVOB or SDVOC with the given value, but always writes both
220 * SDVOB and SDVOC to work around apparent hardware issues (according to
221 * comments in the BIOS).
222 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100223static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800224{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100225 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800226 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800227 u32 bval = val, cval = val;
228 int i;
229
Chris Wilsonea5b2132010-08-04 13:50:23 +0100230 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
231 I915_WRITE(intel_sdvo->sdvo_reg, val);
232 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800233 return;
234 }
235
Chris Wilsonea5b2132010-08-04 13:50:23 +0100236 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800237 cval = I915_READ(SDVOC);
238 } else {
239 bval = I915_READ(SDVOB);
240 }
241 /*
242 * Write the registers twice for luck. Sometimes,
243 * writing them only once doesn't appear to 'stick'.
244 * The BIOS does this too. Yay, magic
245 */
246 for (i = 0; i < 2; i++)
247 {
248 I915_WRITE(SDVOB, bval);
249 I915_READ(SDVOB);
250 I915_WRITE(SDVOC, cval);
251 I915_READ(SDVOC);
252 }
253}
254
Chris Wilson32aad862010-08-04 13:50:25 +0100255static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800256{
Jesse Barnes79e53942008-11-07 14:24:08 -0800257 struct i2c_msg msgs[] = {
258 {
Chris Wilsone957d772010-09-24 12:52:03 +0100259 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800260 .flags = 0,
261 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100262 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800263 },
264 {
Chris Wilsone957d772010-09-24 12:52:03 +0100265 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800266 .flags = I2C_M_RD,
267 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100268 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800269 }
270 };
Chris Wilson32aad862010-08-04 13:50:25 +0100271 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800272
Chris Wilsonf899fc62010-07-20 15:44:45 -0700273 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800274 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800275
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800276 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800277 return false;
278}
279
Jesse Barnes79e53942008-11-07 14:24:08 -0800280#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
281/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100282static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800283 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100284 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800285} sdvo_cmd_names[] = {
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100329
Zhao Yakuib9219c52009-09-10 15:45:46 +0800330 /* Add the op code for SDVO enhancements */
Chris Wilsonc5521702010-08-04 13:50:28 +0100331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Chris Wilsonc5521702010-08-04 13:50:28 +0100355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
375
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800376 /* HDMI op code */
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800397};
398
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800399#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100400#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800401
Chris Wilsonea5b2132010-08-04 13:50:23 +0100402static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100403 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800404{
Jesse Barnes79e53942008-11-07 14:24:08 -0800405 int i;
406
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800407 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100408 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800409 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800410 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800412 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400413 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800414 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800415 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800416 break;
417 }
418 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400419 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800420 DRM_LOG_KMS("(%02X)", cmd);
421 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800422}
Jesse Barnes79e53942008-11-07 14:24:08 -0800423
Jesse Barnes79e53942008-11-07 14:24:08 -0800424static const char *cmd_status_names[] = {
425 "Power on",
426 "Success",
427 "Not supported",
428 "Invalid arg",
429 "Pending",
430 "Target not specified",
431 "Scaling not supported"
432};
433
Chris Wilsone957d772010-09-24 12:52:03 +0100434static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
435 const void *args, int args_len)
436{
437 u8 buf[args_len*2 + 2], status;
438 struct i2c_msg msgs[args_len + 3];
439 int i, ret;
440
441 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
442
443 for (i = 0; i < args_len; i++) {
444 msgs[i].addr = intel_sdvo->slave_addr;
445 msgs[i].flags = 0;
446 msgs[i].len = 2;
447 msgs[i].buf = buf + 2 *i;
448 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
449 buf[2*i + 1] = ((u8*)args)[i];
450 }
451 msgs[i].addr = intel_sdvo->slave_addr;
452 msgs[i].flags = 0;
453 msgs[i].len = 2;
454 msgs[i].buf = buf + 2*i;
455 buf[2*i + 0] = SDVO_I2C_OPCODE;
456 buf[2*i + 1] = cmd;
457
458 /* the following two are to read the response */
459 status = SDVO_I2C_CMD_STATUS;
460 msgs[i+1].addr = intel_sdvo->slave_addr;
461 msgs[i+1].flags = 0;
462 msgs[i+1].len = 1;
463 msgs[i+1].buf = &status;
464
465 msgs[i+2].addr = intel_sdvo->slave_addr;
466 msgs[i+2].flags = I2C_M_RD;
467 msgs[i+2].len = 1;
468 msgs[i+2].buf = &status;
469
470 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
471 if (ret < 0) {
472 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
473 return false;
474 }
475 if (ret != i+3) {
476 /* failure in I2C transfer */
477 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
478 return false;
479 }
480
481 i = 3;
482 while (status == SDVO_CMD_STATUS_PENDING && i--) {
483 if (!intel_sdvo_read_byte(intel_sdvo,
484 SDVO_I2C_CMD_STATUS,
485 &status))
486 return false;
487 }
488 if (status != SDVO_CMD_STATUS_SUCCESS) {
489 DRM_DEBUG_KMS("command returns response %s [%d]\n",
490 status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
491 status);
492 return false;
493 }
494
495 return true;
496}
497
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100498static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
499 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800500{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100501 u8 retry = 5;
502 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800503 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800504
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100505 /*
506 * The documentation states that all commands will be
507 * processed within 15µs, and that we need only poll
508 * the status byte a maximum of 3 times in order for the
509 * command to be complete.
510 *
511 * Check 5 times in case the hardware failed to read the docs.
512 */
513 do {
514 if (!intel_sdvo_read_byte(intel_sdvo,
515 SDVO_I2C_CMD_STATUS,
516 &status))
517 return false;
518 } while (status == SDVO_CMD_STATUS_PENDING && --retry);
519
Chris Wilsonea5b2132010-08-04 13:50:23 +0100520 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -0800521 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800522 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800523 else
yakui_zhao342dc382009-06-02 14:12:00 +0800524 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800525
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100526 if (status != SDVO_CMD_STATUS_SUCCESS)
527 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800528
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100529 /* Read the command response */
530 for (i = 0; i < response_len; i++) {
531 if (!intel_sdvo_read_byte(intel_sdvo,
532 SDVO_I2C_RETURN_0 + i,
533 &((u8 *)response)[i]))
534 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100535 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800536 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100537 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100538 return true;
539
540log_fail:
541 DRM_LOG_KMS("\n");
542 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800543}
544
Hannes Ederb358d0a2008-12-18 21:18:47 +0100545static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800546{
547 if (mode->clock >= 100000)
548 return 1;
549 else if (mode->clock >= 50000)
550 return 2;
551 else
552 return 4;
553}
554
Chris Wilsone957d772010-09-24 12:52:03 +0100555static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
556 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800557{
Chris Wilsone957d772010-09-24 12:52:03 +0100558 return intel_sdvo_write_cmd(intel_sdvo,
559 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
560 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800561}
562
Chris Wilson32aad862010-08-04 13:50:25 +0100563static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
564{
Chris Wilsone957d772010-09-24 12:52:03 +0100565 return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
Chris Wilson32aad862010-08-04 13:50:25 +0100566}
567
568static bool
569intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
570{
571 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
572 return false;
573
574 return intel_sdvo_read_response(intel_sdvo, value, len);
575}
576
577static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800578{
579 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100580 return intel_sdvo_set_value(intel_sdvo,
581 SDVO_CMD_SET_TARGET_INPUT,
582 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800583}
584
585/**
586 * Return whether each input is trained.
587 *
588 * This function is making an assumption about the layout of the response,
589 * which should be checked against the docs.
590 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100591static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800592{
593 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800594
Chris Wilson32aad862010-08-04 13:50:25 +0100595 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
596 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800597 return false;
598
599 *input_1 = response.input0_trained;
600 *input_2 = response.input1_trained;
601 return true;
602}
603
Chris Wilsonea5b2132010-08-04 13:50:23 +0100604static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800605 u16 outputs)
606{
Chris Wilson32aad862010-08-04 13:50:25 +0100607 return intel_sdvo_set_value(intel_sdvo,
608 SDVO_CMD_SET_ACTIVE_OUTPUTS,
609 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800610}
611
Chris Wilsonea5b2132010-08-04 13:50:23 +0100612static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800613 int mode)
614{
Chris Wilson32aad862010-08-04 13:50:25 +0100615 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800616
617 switch (mode) {
618 case DRM_MODE_DPMS_ON:
619 state = SDVO_ENCODER_STATE_ON;
620 break;
621 case DRM_MODE_DPMS_STANDBY:
622 state = SDVO_ENCODER_STATE_STANDBY;
623 break;
624 case DRM_MODE_DPMS_SUSPEND:
625 state = SDVO_ENCODER_STATE_SUSPEND;
626 break;
627 case DRM_MODE_DPMS_OFF:
628 state = SDVO_ENCODER_STATE_OFF;
629 break;
630 }
631
Chris Wilson32aad862010-08-04 13:50:25 +0100632 return intel_sdvo_set_value(intel_sdvo,
633 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800634}
635
Chris Wilsonea5b2132010-08-04 13:50:23 +0100636static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800637 int *clock_min,
638 int *clock_max)
639{
640 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800641
Chris Wilson32aad862010-08-04 13:50:25 +0100642 if (!intel_sdvo_get_value(intel_sdvo,
643 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
644 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800645 return false;
646
647 /* Convert the values from units of 10 kHz to kHz. */
648 *clock_min = clocks.min * 10;
649 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800650 return true;
651}
652
Chris Wilsonea5b2132010-08-04 13:50:23 +0100653static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800654 u16 outputs)
655{
Chris Wilson32aad862010-08-04 13:50:25 +0100656 return intel_sdvo_set_value(intel_sdvo,
657 SDVO_CMD_SET_TARGET_OUTPUT,
658 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800659}
660
Chris Wilsonea5b2132010-08-04 13:50:23 +0100661static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 struct intel_sdvo_dtd *dtd)
663{
Chris Wilson32aad862010-08-04 13:50:25 +0100664 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
665 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800666}
667
Chris Wilsonea5b2132010-08-04 13:50:23 +0100668static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800669 struct intel_sdvo_dtd *dtd)
670{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100671 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800672 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
673}
674
Chris Wilsonea5b2132010-08-04 13:50:23 +0100675static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800676 struct intel_sdvo_dtd *dtd)
677{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100678 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800679 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
680}
681
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800682static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100683intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800684 uint16_t clock,
685 uint16_t width,
686 uint16_t height)
687{
688 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800689
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800690 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800691 args.clock = clock;
692 args.width = width;
693 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800694 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800695
Chris Wilsonea5b2132010-08-04 13:50:23 +0100696 if (intel_sdvo->is_lvds &&
697 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
698 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800699 args.scaled = 1;
700
Chris Wilson32aad862010-08-04 13:50:25 +0100701 return intel_sdvo_set_value(intel_sdvo,
702 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
703 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800704}
705
Chris Wilsonea5b2132010-08-04 13:50:23 +0100706static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800707 struct intel_sdvo_dtd *dtd)
708{
Chris Wilson32aad862010-08-04 13:50:25 +0100709 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
710 &dtd->part1, sizeof(dtd->part1)) &&
711 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
712 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800713}
Jesse Barnes79e53942008-11-07 14:24:08 -0800714
Chris Wilsonea5b2132010-08-04 13:50:23 +0100715static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800716{
Chris Wilson32aad862010-08-04 13:50:25 +0100717 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800718}
719
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800720static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100721 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800722{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800723 uint16_t width, height;
724 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
725 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800726
727 width = mode->crtc_hdisplay;
728 height = mode->crtc_vdisplay;
729
730 /* do some mode translations */
731 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
732 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
733
734 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
735 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
736
737 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
738 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
739
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800740 dtd->part1.clock = mode->clock / 10;
741 dtd->part1.h_active = width & 0xff;
742 dtd->part1.h_blank = h_blank_len & 0xff;
743 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800744 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800745 dtd->part1.v_active = height & 0xff;
746 dtd->part1.v_blank = v_blank_len & 0xff;
747 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800748 ((v_blank_len >> 8) & 0xf);
749
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800750 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800751 dtd->part2.h_sync_width = h_sync_len & 0xff;
752 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800753 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800755 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
756 ((v_sync_len & 0x30) >> 4);
757
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800758 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800759 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800760 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800761 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800763
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800764 dtd->part2.sdvo_flags = 0;
765 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
766 dtd->part2.reserved = 0;
767}
Jesse Barnes79e53942008-11-07 14:24:08 -0800768
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100770 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800771{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772 mode->hdisplay = dtd->part1.h_active;
773 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
774 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800775 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800776 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
777 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
778 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
779 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
780
781 mode->vdisplay = dtd->part1.v_active;
782 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
783 mode->vsync_start = mode->vdisplay;
784 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800785 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800786 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
787 mode->vsync_end = mode->vsync_start +
788 (dtd->part2.v_sync_off_width & 0xf);
789 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
790 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
791 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
792
793 mode->clock = dtd->part1.clock * 10;
794
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800795 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800796 if (dtd->part2.dtd_flags & 0x2)
797 mode->flags |= DRM_MODE_FLAG_PHSYNC;
798 if (dtd->part2.dtd_flags & 0x4)
799 mode->flags |= DRM_MODE_FLAG_PVSYNC;
800}
801
Chris Wilsonea5b2132010-08-04 13:50:23 +0100802static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803 struct intel_sdvo_encode *encode)
804{
Chris Wilson32aad862010-08-04 13:50:25 +0100805 if (intel_sdvo_get_value(intel_sdvo,
806 SDVO_CMD_GET_SUPP_ENCODE,
807 encode, sizeof(*encode)))
808 return true;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800809
Chris Wilson32aad862010-08-04 13:50:25 +0100810 /* non-support means DVI */
811 memset(encode, 0, sizeof(*encode));
812 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800813}
814
Chris Wilsonea5b2132010-08-04 13:50:23 +0100815static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700816 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800817{
Chris Wilson32aad862010-08-04 13:50:25 +0100818 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800819}
820
Chris Wilsonea5b2132010-08-04 13:50:23 +0100821static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800822 uint8_t mode)
823{
Chris Wilson32aad862010-08-04 13:50:25 +0100824 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800825}
826
827#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100828static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829{
830 int i, j;
831 uint8_t set_buf_index[2];
832 uint8_t av_split;
833 uint8_t buf_size;
834 uint8_t buf[48];
835 uint8_t *pos;
836
Chris Wilson32aad862010-08-04 13:50:25 +0100837 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800838
839 for (i = 0; i <= av_split; i++) {
840 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700841 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700843 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
844 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800845
846 pos = buf;
847 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700848 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700850 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800851 pos += 8;
852 }
853 }
854}
855#endif
856
David Härdeman3c17fe42010-09-24 21:44:32 +0200857static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800858{
859 struct dip_infoframe avi_if = {
860 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200861 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862 .len = DIP_LEN_AVI,
863 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200864 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
865 uint8_t set_buf_index[2] = { 1, 0 };
866 uint64_t *data = (uint64_t *)&avi_if;
867 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800868
David Härdeman3c17fe42010-09-24 21:44:32 +0200869 intel_dip_infoframe_csum(&avi_if);
870
871 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
872 set_buf_index, 2))
873 return false;
874
875 for (i = 0; i < sizeof(avi_if); i += 8) {
876 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
877 data, 8))
878 return false;
879 data++;
880 }
881
882 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
883 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800884}
885
Chris Wilson32aad862010-08-04 13:50:25 +0100886static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800887{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800888 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100889 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800890
Chris Wilson40039752010-08-04 13:50:26 +0100891 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800892 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100893 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800894
Chris Wilson32aad862010-08-04 13:50:25 +0100895 BUILD_BUG_ON(sizeof(format) != 6);
896 return intel_sdvo_set_value(intel_sdvo,
897 SDVO_CMD_SET_TV_FORMAT,
898 &format, sizeof(format));
899}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800900
Chris Wilson32aad862010-08-04 13:50:25 +0100901static bool
902intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
903 struct drm_display_mode *mode)
904{
905 struct intel_sdvo_dtd output_dtd;
906
907 if (!intel_sdvo_set_target_output(intel_sdvo,
908 intel_sdvo->attached_output))
909 return false;
910
911 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
912 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
913 return false;
914
915 return true;
916}
917
918static bool
919intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
920 struct drm_display_mode *mode,
921 struct drm_display_mode *adjusted_mode)
922{
Chris Wilson32aad862010-08-04 13:50:25 +0100923 /* Reset the input timing to the screen. Assume always input 0. */
924 if (!intel_sdvo_set_target_input(intel_sdvo))
925 return false;
926
927 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
928 mode->clock / 10,
929 mode->hdisplay,
930 mode->vdisplay))
931 return false;
932
933 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100934 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100935 return false;
936
Chris Wilson6c9547f2010-08-25 10:05:17 +0100937 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100938
939 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100940 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800941}
942
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800943static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
944 struct drm_display_mode *mode,
945 struct drm_display_mode *adjusted_mode)
946{
Chris Wilson890f3352010-09-14 16:46:59 +0100947 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100948 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800949
Chris Wilson32aad862010-08-04 13:50:25 +0100950 /* We need to construct preferred input timings based on our
951 * output timings. To do that, we have to set the output
952 * timings, even though this isn't really the right place in
953 * the sequence to do it. Oh well.
954 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100955 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100956 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800957 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100958
Pavel Roskinc74696b2010-09-02 14:46:34 -0400959 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
960 mode,
961 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100962 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100963 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100964 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800965 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800966
Pavel Roskinc74696b2010-09-02 14:46:34 -0400967 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
968 mode,
969 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800970 }
Chris Wilson32aad862010-08-04 13:50:25 +0100971
972 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100973 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100974 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100975 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
976 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100977
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800978 return true;
979}
980
981static void intel_sdvo_mode_set(struct drm_encoder *encoder,
982 struct drm_display_mode *mode,
983 struct drm_display_mode *adjusted_mode)
984{
985 struct drm_device *dev = encoder->dev;
986 struct drm_i915_private *dev_priv = dev->dev_private;
987 struct drm_crtc *crtc = encoder->crtc;
988 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100989 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100990 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800991 struct intel_sdvo_in_out_map in_out;
992 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +0100993 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
994 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800995
996 if (!mode)
997 return;
998
999 /* First, set the input mapping for the first input to our controlled
1000 * output. This is only correct if we're a single-input device, in
1001 * which case the first input is the output from the appropriate SDVO
1002 * channel on the motherboard. In a two-input device, the first input
1003 * will be SDVOB and the second SDVOC.
1004 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001005 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001006 in_out.in1 = 0;
1007
Pavel Roskinc74696b2010-09-02 14:46:34 -04001008 intel_sdvo_set_value(intel_sdvo,
1009 SDVO_CMD_SET_IN_OUT_MAP,
1010 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001011
Chris Wilson6c9547f2010-08-25 10:05:17 +01001012 /* Set the output timings to the screen */
1013 if (!intel_sdvo_set_target_output(intel_sdvo,
1014 intel_sdvo->attached_output))
1015 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001016
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001017 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001018 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001019 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001020 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1021 input_dtd = intel_sdvo->input_dtd;
1022 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001023 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001024 if (!intel_sdvo_set_target_output(intel_sdvo,
1025 intel_sdvo->attached_output))
1026 return;
1027
Chris Wilson6c9547f2010-08-25 10:05:17 +01001028 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001029 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001030 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001031
1032 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001033 if (!intel_sdvo_set_target_input(intel_sdvo))
1034 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001035
Chris Wilson6c9547f2010-08-25 10:05:17 +01001036 if (intel_sdvo->is_hdmi &&
David Härdeman3c17fe42010-09-24 21:44:32 +02001037 !intel_sdvo_set_avi_infoframe(intel_sdvo))
Chris Wilson6c9547f2010-08-25 10:05:17 +01001038 return;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001039
Chris Wilson6c9547f2010-08-25 10:05:17 +01001040 if (intel_sdvo->is_tv &&
1041 !intel_sdvo_set_tv_format(intel_sdvo))
1042 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001043
Pavel Roskinc74696b2010-09-02 14:46:34 -04001044 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001045
Chris Wilson6c9547f2010-08-25 10:05:17 +01001046 switch (pixel_multiplier) {
1047 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001048 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1049 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1050 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001051 }
Chris Wilson32aad862010-08-04 13:50:25 +01001052 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1053 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001054
1055 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001056 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001057 sdvox = SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001058 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1059 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1060 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1061 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001062 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001063 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001064 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001065 case SDVOB:
1066 sdvox &= SDVOB_PRESERVE_MASK;
1067 break;
1068 case SDVOC:
1069 sdvox &= SDVOC_PRESERVE_MASK;
1070 break;
1071 }
1072 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1073 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001074 if (intel_crtc->pipe == 1)
1075 sdvox |= SDVO_PIPE_B_SELECT;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001076 if (intel_sdvo->has_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001077 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001078
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001079 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001080 /* done in crtc_mode_set as the dpll_md reg must be written early */
1081 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1082 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001083 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001084 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001085 }
1086
Chris Wilson6c9547f2010-08-25 10:05:17 +01001087 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001088 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001089 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001090}
1091
1092static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1093{
1094 struct drm_device *dev = encoder->dev;
1095 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001096 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001097 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001098 u32 temp;
1099
1100 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001101 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001102 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001103 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001104
1105 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001106 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001107 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001108 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001109 }
1110 }
1111 } else {
1112 bool input1, input2;
1113 int i;
1114 u8 status;
1115
Chris Wilsonea5b2132010-08-04 13:50:23 +01001116 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001117 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001118 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001119 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001120 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001121
Chris Wilson32aad862010-08-04 13:50:25 +01001122 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001123 /* Warn if the device reported failure to sync.
1124 * A lot of SDVO devices fail to notify of sync, but it's
1125 * a given it the status is a success, we succeeded.
1126 */
1127 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001128 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001129 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001130 }
1131
1132 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001133 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1134 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001135 }
1136 return;
1137}
1138
Jesse Barnes79e53942008-11-07 14:24:08 -08001139static int intel_sdvo_mode_valid(struct drm_connector *connector,
1140 struct drm_display_mode *mode)
1141{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001142 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001143
1144 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1145 return MODE_NO_DBLESCAN;
1146
Chris Wilsonea5b2132010-08-04 13:50:23 +01001147 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001148 return MODE_CLOCK_LOW;
1149
Chris Wilsonea5b2132010-08-04 13:50:23 +01001150 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001151 return MODE_CLOCK_HIGH;
1152
Chris Wilson85454232010-08-08 14:28:23 +01001153 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001154 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001155 return MODE_PANEL;
1156
Chris Wilsonea5b2132010-08-04 13:50:23 +01001157 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001158 return MODE_PANEL;
1159 }
1160
Jesse Barnes79e53942008-11-07 14:24:08 -08001161 return MODE_OK;
1162}
1163
Chris Wilsonea5b2132010-08-04 13:50:23 +01001164static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001165{
Chris Wilsone957d772010-09-24 12:52:03 +01001166 if (!intel_sdvo_get_value(intel_sdvo,
1167 SDVO_CMD_GET_DEVICE_CAPS,
1168 caps, sizeof(*caps)))
1169 return false;
1170
1171 DRM_DEBUG_KMS("SDVO capabilities:\n"
1172 " vendor_id: %d\n"
1173 " device_id: %d\n"
1174 " device_rev_id: %d\n"
1175 " sdvo_version_major: %d\n"
1176 " sdvo_version_minor: %d\n"
1177 " sdvo_inputs_mask: %d\n"
1178 " smooth_scaling: %d\n"
1179 " sharp_scaling: %d\n"
1180 " up_scaling: %d\n"
1181 " down_scaling: %d\n"
1182 " stall_support: %d\n"
1183 " output_flags: %d\n",
1184 caps->vendor_id,
1185 caps->device_id,
1186 caps->device_rev_id,
1187 caps->sdvo_version_major,
1188 caps->sdvo_version_minor,
1189 caps->sdvo_inputs_mask,
1190 caps->smooth_scaling,
1191 caps->sharp_scaling,
1192 caps->up_scaling,
1193 caps->down_scaling,
1194 caps->stall_support,
1195 caps->output_flags);
1196
1197 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001198}
1199
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001200/* No use! */
1201#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001202struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1203{
1204 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001205 struct intel_sdvo *iout = NULL;
1206 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001207
1208 /* find the sdvo connector */
1209 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001210 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001211
1212 if (iout->type != INTEL_OUTPUT_SDVO)
1213 continue;
1214
1215 sdvo = iout->dev_priv;
1216
Eric Anholtc751ce42010-03-25 11:48:48 -07001217 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001218 return connector;
1219
Eric Anholtc751ce42010-03-25 11:48:48 -07001220 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001221 return connector;
1222
1223 }
1224
1225 return NULL;
1226}
1227
1228int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1229{
1230 u8 response[2];
1231 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001232 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001233 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001234
1235 if (!connector)
1236 return 0;
1237
Chris Wilsonea5b2132010-08-04 13:50:23 +01001238 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001239
Chris Wilson32aad862010-08-04 13:50:25 +01001240 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1241 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001242}
1243
1244void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1245{
1246 u8 response[2];
1247 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001248 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001249
Chris Wilsonea5b2132010-08-04 13:50:23 +01001250 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1251 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001252
1253 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001254 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1255 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001256
Chris Wilsonea5b2132010-08-04 13:50:23 +01001257 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001258 } else {
1259 response[0] = 0;
1260 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001261 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001262 }
1263
Chris Wilsonea5b2132010-08-04 13:50:23 +01001264 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1265 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001266}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001267#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001268
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001269static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001270intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001271{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001272 int caps = 0;
1273
Chris Wilsonea5b2132010-08-04 13:50:23 +01001274 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001275 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1276 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001277 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001278 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1279 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001280 if (intel_sdvo->caps.output_flags &
Roel Kluin19e1f882009-08-09 13:50:53 +02001281 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001282 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001283 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001284 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1285 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001286 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001287 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1288 caps++;
1289
Chris Wilsonea5b2132010-08-04 13:50:23 +01001290 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001291 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1292 caps++;
1293
Chris Wilsonea5b2132010-08-04 13:50:23 +01001294 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001295 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1296 caps++;
1297
1298 return (caps > 1);
1299}
1300
Chris Wilsonf899fc62010-07-20 15:44:45 -07001301static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001302intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001303{
Chris Wilsone957d772010-09-24 12:52:03 +01001304 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1305 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001306}
1307
Keith Packard57cdaf92009-09-04 13:07:54 +08001308static struct drm_connector *
1309intel_find_analog_connector(struct drm_device *dev)
1310{
1311 struct drm_connector *connector;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001312 struct intel_sdvo *encoder;
Keith Packard57cdaf92009-09-04 13:07:54 +08001313
Chris Wilsondf0e9242010-09-09 16:20:55 +01001314 list_for_each_entry(encoder,
1315 &dev->mode_config.encoder_list,
1316 base.base.head) {
1317 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1318 list_for_each_entry(connector,
1319 &dev->mode_config.connector_list,
1320 head) {
1321 if (&encoder->base ==
1322 intel_attached_encoder(connector))
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001323 return connector;
1324 }
1325 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001326 }
Chris Wilsondf0e9242010-09-09 16:20:55 +01001327
Keith Packard57cdaf92009-09-04 13:07:54 +08001328 return NULL;
1329}
1330
1331static int
1332intel_analog_is_connected(struct drm_device *dev)
1333{
1334 struct drm_connector *analog_connector;
Keith Packard57cdaf92009-09-04 13:07:54 +08001335
Chris Wilson32aad862010-08-04 13:50:25 +01001336 analog_connector = intel_find_analog_connector(dev);
Keith Packard57cdaf92009-09-04 13:07:54 +08001337 if (!analog_connector)
1338 return false;
1339
Chris Wilson930a9e22010-09-14 11:07:23 +01001340 if (analog_connector->funcs->detect(analog_connector, false) ==
Keith Packard57cdaf92009-09-04 13:07:54 +08001341 connector_status_disconnected)
1342 return false;
1343
1344 return true;
1345}
1346
Chris Wilsonff482d82010-09-15 10:40:38 +01001347/* Mac mini hack -- use the same DDC as the analog connector */
1348static struct edid *
1349intel_sdvo_get_analog_edid(struct drm_connector *connector)
1350{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001351 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001352
Chris Wilsonf899fc62010-07-20 15:44:45 -07001353 if (!intel_analog_is_connected(connector->dev))
Chris Wilsonff482d82010-09-15 10:40:38 +01001354 return NULL;
1355
Chris Wilsonf899fc62010-07-20 15:44:45 -07001356 return drm_get_edid(connector, &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001357}
1358
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001359enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001360intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001361{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001362 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001363 enum drm_connector_status status;
1364 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001365
Chris Wilsone957d772010-09-24 12:52:03 +01001366 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001367
Chris Wilsonea5b2132010-08-04 13:50:23 +01001368 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001369 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001370
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001371 /*
1372 * Don't use the 1 as the argument of DDC bus switch to get
1373 * the EDID. It is used for SDVO SPD ROM.
1374 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001375 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001376 intel_sdvo->ddc_bus = ddc;
1377 edid = intel_sdvo_get_edid(connector);
1378 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001379 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001380 }
Chris Wilsone957d772010-09-24 12:52:03 +01001381 /*
1382 * If we found the EDID on the other bus,
1383 * assume that is the correct DDC bus.
1384 */
1385 if (edid == NULL)
1386 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001387 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001388
1389 /*
1390 * When there is no edid and no monitor is connected with VGA
1391 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001392 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001393 if (edid == NULL)
1394 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001395
Chris Wilson2f551c82010-09-15 10:42:50 +01001396 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001397 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001398 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001399 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1400 status = connector_status_connected;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001401 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001402 intel_sdvo->has_audio = drm_detect_monitor_audio(edid);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001403 }
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001404 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001405 kfree(edid);
1406 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001407
1408 if (status == connector_status_connected) {
1409 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1410 if (intel_sdvo_connector->force_audio)
1411 intel_sdvo->has_audio = intel_sdvo_connector->force_audio > 0;
1412 }
1413
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001414 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001415}
1416
Chris Wilson7b334fc2010-09-09 23:51:02 +01001417static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001418intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001419{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001420 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001421 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001422 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001423 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001424
Chris Wilson32aad862010-08-04 13:50:25 +01001425 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001426 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001427 return connector_status_unknown;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001428 if (intel_sdvo->is_tv) {
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001429 /* add 30ms delay when the output type is SDVO-TV */
1430 mdelay(30);
1431 }
Chris Wilson32aad862010-08-04 13:50:25 +01001432 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1433 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001434
Chris Wilsone957d772010-09-24 12:52:03 +01001435 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1436 response & 0xff, response >> 8,
1437 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001438
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001439 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001440 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001441
Chris Wilsonea5b2132010-08-04 13:50:23 +01001442 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001443
Chris Wilson615fb932010-08-04 13:50:24 +01001444 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001445 ret = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001446 else if (response & SDVO_TMDS_MASK)
1447 ret = intel_sdvo_hdmi_sink_detect(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001448 else
1449 ret = connector_status_connected;
1450
1451 /* May update encoder flag for like clock for SDVO TV, etc.*/
1452 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001453 intel_sdvo->is_tv = false;
1454 intel_sdvo->is_lvds = false;
1455 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001456
1457 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001458 intel_sdvo->is_tv = true;
1459 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001460 }
1461 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001462 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001463 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001464
1465 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001466}
1467
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001468static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001469{
Chris Wilsonff482d82010-09-15 10:40:38 +01001470 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001471
1472 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001473 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001474
Keith Packard57cdaf92009-09-04 13:07:54 +08001475 /*
1476 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1477 * link between analog and digital outputs. So, if the regular SDVO
1478 * DDC fails, check to see if the analog output is disconnected, in
1479 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001480 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001481 if (edid == NULL)
1482 edid = intel_sdvo_get_analog_edid(connector);
1483
Chris Wilsonff482d82010-09-15 10:40:38 +01001484 if (edid != NULL) {
1485 drm_mode_connector_update_edid_property(connector, edid);
1486 drm_add_edid_modes(connector, edid);
1487 connector->display_info.raw_edid = NULL;
1488 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001489 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490}
1491
1492/*
1493 * Set of SDVO TV modes.
1494 * Note! This is in reply order (see loop in get_tv_modes).
1495 * XXX: all 60Hz refresh?
1496 */
1497struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001498 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1499 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001501 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1502 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001504 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1505 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001507 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1508 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001510 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1511 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001513 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1514 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001516 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1517 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001519 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1520 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001522 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1523 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001525 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1526 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001528 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1529 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001531 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1532 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001534 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1535 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001537 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1538 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001540 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1541 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001542 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001543 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1544 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001545 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001546 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1547 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001549 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1550 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001551 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001552 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1553 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001554 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1555};
1556
1557static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1558{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001559 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001560 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001561 uint32_t reply = 0, format_map = 0;
1562 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001563
1564 /* Read the list of supported input resolutions for the selected TV
1565 * format.
1566 */
Chris Wilson40039752010-08-04 13:50:26 +01001567 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001568 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001569 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001570
Chris Wilson32aad862010-08-04 13:50:25 +01001571 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1572 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001573
Chris Wilson32aad862010-08-04 13:50:25 +01001574 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001575 if (!intel_sdvo_write_cmd(intel_sdvo,
1576 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001577 &tv_res, sizeof(tv_res)))
1578 return;
1579 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001580 return;
1581
1582 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001583 if (reply & (1 << i)) {
1584 struct drm_display_mode *nmode;
1585 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001586 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001587 if (nmode)
1588 drm_mode_probed_add(connector, nmode);
1589 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001590}
1591
Ma Ling7086c872009-05-13 11:20:06 +08001592static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1593{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001594 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001595 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001596 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001597
1598 /*
1599 * Attempt to get the mode list from DDC.
1600 * Assume that the preferred modes are
1601 * arranged in priority order.
1602 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001603 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001604 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001605 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001606
1607 /* Fetch modes from VBT */
1608 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001609 newmode = drm_mode_duplicate(connector->dev,
1610 dev_priv->sdvo_lvds_vbt_mode);
1611 if (newmode != NULL) {
1612 /* Guarantee the mode is preferred */
1613 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1614 DRM_MODE_TYPE_DRIVER);
1615 drm_mode_probed_add(connector, newmode);
1616 }
1617 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001618
1619end:
1620 list_for_each_entry(newmode, &connector->probed_modes, head) {
1621 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001622 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001623 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001624
1625 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1626 0);
1627
Chris Wilson85454232010-08-08 14:28:23 +01001628 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001629 break;
1630 }
1631 }
1632
Ma Ling7086c872009-05-13 11:20:06 +08001633}
1634
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001635static int intel_sdvo_get_modes(struct drm_connector *connector)
1636{
Chris Wilson615fb932010-08-04 13:50:24 +01001637 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001638
Chris Wilson615fb932010-08-04 13:50:24 +01001639 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001640 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001641 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001642 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001643 else
1644 intel_sdvo_get_ddc_modes(connector);
1645
Chris Wilson32aad862010-08-04 13:50:25 +01001646 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001647}
1648
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001649static void
1650intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001651{
Chris Wilson615fb932010-08-04 13:50:24 +01001652 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001653 struct drm_device *dev = connector->dev;
1654
Chris Wilsonc5521702010-08-04 13:50:28 +01001655 if (intel_sdvo_connector->left)
1656 drm_property_destroy(dev, intel_sdvo_connector->left);
1657 if (intel_sdvo_connector->right)
1658 drm_property_destroy(dev, intel_sdvo_connector->right);
1659 if (intel_sdvo_connector->top)
1660 drm_property_destroy(dev, intel_sdvo_connector->top);
1661 if (intel_sdvo_connector->bottom)
1662 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1663 if (intel_sdvo_connector->hpos)
1664 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1665 if (intel_sdvo_connector->vpos)
1666 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1667 if (intel_sdvo_connector->saturation)
1668 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1669 if (intel_sdvo_connector->contrast)
1670 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1671 if (intel_sdvo_connector->hue)
1672 drm_property_destroy(dev, intel_sdvo_connector->hue);
1673 if (intel_sdvo_connector->sharpness)
1674 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1675 if (intel_sdvo_connector->flicker_filter)
1676 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1677 if (intel_sdvo_connector->flicker_filter_2d)
1678 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1679 if (intel_sdvo_connector->flicker_filter_adaptive)
1680 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1681 if (intel_sdvo_connector->tv_luma_filter)
1682 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1683 if (intel_sdvo_connector->tv_chroma_filter)
1684 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001685 if (intel_sdvo_connector->dot_crawl)
1686 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001687 if (intel_sdvo_connector->brightness)
1688 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001689}
1690
Jesse Barnes79e53942008-11-07 14:24:08 -08001691static void intel_sdvo_destroy(struct drm_connector *connector)
1692{
Chris Wilson615fb932010-08-04 13:50:24 +01001693 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001694
Chris Wilsonc5521702010-08-04 13:50:28 +01001695 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001696 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001697 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001698
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001699 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001700 drm_sysfs_connector_remove(connector);
1701 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001702 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001703}
1704
Zhao Yakuice6feab2009-08-24 13:50:26 +08001705static int
1706intel_sdvo_set_property(struct drm_connector *connector,
1707 struct drm_property *property,
1708 uint64_t val)
1709{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001710 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001711 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001712 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001713 uint8_t cmd;
1714 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001715
1716 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001717 if (ret)
1718 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001719
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001720 if (property == intel_sdvo_connector->force_audio_property) {
1721 if (val == intel_sdvo_connector->force_audio)
1722 return 0;
1723
1724 intel_sdvo_connector->force_audio = val;
1725
1726 if (val > 0 && intel_sdvo->has_audio)
1727 return 0;
1728 if (val < 0 && !intel_sdvo->has_audio)
1729 return 0;
1730
1731 intel_sdvo->has_audio = val > 0;
1732 goto done;
1733 }
1734
Chris Wilsonc5521702010-08-04 13:50:28 +01001735#define CHECK_PROPERTY(name, NAME) \
1736 if (intel_sdvo_connector->name == property) { \
1737 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1738 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1739 cmd = SDVO_CMD_SET_##NAME; \
1740 intel_sdvo_connector->cur_##name = temp_value; \
1741 goto set_value; \
1742 }
1743
1744 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001745 if (val >= TV_FORMAT_NUM)
1746 return -EINVAL;
1747
Chris Wilson40039752010-08-04 13:50:26 +01001748 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001749 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001750 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001751
Chris Wilson40039752010-08-04 13:50:26 +01001752 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001753 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001754 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001755 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001756 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001757 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001758 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001759 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001760 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001761
Chris Wilson615fb932010-08-04 13:50:24 +01001762 intel_sdvo_connector->left_margin = temp_value;
1763 intel_sdvo_connector->right_margin = temp_value;
1764 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001765 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001766 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001767 goto set_value;
1768 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001769 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001770 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001771 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001772 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001773
Chris Wilson615fb932010-08-04 13:50:24 +01001774 intel_sdvo_connector->left_margin = temp_value;
1775 intel_sdvo_connector->right_margin = temp_value;
1776 temp_value = intel_sdvo_connector->max_hscan -
1777 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001778 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001779 goto set_value;
1780 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001781 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001782 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001783 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001784 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001785
Chris Wilson615fb932010-08-04 13:50:24 +01001786 intel_sdvo_connector->top_margin = temp_value;
1787 intel_sdvo_connector->bottom_margin = temp_value;
1788 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001789 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001790 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001791 goto set_value;
1792 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001793 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001794 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001795 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001796 return 0;
1797
Chris Wilson615fb932010-08-04 13:50:24 +01001798 intel_sdvo_connector->top_margin = temp_value;
1799 intel_sdvo_connector->bottom_margin = temp_value;
1800 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001801 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001802 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001803 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001804 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001805 CHECK_PROPERTY(hpos, HPOS)
1806 CHECK_PROPERTY(vpos, VPOS)
1807 CHECK_PROPERTY(saturation, SATURATION)
1808 CHECK_PROPERTY(contrast, CONTRAST)
1809 CHECK_PROPERTY(hue, HUE)
1810 CHECK_PROPERTY(brightness, BRIGHTNESS)
1811 CHECK_PROPERTY(sharpness, SHARPNESS)
1812 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1813 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1814 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1815 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1816 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001817 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001818 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001819
1820 return -EINVAL; /* unknown property */
1821
1822set_value:
1823 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1824 return -EIO;
1825
1826
1827done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001828 if (intel_sdvo->base.base.crtc) {
1829 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001830 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001831 crtc->y, crtc->fb);
1832 }
1833
Chris Wilson32aad862010-08-04 13:50:25 +01001834 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001835#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001836}
1837
Jesse Barnes79e53942008-11-07 14:24:08 -08001838static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1839 .dpms = intel_sdvo_dpms,
1840 .mode_fixup = intel_sdvo_mode_fixup,
1841 .prepare = intel_encoder_prepare,
1842 .mode_set = intel_sdvo_mode_set,
1843 .commit = intel_encoder_commit,
1844};
1845
1846static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001847 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001848 .detect = intel_sdvo_detect,
1849 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001850 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001851 .destroy = intel_sdvo_destroy,
1852};
1853
1854static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1855 .get_modes = intel_sdvo_get_modes,
1856 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001857 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001858};
1859
Hannes Ederb358d0a2008-12-18 21:18:47 +01001860static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001861{
Chris Wilson890f3352010-09-14 16:46:59 +01001862 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001863
Chris Wilsonea5b2132010-08-04 13:50:23 +01001864 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001865 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001866 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001867
Chris Wilsone957d772010-09-24 12:52:03 +01001868 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001869 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001870}
1871
1872static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1873 .destroy = intel_sdvo_enc_destroy,
1874};
1875
Chris Wilsonb66d8422010-08-12 15:26:41 +01001876static void
1877intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1878{
1879 uint16_t mask = 0;
1880 unsigned int num_bits;
1881
1882 /* Make a mask of outputs less than or equal to our own priority in the
1883 * list.
1884 */
1885 switch (sdvo->controlled_output) {
1886 case SDVO_OUTPUT_LVDS1:
1887 mask |= SDVO_OUTPUT_LVDS1;
1888 case SDVO_OUTPUT_LVDS0:
1889 mask |= SDVO_OUTPUT_LVDS0;
1890 case SDVO_OUTPUT_TMDS1:
1891 mask |= SDVO_OUTPUT_TMDS1;
1892 case SDVO_OUTPUT_TMDS0:
1893 mask |= SDVO_OUTPUT_TMDS0;
1894 case SDVO_OUTPUT_RGB1:
1895 mask |= SDVO_OUTPUT_RGB1;
1896 case SDVO_OUTPUT_RGB0:
1897 mask |= SDVO_OUTPUT_RGB0;
1898 break;
1899 }
1900
1901 /* Count bits to find what number we are in the priority list. */
1902 mask &= sdvo->caps.output_flags;
1903 num_bits = hweight16(mask);
1904 /* If more than 3 outputs, default to DDC bus 3 for now. */
1905 if (num_bits > 3)
1906 num_bits = 3;
1907
1908 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1909 sdvo->ddc_bus = 1 << num_bits;
1910}
Jesse Barnes79e53942008-11-07 14:24:08 -08001911
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001912/**
1913 * Choose the appropriate DDC bus for control bus switch command for this
1914 * SDVO output based on the controlled output.
1915 *
1916 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1917 * outputs, then LVDS outputs.
1918 */
1919static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001920intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001921 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001922{
Adam Jacksonb1083332010-04-23 16:07:40 -04001923 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001924
Adam Jacksonb1083332010-04-23 16:07:40 -04001925 if (IS_SDVOB(reg))
1926 mapping = &(dev_priv->sdvo_mappings[0]);
1927 else
1928 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001929
Chris Wilsonb66d8422010-08-12 15:26:41 +01001930 if (mapping->initialized)
1931 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1932 else
1933 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001934}
1935
Chris Wilsone957d772010-09-24 12:52:03 +01001936static void
1937intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1938 struct intel_sdvo *sdvo, u32 reg)
1939{
1940 struct sdvo_device_mapping *mapping;
1941 u8 pin, speed;
1942
1943 if (IS_SDVOB(reg))
1944 mapping = &dev_priv->sdvo_mappings[0];
1945 else
1946 mapping = &dev_priv->sdvo_mappings[1];
1947
1948 pin = GMBUS_PORT_DPB;
1949 speed = GMBUS_RATE_1MHZ >> 8;
1950 if (mapping->initialized) {
1951 pin = mapping->i2c_pin;
1952 speed = mapping->i2c_speed;
1953 }
1954
1955 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1956 intel_gmbus_set_speed(sdvo->i2c, speed);
1957 intel_gmbus_force_bit(sdvo->i2c, true);
1958}
1959
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001960static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001961intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001962{
Chris Wilson32aad862010-08-04 13:50:25 +01001963 return intel_sdvo_set_target_output(intel_sdvo,
1964 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
1965 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1966 &intel_sdvo->is_hdmi, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001967}
1968
yakui_zhao714605e2009-05-31 17:18:07 +08001969static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001970intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001971{
1972 struct drm_i915_private *dev_priv = dev->dev_private;
1973 struct sdvo_device_mapping *my_mapping, *other_mapping;
1974
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001975 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001976 my_mapping = &dev_priv->sdvo_mappings[0];
1977 other_mapping = &dev_priv->sdvo_mappings[1];
1978 } else {
1979 my_mapping = &dev_priv->sdvo_mappings[1];
1980 other_mapping = &dev_priv->sdvo_mappings[0];
1981 }
1982
1983 /* If the BIOS described our SDVO device, take advantage of it. */
1984 if (my_mapping->slave_addr)
1985 return my_mapping->slave_addr;
1986
1987 /* If the BIOS only described a different SDVO device, use the
1988 * address that it isn't using.
1989 */
1990 if (other_mapping->slave_addr) {
1991 if (other_mapping->slave_addr == 0x70)
1992 return 0x72;
1993 else
1994 return 0x70;
1995 }
1996
1997 /* No SDVO device info is found for another DVO port,
1998 * so use mapping assumption we had before BIOS parsing.
1999 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002000 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08002001 return 0x70;
2002 else
2003 return 0x72;
2004}
2005
Zhenyu Wang14571b42010-03-30 14:06:33 +08002006static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002007intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2008 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002009{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002010 drm_connector_init(encoder->base.base.dev,
2011 &connector->base.base,
2012 &intel_sdvo_connector_funcs,
2013 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002014
Chris Wilsondf0e9242010-09-09 16:20:55 +01002015 drm_connector_helper_add(&connector->base.base,
2016 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002017
Chris Wilsondf0e9242010-09-09 16:20:55 +01002018 connector->base.base.interlace_allowed = 0;
2019 connector->base.base.doublescan_allowed = 0;
2020 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002021
Chris Wilsondf0e9242010-09-09 16:20:55 +01002022 intel_connector_attach_encoder(&connector->base, &encoder->base);
2023 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002024}
2025
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002026static void
2027intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2028{
2029 struct drm_device *dev = connector->base.base.dev;
2030
2031 connector->force_audio_property =
2032 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2033 if (connector->force_audio_property) {
2034 connector->force_audio_property->values[0] = -1;
2035 connector->force_audio_property->values[1] = 1;
2036 drm_connector_attach_property(&connector->base.base,
2037 connector->force_audio_property, 0);
2038 }
2039}
2040
Zhenyu Wang14571b42010-03-30 14:06:33 +08002041static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002042intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002043{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002044 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002045 struct drm_connector *connector;
2046 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002047 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002048
Chris Wilson615fb932010-08-04 13:50:24 +01002049 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2050 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002051 return false;
2052
Zhenyu Wang14571b42010-03-30 14:06:33 +08002053 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002054 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002055 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002056 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002057 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002058 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002059 }
2060
Chris Wilson615fb932010-08-04 13:50:24 +01002061 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002062 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002063 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002064 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2065 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2066
Chris Wilsonea5b2132010-08-04 13:50:23 +01002067 if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2068 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2069 && intel_sdvo->is_hdmi) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002070 /* enable hdmi encoding mode if supported */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002071 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2072 intel_sdvo_set_colorimetry(intel_sdvo,
Zhenyu Wang14571b42010-03-30 14:06:33 +08002073 SDVO_COLORIMETRY_RGB256);
2074 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2075 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002076 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2077 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002078
Chris Wilsondf0e9242010-09-09 16:20:55 +01002079 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002080
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002081 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2082
Zhenyu Wang14571b42010-03-30 14:06:33 +08002083 return true;
2084}
2085
2086static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002087intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002088{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002089 struct drm_encoder *encoder = &intel_sdvo->base.base;
2090 struct drm_connector *connector;
2091 struct intel_connector *intel_connector;
2092 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002093
Chris Wilson615fb932010-08-04 13:50:24 +01002094 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2095 if (!intel_sdvo_connector)
2096 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002097
Chris Wilson615fb932010-08-04 13:50:24 +01002098 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002099 connector = &intel_connector->base;
2100 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2101 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002102
Chris Wilson4ef69c72010-09-09 15:14:28 +01002103 intel_sdvo->controlled_output |= type;
2104 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002105
Chris Wilson4ef69c72010-09-09 15:14:28 +01002106 intel_sdvo->is_tv = true;
2107 intel_sdvo->base.needs_tv_clock = true;
2108 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002109
Chris Wilsondf0e9242010-09-09 16:20:55 +01002110 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002111
Chris Wilson4ef69c72010-09-09 15:14:28 +01002112 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002113 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002114
Chris Wilson4ef69c72010-09-09 15:14:28 +01002115 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002116 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002117
Chris Wilson4ef69c72010-09-09 15:14:28 +01002118 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002119
2120err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002121 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002122 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002123}
2124
2125static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002126intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002127{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002128 struct drm_encoder *encoder = &intel_sdvo->base.base;
2129 struct drm_connector *connector;
2130 struct intel_connector *intel_connector;
2131 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002132
Chris Wilson615fb932010-08-04 13:50:24 +01002133 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2134 if (!intel_sdvo_connector)
2135 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002136
Chris Wilson615fb932010-08-04 13:50:24 +01002137 intel_connector = &intel_sdvo_connector->base;
2138 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002139 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2140 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2141 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002142
Chris Wilson4ef69c72010-09-09 15:14:28 +01002143 if (device == 0) {
2144 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2145 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2146 } else if (device == 1) {
2147 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2148 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2149 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002150
Chris Wilson4ef69c72010-09-09 15:14:28 +01002151 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2152 (1 << INTEL_ANALOG_CLONE_BIT));
2153
Chris Wilsondf0e9242010-09-09 16:20:55 +01002154 intel_sdvo_connector_init(intel_sdvo_connector,
2155 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002156 return true;
2157}
2158
2159static bool
2160intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2161{
2162 struct drm_encoder *encoder = &intel_sdvo->base.base;
2163 struct drm_connector *connector;
2164 struct intel_connector *intel_connector;
2165 struct intel_sdvo_connector *intel_sdvo_connector;
2166
2167 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2168 if (!intel_sdvo_connector)
2169 return false;
2170
2171 intel_connector = &intel_sdvo_connector->base;
2172 connector = &intel_connector->base;
2173 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2174 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2175
2176 if (device == 0) {
2177 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2178 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2179 } else if (device == 1) {
2180 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2181 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2182 }
2183
2184 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002185 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002186
Chris Wilsondf0e9242010-09-09 16:20:55 +01002187 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002188 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002189 goto err;
2190
2191 return true;
2192
2193err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002194 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002195 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002196}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002197
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002198static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002199intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002200{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002201 intel_sdvo->is_tv = false;
2202 intel_sdvo->base.needs_tv_clock = false;
2203 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002204
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002206
Zhenyu Wang14571b42010-03-30 14:06:33 +08002207 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002208 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002210
Zhenyu Wang14571b42010-03-30 14:06:33 +08002211 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002212 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002213 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002214
Zhenyu Wang14571b42010-03-30 14:06:33 +08002215 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002216 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002217 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002219
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002221 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002222 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002223
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002225 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002226 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002227
Zhenyu Wang14571b42010-03-30 14:06:33 +08002228 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002229 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002230 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002231
Zhenyu Wang14571b42010-03-30 14:06:33 +08002232 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002233 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002234 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002235
Zhenyu Wang14571b42010-03-30 14:06:33 +08002236 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002237 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002238 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002239
Zhenyu Wang14571b42010-03-30 14:06:33 +08002240 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002241 unsigned char bytes[2];
2242
Chris Wilsonea5b2132010-08-04 13:50:23 +01002243 intel_sdvo->controlled_output = 0;
2244 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002245 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002246 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002247 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002248 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002249 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002250 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002251
Zhenyu Wang14571b42010-03-30 14:06:33 +08002252 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002253}
2254
Chris Wilson32aad862010-08-04 13:50:25 +01002255static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2256 struct intel_sdvo_connector *intel_sdvo_connector,
2257 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002258{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002259 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002260 struct intel_sdvo_tv_format format;
2261 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002262
Chris Wilson32aad862010-08-04 13:50:25 +01002263 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2264 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002265
Chris Wilson32aad862010-08-04 13:50:25 +01002266 if (!intel_sdvo_get_value(intel_sdvo,
2267 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2268 &format, sizeof(format)))
2269 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002270
Chris Wilson32aad862010-08-04 13:50:25 +01002271 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002272
2273 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002274 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002275
Chris Wilson615fb932010-08-04 13:50:24 +01002276 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002277 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002278 if (format_map & (1 << i))
2279 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002280
2281
Chris Wilsonc5521702010-08-04 13:50:28 +01002282 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002283 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2284 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002285 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002286 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002287
Chris Wilson615fb932010-08-04 13:50:24 +01002288 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002289 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002290 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002291 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002292
Chris Wilson40039752010-08-04 13:50:26 +01002293 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002294 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002295 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002296 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002297
2298}
2299
Chris Wilsonc5521702010-08-04 13:50:28 +01002300#define ENHANCEMENT(name, NAME) do { \
2301 if (enhancements.name) { \
2302 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2303 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2304 return false; \
2305 intel_sdvo_connector->max_##name = data_value[0]; \
2306 intel_sdvo_connector->cur_##name = response; \
2307 intel_sdvo_connector->name = \
2308 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2309 if (!intel_sdvo_connector->name) return false; \
2310 intel_sdvo_connector->name->values[0] = 0; \
2311 intel_sdvo_connector->name->values[1] = data_value[0]; \
2312 drm_connector_attach_property(connector, \
2313 intel_sdvo_connector->name, \
2314 intel_sdvo_connector->cur_##name); \
2315 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2316 data_value[0], data_value[1], response); \
2317 } \
2318} while(0)
2319
2320static bool
2321intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2322 struct intel_sdvo_connector *intel_sdvo_connector,
2323 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002324{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002325 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002326 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002327 uint16_t response, data_value[2];
2328
Chris Wilsonc5521702010-08-04 13:50:28 +01002329 /* when horizontal overscan is supported, Add the left/right property */
2330 if (enhancements.overscan_h) {
2331 if (!intel_sdvo_get_value(intel_sdvo,
2332 SDVO_CMD_GET_MAX_OVERSCAN_H,
2333 &data_value, 4))
2334 return false;
2335
2336 if (!intel_sdvo_get_value(intel_sdvo,
2337 SDVO_CMD_GET_OVERSCAN_H,
2338 &response, 2))
2339 return false;
2340
2341 intel_sdvo_connector->max_hscan = data_value[0];
2342 intel_sdvo_connector->left_margin = data_value[0] - response;
2343 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2344 intel_sdvo_connector->left =
2345 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2346 "left_margin", 2);
2347 if (!intel_sdvo_connector->left)
2348 return false;
2349
2350 intel_sdvo_connector->left->values[0] = 0;
2351 intel_sdvo_connector->left->values[1] = data_value[0];
2352 drm_connector_attach_property(connector,
2353 intel_sdvo_connector->left,
2354 intel_sdvo_connector->left_margin);
2355
2356 intel_sdvo_connector->right =
2357 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2358 "right_margin", 2);
2359 if (!intel_sdvo_connector->right)
2360 return false;
2361
2362 intel_sdvo_connector->right->values[0] = 0;
2363 intel_sdvo_connector->right->values[1] = data_value[0];
2364 drm_connector_attach_property(connector,
2365 intel_sdvo_connector->right,
2366 intel_sdvo_connector->right_margin);
2367 DRM_DEBUG_KMS("h_overscan: max %d, "
2368 "default %d, current %d\n",
2369 data_value[0], data_value[1], response);
2370 }
2371
2372 if (enhancements.overscan_v) {
2373 if (!intel_sdvo_get_value(intel_sdvo,
2374 SDVO_CMD_GET_MAX_OVERSCAN_V,
2375 &data_value, 4))
2376 return false;
2377
2378 if (!intel_sdvo_get_value(intel_sdvo,
2379 SDVO_CMD_GET_OVERSCAN_V,
2380 &response, 2))
2381 return false;
2382
2383 intel_sdvo_connector->max_vscan = data_value[0];
2384 intel_sdvo_connector->top_margin = data_value[0] - response;
2385 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2386 intel_sdvo_connector->top =
2387 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2388 "top_margin", 2);
2389 if (!intel_sdvo_connector->top)
2390 return false;
2391
2392 intel_sdvo_connector->top->values[0] = 0;
2393 intel_sdvo_connector->top->values[1] = data_value[0];
2394 drm_connector_attach_property(connector,
2395 intel_sdvo_connector->top,
2396 intel_sdvo_connector->top_margin);
2397
2398 intel_sdvo_connector->bottom =
2399 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2400 "bottom_margin", 2);
2401 if (!intel_sdvo_connector->bottom)
2402 return false;
2403
2404 intel_sdvo_connector->bottom->values[0] = 0;
2405 intel_sdvo_connector->bottom->values[1] = data_value[0];
2406 drm_connector_attach_property(connector,
2407 intel_sdvo_connector->bottom,
2408 intel_sdvo_connector->bottom_margin);
2409 DRM_DEBUG_KMS("v_overscan: max %d, "
2410 "default %d, current %d\n",
2411 data_value[0], data_value[1], response);
2412 }
2413
2414 ENHANCEMENT(hpos, HPOS);
2415 ENHANCEMENT(vpos, VPOS);
2416 ENHANCEMENT(saturation, SATURATION);
2417 ENHANCEMENT(contrast, CONTRAST);
2418 ENHANCEMENT(hue, HUE);
2419 ENHANCEMENT(sharpness, SHARPNESS);
2420 ENHANCEMENT(brightness, BRIGHTNESS);
2421 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2422 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2423 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2424 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2425 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2426
Chris Wilsone0442182010-08-04 13:50:29 +01002427 if (enhancements.dot_crawl) {
2428 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2429 return false;
2430
2431 intel_sdvo_connector->max_dot_crawl = 1;
2432 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2433 intel_sdvo_connector->dot_crawl =
2434 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2435 if (!intel_sdvo_connector->dot_crawl)
2436 return false;
2437
2438 intel_sdvo_connector->dot_crawl->values[0] = 0;
2439 intel_sdvo_connector->dot_crawl->values[1] = 1;
2440 drm_connector_attach_property(connector,
2441 intel_sdvo_connector->dot_crawl,
2442 intel_sdvo_connector->cur_dot_crawl);
2443 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2444 }
2445
Chris Wilsonc5521702010-08-04 13:50:28 +01002446 return true;
2447}
2448
2449static bool
2450intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2451 struct intel_sdvo_connector *intel_sdvo_connector,
2452 struct intel_sdvo_enhancements_reply enhancements)
2453{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002454 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002455 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2456 uint16_t response, data_value[2];
2457
2458 ENHANCEMENT(brightness, BRIGHTNESS);
2459
2460 return true;
2461}
2462#undef ENHANCEMENT
2463
2464static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2465 struct intel_sdvo_connector *intel_sdvo_connector)
2466{
2467 union {
2468 struct intel_sdvo_enhancements_reply reply;
2469 uint16_t response;
2470 } enhancements;
2471
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002472 enhancements.response = 0;
2473 intel_sdvo_get_value(intel_sdvo,
2474 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2475 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002476 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002477 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002478 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002479 }
Chris Wilson32aad862010-08-04 13:50:25 +01002480
Chris Wilsonc5521702010-08-04 13:50:28 +01002481 if (IS_TV(intel_sdvo_connector))
2482 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2483 else if(IS_LVDS(intel_sdvo_connector))
2484 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2485 else
2486 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002487}
Chris Wilson32aad862010-08-04 13:50:25 +01002488
Chris Wilsone957d772010-09-24 12:52:03 +01002489static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2490 struct i2c_msg *msgs,
2491 int num)
2492{
2493 struct intel_sdvo *sdvo = adapter->algo_data;
2494
2495 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2496 return -EIO;
2497
2498 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2499}
2500
2501static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2502{
2503 struct intel_sdvo *sdvo = adapter->algo_data;
2504 return sdvo->i2c->algo->functionality(sdvo->i2c);
2505}
2506
2507static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2508 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2509 .functionality = intel_sdvo_ddc_proxy_func
2510};
2511
2512static bool
2513intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2514 struct drm_device *dev)
2515{
2516 sdvo->ddc.owner = THIS_MODULE;
2517 sdvo->ddc.class = I2C_CLASS_DDC;
2518 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2519 sdvo->ddc.dev.parent = &dev->pdev->dev;
2520 sdvo->ddc.algo_data = sdvo;
2521 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2522
2523 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002524}
2525
Eric Anholtc751ce42010-03-25 11:48:48 -07002526bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002527{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002528 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002529 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002530 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002531 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002532
Chris Wilsonea5b2132010-08-04 13:50:23 +01002533 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2534 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002535 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002536
Chris Wilsone957d772010-09-24 12:52:03 +01002537 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2538 kfree(intel_sdvo);
2539 return false;
2540 }
2541
Chris Wilsonea5b2132010-08-04 13:50:23 +01002542 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002543
Chris Wilsonea5b2132010-08-04 13:50:23 +01002544 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002545 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002546 /* encoder type will be decided later */
2547 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002548
Chris Wilsone957d772010-09-24 12:52:03 +01002549 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2550 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002551
Jesse Barnes79e53942008-11-07 14:24:08 -08002552 /* Read the regs to test if we can talk to the device */
2553 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002554 u8 byte;
2555
2556 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002557 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002558 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002559 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002560 }
2561 }
2562
Chris Wilsonf899fc62010-07-20 15:44:45 -07002563 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002564 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002565 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002566 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002567
Chris Wilson4ef69c72010-09-09 15:14:28 +01002568 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002569
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002570 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002571 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002572 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002573
Chris Wilsonea5b2132010-08-04 13:50:23 +01002574 if (intel_sdvo_output_setup(intel_sdvo,
2575 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002576 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002577 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002578 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002579 }
2580
Chris Wilsonea5b2132010-08-04 13:50:23 +01002581 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002582
Jesse Barnes79e53942008-11-07 14:24:08 -08002583 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002584 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002585 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002586
Chris Wilson32aad862010-08-04 13:50:25 +01002587 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2588 &intel_sdvo->pixel_clock_min,
2589 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002590 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002591
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002592 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002593 "clock range %dMHz - %dMHz, "
2594 "input 1: %c, input 2: %c, "
2595 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002596 SDVO_NAME(intel_sdvo),
2597 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2598 intel_sdvo->caps.device_rev_id,
2599 intel_sdvo->pixel_clock_min / 1000,
2600 intel_sdvo->pixel_clock_max / 1000,
2601 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2602 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002603 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002604 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002605 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002606 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002607 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002608 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002609
Chris Wilsonf899fc62010-07-20 15:44:45 -07002610err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002611 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002612 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002613 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002614
Eric Anholt7d573822009-01-02 13:33:00 -08002615 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002616}