Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 1 | /* |
| 2 | * MSI hooks for standard x86 apic |
| 3 | */ |
| 4 | |
| 5 | #include <linux/pci.h> |
| 6 | #include <linux/irq.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 7 | #include <linux/msi.h> |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 8 | #include <linux/dmar.h> |
Christian Kujau | a4cffb6 | 2006-06-26 14:00:02 +0200 | [diff] [blame] | 9 | #include <asm/smp.h> |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 10 | #include <asm/msidef.h> |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 11 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 12 | static struct irq_chip ia64_msi_chip; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 13 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 14 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 15 | static int ia64_set_msi_irq_affinity(unsigned int irq, |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 16 | const cpumask_t *cpu_mask) |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 17 | { |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 18 | struct msi_msg msg; |
Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 19 | u32 addr, data; |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 20 | int cpu = first_cpu(*cpu_mask); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 21 | |
Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 22 | if (!cpu_online(cpu)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 23 | return -1; |
Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 24 | |
Kenji Kaneshige | a6cd6322 | 2008-02-25 14:32:22 +0900 | [diff] [blame] | 25 | if (irq_prepare_move(irq, cpu)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 26 | return -1; |
Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 27 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 28 | read_msi_msg(irq, &msg); |
| 29 | |
| 30 | addr = msg.address_lo; |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 31 | addr &= MSI_ADDR_DEST_ID_MASK; |
| 32 | addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 33 | msg.address_lo = addr; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 34 | |
Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 35 | data = msg.data; |
| 36 | data &= MSI_DATA_VECTOR_MASK; |
| 37 | data |= MSI_DATA_VECTOR(irq_to_vector(irq)); |
| 38 | msg.data = data; |
| 39 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 40 | write_msi_msg(irq, &msg); |
Mike Travis | e65e49d | 2009-01-12 15:27:13 -0800 | [diff] [blame] | 41 | cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 42 | |
| 43 | return 0; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 44 | } |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 45 | #endif /* CONFIG_SMP */ |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 46 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 47 | int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 48 | { |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 49 | struct msi_msg msg; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 50 | unsigned long dest_phys_id; |
Kenji Kaneshige | 8a3a0ee | 2007-03-26 09:38:42 +0900 | [diff] [blame] | 51 | int irq, vector; |
Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 52 | cpumask_t mask; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 53 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 54 | irq = create_irq(); |
| 55 | if (irq < 0) |
| 56 | return irq; |
| 57 | |
| 58 | set_irq_msi(irq, desc); |
Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 59 | cpus_and(mask, irq_to_domain(irq), cpu_online_map); |
| 60 | dest_phys_id = cpu_physical_id(first_cpu(mask)); |
Ishimatsu Yasuaki | 9438a12 | 2007-04-06 16:51:12 +0900 | [diff] [blame] | 61 | vector = irq_to_vector(irq); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 62 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 63 | msg.address_hi = 0; |
| 64 | msg.address_lo = |
Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 65 | MSI_ADDR_HEADER | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 66 | MSI_ADDR_DEST_MODE_PHYS | |
Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 67 | MSI_ADDR_REDIRECTION_CPU | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 68 | MSI_ADDR_DEST_ID_CPU(dest_phys_id); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 69 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 70 | msg.data = |
Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 71 | MSI_DATA_TRIGGER_EDGE | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 72 | MSI_DATA_LEVEL_ASSERT | |
| 73 | MSI_DATA_DELIVERY_FIXED | |
| 74 | MSI_DATA_VECTOR(vector); |
| 75 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 76 | write_msi_msg(irq, &msg); |
| 77 | set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); |
| 78 | |
Kenji Kaneshige | 3aff037 | 2007-10-30 16:01:49 +0900 | [diff] [blame] | 79 | return 0; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 80 | } |
| 81 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 82 | void ia64_teardown_msi_irq(unsigned int irq) |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 83 | { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 84 | destroy_irq(irq); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 85 | } |
| 86 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 87 | static void ia64_ack_msi_irq(unsigned int irq) |
| 88 | { |
Kenji Kaneshige | a6cd6322 | 2008-02-25 14:32:22 +0900 | [diff] [blame] | 89 | irq_complete_move(irq); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 90 | move_native_irq(irq); |
| 91 | ia64_eoi(); |
| 92 | } |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 93 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 94 | static int ia64_msi_retrigger_irq(unsigned int irq) |
| 95 | { |
Ishimatsu Yasuaki | 9438a12 | 2007-04-06 16:51:12 +0900 | [diff] [blame] | 96 | unsigned int vector = irq_to_vector(irq); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 97 | ia64_resend_irq(vector); |
| 98 | |
| 99 | return 1; |
| 100 | } |
| 101 | |
| 102 | /* |
| 103 | * Generic ops used on most IA64 platforms. |
| 104 | */ |
| 105 | static struct irq_chip ia64_msi_chip = { |
| 106 | .name = "PCI-MSI", |
| 107 | .mask = mask_msi_irq, |
| 108 | .unmask = unmask_msi_irq, |
| 109 | .ack = ia64_ack_msi_irq, |
| 110 | #ifdef CONFIG_SMP |
| 111 | .set_affinity = ia64_set_msi_irq_affinity, |
| 112 | #endif |
| 113 | .retrigger = ia64_msi_retrigger_irq, |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 114 | }; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 115 | |
| 116 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 117 | int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 118 | { |
| 119 | if (platform_setup_msi_irq) |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 120 | return platform_setup_msi_irq(pdev, desc); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 121 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 122 | return ia64_setup_msi_irq(pdev, desc); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | void arch_teardown_msi_irq(unsigned int irq) |
| 126 | { |
| 127 | if (platform_teardown_msi_irq) |
| 128 | return platform_teardown_msi_irq(irq); |
| 129 | |
| 130 | return ia64_teardown_msi_irq(irq); |
| 131 | } |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 132 | |
| 133 | #ifdef CONFIG_DMAR |
| 134 | #ifdef CONFIG_SMP |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 135 | static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 136 | { |
| 137 | struct irq_cfg *cfg = irq_cfg + irq; |
| 138 | struct msi_msg msg; |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 139 | int cpu = cpumask_first(mask); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 140 | |
| 141 | if (!cpu_online(cpu)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 142 | return -1; |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 143 | |
| 144 | if (irq_prepare_move(irq, cpu)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 145 | return -1; |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 146 | |
| 147 | dmar_msi_read(irq, &msg); |
| 148 | |
| 149 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 150 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 151 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 152 | msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 153 | |
| 154 | dmar_msi_write(irq, &msg); |
Mike Travis | e65e49d | 2009-01-12 15:27:13 -0800 | [diff] [blame] | 155 | cpumask_copy(irq_desc[irq].affinity, mask); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 156 | |
| 157 | return 0; |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 158 | } |
| 159 | #endif /* CONFIG_SMP */ |
| 160 | |
Jaswinder Singh Rajput | 9542b21 | 2009-06-10 12:45:01 -0700 | [diff] [blame] | 161 | static struct irq_chip dmar_msi_type = { |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 162 | .name = "DMAR_MSI", |
| 163 | .unmask = dmar_msi_unmask, |
| 164 | .mask = dmar_msi_mask, |
| 165 | .ack = ia64_ack_msi_irq, |
| 166 | #ifdef CONFIG_SMP |
| 167 | .set_affinity = dmar_msi_set_affinity, |
| 168 | #endif |
| 169 | .retrigger = ia64_msi_retrigger_irq, |
| 170 | }; |
| 171 | |
| 172 | static int |
| 173 | msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) |
| 174 | { |
| 175 | struct irq_cfg *cfg = irq_cfg + irq; |
| 176 | unsigned dest; |
| 177 | cpumask_t mask; |
| 178 | |
| 179 | cpus_and(mask, irq_to_domain(irq), cpu_online_map); |
| 180 | dest = cpu_physical_id(first_cpu(mask)); |
| 181 | |
| 182 | msg->address_hi = 0; |
| 183 | msg->address_lo = |
| 184 | MSI_ADDR_HEADER | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 185 | MSI_ADDR_DEST_MODE_PHYS | |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 186 | MSI_ADDR_REDIRECTION_CPU | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 187 | MSI_ADDR_DEST_ID_CPU(dest); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 188 | |
| 189 | msg->data = |
| 190 | MSI_DATA_TRIGGER_EDGE | |
| 191 | MSI_DATA_LEVEL_ASSERT | |
| 192 | MSI_DATA_DELIVERY_FIXED | |
| 193 | MSI_DATA_VECTOR(cfg->vector); |
| 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | int arch_setup_dmar_msi(unsigned int irq) |
| 198 | { |
| 199 | int ret; |
| 200 | struct msi_msg msg; |
| 201 | |
| 202 | ret = msi_compose_msg(NULL, irq, &msg); |
| 203 | if (ret < 0) |
| 204 | return ret; |
| 205 | dmar_msi_write(irq, &msg); |
| 206 | set_irq_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, |
| 207 | "edge"); |
| 208 | return 0; |
| 209 | } |
| 210 | #endif /* CONFIG_DMAR */ |
| 211 | |