Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * RTC driver for the Micro Crystal RV3028 |
| 4 | * |
| 5 | * Copyright (C) 2019 Micro Crystal SA |
| 6 | * |
| 7 | * Alexandre Belloni <alexandre.belloni@bootlin.com> |
| 8 | * |
| 9 | */ |
| 10 | |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 11 | #include <linux/clk-provider.h> |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 12 | #include <linux/bcd.h> |
| 13 | #include <linux/bitops.h> |
| 14 | #include <linux/i2c.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/log2.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/of_device.h> |
| 20 | #include <linux/regmap.h> |
| 21 | #include <linux/rtc.h> |
| 22 | |
| 23 | #define RV3028_SEC 0x00 |
| 24 | #define RV3028_MIN 0x01 |
| 25 | #define RV3028_HOUR 0x02 |
| 26 | #define RV3028_WDAY 0x03 |
| 27 | #define RV3028_DAY 0x04 |
| 28 | #define RV3028_MONTH 0x05 |
| 29 | #define RV3028_YEAR 0x06 |
| 30 | #define RV3028_ALARM_MIN 0x07 |
| 31 | #define RV3028_ALARM_HOUR 0x08 |
| 32 | #define RV3028_ALARM_DAY 0x09 |
| 33 | #define RV3028_STATUS 0x0E |
| 34 | #define RV3028_CTRL1 0x0F |
| 35 | #define RV3028_CTRL2 0x10 |
| 36 | #define RV3028_EVT_CTRL 0x13 |
| 37 | #define RV3028_TS_COUNT 0x14 |
| 38 | #define RV3028_TS_SEC 0x15 |
| 39 | #define RV3028_RAM1 0x1F |
| 40 | #define RV3028_EEPROM_ADDR 0x25 |
| 41 | #define RV3028_EEPROM_DATA 0x26 |
| 42 | #define RV3028_EEPROM_CMD 0x27 |
| 43 | #define RV3028_CLKOUT 0x35 |
| 44 | #define RV3028_OFFSET 0x36 |
| 45 | #define RV3028_BACKUP 0x37 |
| 46 | |
| 47 | #define RV3028_STATUS_PORF BIT(0) |
| 48 | #define RV3028_STATUS_EVF BIT(1) |
| 49 | #define RV3028_STATUS_AF BIT(2) |
| 50 | #define RV3028_STATUS_TF BIT(3) |
| 51 | #define RV3028_STATUS_UF BIT(4) |
| 52 | #define RV3028_STATUS_BSF BIT(5) |
| 53 | #define RV3028_STATUS_CLKF BIT(6) |
| 54 | #define RV3028_STATUS_EEBUSY BIT(7) |
| 55 | |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 56 | #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0) |
| 57 | #define RV3028_CLKOUT_PORIE BIT(3) |
| 58 | #define RV3028_CLKOUT_CLKSY BIT(6) |
| 59 | #define RV3028_CLKOUT_CLKOE BIT(7) |
| 60 | |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 61 | #define RV3028_CTRL1_EERD BIT(3) |
| 62 | #define RV3028_CTRL1_WADA BIT(5) |
| 63 | |
| 64 | #define RV3028_CTRL2_RESET BIT(0) |
| 65 | #define RV3028_CTRL2_12_24 BIT(1) |
| 66 | #define RV3028_CTRL2_EIE BIT(2) |
| 67 | #define RV3028_CTRL2_AIE BIT(3) |
| 68 | #define RV3028_CTRL2_TIE BIT(4) |
| 69 | #define RV3028_CTRL2_UIE BIT(5) |
| 70 | #define RV3028_CTRL2_TSE BIT(7) |
| 71 | |
| 72 | #define RV3028_EVT_CTRL_TSR BIT(2) |
| 73 | |
Alexandre Belloni | 024e6f3 | 2020-10-09 17:31:01 +0200 | [diff] [blame] | 74 | #define RV3028_EEPROM_CMD_UPDATE 0x11 |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 75 | #define RV3028_EEPROM_CMD_WRITE 0x21 |
| 76 | #define RV3028_EEPROM_CMD_READ 0x22 |
| 77 | |
| 78 | #define RV3028_EEBUSY_POLL 10000 |
| 79 | #define RV3028_EEBUSY_TIMEOUT 100000 |
| 80 | |
| 81 | #define RV3028_BACKUP_TCE BIT(5) |
| 82 | #define RV3028_BACKUP_TCR_MASK GENMASK(1,0) |
| 83 | |
| 84 | #define OFFSET_STEP_PPT 953674 |
| 85 | |
| 86 | enum rv3028_type { |
| 87 | rv_3028, |
| 88 | }; |
| 89 | |
| 90 | struct rv3028_data { |
| 91 | struct regmap *regmap; |
| 92 | struct rtc_device *rtc; |
| 93 | enum rv3028_type type; |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 94 | #ifdef CONFIG_COMMON_CLK |
| 95 | struct clk_hw clkout_hw; |
| 96 | #endif |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 97 | }; |
| 98 | |
Alexandre Belloni | c1efae1 | 2020-10-09 17:30:59 +0200 | [diff] [blame] | 99 | static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000}; |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 100 | |
| 101 | static ssize_t timestamp0_store(struct device *dev, |
| 102 | struct device_attribute *attr, |
| 103 | const char *buf, size_t count) |
| 104 | { |
| 105 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); |
| 106 | |
| 107 | regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR, |
| 108 | RV3028_EVT_CTRL_TSR); |
| 109 | |
| 110 | return count; |
| 111 | }; |
| 112 | |
| 113 | static ssize_t timestamp0_show(struct device *dev, |
| 114 | struct device_attribute *attr, char *buf) |
| 115 | { |
| 116 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); |
| 117 | struct rtc_time tm; |
| 118 | int ret, count; |
| 119 | u8 date[6]; |
| 120 | |
| 121 | ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); |
| 122 | if (ret) |
| 123 | return ret; |
| 124 | |
| 125 | if (!count) |
| 126 | return 0; |
| 127 | |
| 128 | ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date, |
| 129 | sizeof(date)); |
| 130 | if (ret) |
| 131 | return ret; |
| 132 | |
| 133 | tm.tm_sec = bcd2bin(date[0]); |
| 134 | tm.tm_min = bcd2bin(date[1]); |
| 135 | tm.tm_hour = bcd2bin(date[2]); |
| 136 | tm.tm_mday = bcd2bin(date[3]); |
| 137 | tm.tm_mon = bcd2bin(date[4]) - 1; |
| 138 | tm.tm_year = bcd2bin(date[5]) + 100; |
| 139 | |
| 140 | ret = rtc_valid_tm(&tm); |
| 141 | if (ret) |
| 142 | return ret; |
| 143 | |
| 144 | return sprintf(buf, "%llu\n", |
| 145 | (unsigned long long)rtc_tm_to_time64(&tm)); |
| 146 | }; |
| 147 | |
| 148 | static DEVICE_ATTR_RW(timestamp0); |
| 149 | |
| 150 | static ssize_t timestamp0_count_show(struct device *dev, |
| 151 | struct device_attribute *attr, char *buf) |
| 152 | { |
| 153 | struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); |
| 154 | int ret, count; |
| 155 | |
| 156 | ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); |
| 157 | if (ret) |
| 158 | return ret; |
| 159 | |
| 160 | return sprintf(buf, "%u\n", count); |
| 161 | }; |
| 162 | |
| 163 | static DEVICE_ATTR_RO(timestamp0_count); |
| 164 | |
| 165 | static struct attribute *rv3028_attrs[] = { |
| 166 | &dev_attr_timestamp0.attr, |
| 167 | &dev_attr_timestamp0_count.attr, |
| 168 | NULL |
| 169 | }; |
| 170 | |
| 171 | static const struct attribute_group rv3028_attr_group = { |
| 172 | .attrs = rv3028_attrs, |
| 173 | }; |
| 174 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 175 | static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd) |
| 176 | { |
| 177 | if (eerd) |
| 178 | return 0; |
| 179 | |
| 180 | return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0); |
| 181 | } |
| 182 | |
| 183 | static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd) |
| 184 | { |
| 185 | u32 ctrl1, status; |
| 186 | int ret; |
| 187 | |
| 188 | ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1); |
| 189 | if (ret) |
| 190 | return ret; |
| 191 | |
| 192 | *eerd = ctrl1 & RV3028_CTRL1_EERD; |
| 193 | if (*eerd) |
| 194 | return 0; |
| 195 | |
| 196 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1, |
| 197 | RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); |
| 198 | if (ret) |
| 199 | return ret; |
| 200 | |
| 201 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
| 202 | !(status & RV3028_STATUS_EEBUSY), |
| 203 | RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); |
| 204 | if (ret) { |
| 205 | rv3028_exit_eerd(rv3028, *eerd); |
| 206 | |
| 207 | return ret; |
| 208 | } |
| 209 | |
| 210 | return 0; |
| 211 | } |
| 212 | |
Alexandre Belloni | 024e6f3 | 2020-10-09 17:31:01 +0200 | [diff] [blame] | 213 | static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd) |
| 214 | { |
| 215 | u32 status; |
| 216 | int ret; |
| 217 | |
| 218 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); |
| 219 | if (ret) |
| 220 | goto exit_eerd; |
| 221 | |
| 222 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE); |
| 223 | if (ret) |
| 224 | goto exit_eerd; |
| 225 | |
| 226 | usleep_range(63000, RV3028_EEBUSY_TIMEOUT); |
| 227 | |
| 228 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
| 229 | !(status & RV3028_STATUS_EEBUSY), |
| 230 | RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); |
| 231 | |
| 232 | exit_eerd: |
| 233 | rv3028_exit_eerd(rv3028, eerd); |
| 234 | |
| 235 | return ret; |
| 236 | } |
| 237 | |
| 238 | static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg, |
| 239 | unsigned int mask, unsigned int val) |
| 240 | { |
| 241 | u32 eerd; |
| 242 | int ret; |
| 243 | |
| 244 | ret = rv3028_enter_eerd(rv3028, &eerd); |
| 245 | if (ret) |
| 246 | return ret; |
| 247 | |
| 248 | ret = regmap_update_bits(rv3028->regmap, reg, mask, val); |
| 249 | if (ret) { |
| 250 | rv3028_exit_eerd(rv3028, eerd); |
| 251 | return ret; |
| 252 | } |
| 253 | |
| 254 | return rv3028_update_eeprom(rv3028, eerd); |
| 255 | } |
| 256 | |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 257 | static irqreturn_t rv3028_handle_irq(int irq, void *dev_id) |
| 258 | { |
| 259 | struct rv3028_data *rv3028 = dev_id; |
| 260 | unsigned long events = 0; |
| 261 | u32 status = 0, ctrl = 0; |
| 262 | |
| 263 | if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 || |
| 264 | status == 0) { |
| 265 | return IRQ_NONE; |
| 266 | } |
| 267 | |
| 268 | if (status & RV3028_STATUS_PORF) |
| 269 | dev_warn(&rv3028->rtc->dev, "Voltage low, data loss detected.\n"); |
| 270 | |
| 271 | if (status & RV3028_STATUS_TF) { |
| 272 | status |= RV3028_STATUS_TF; |
| 273 | ctrl |= RV3028_CTRL2_TIE; |
| 274 | events |= RTC_PF; |
| 275 | } |
| 276 | |
| 277 | if (status & RV3028_STATUS_AF) { |
| 278 | status |= RV3028_STATUS_AF; |
| 279 | ctrl |= RV3028_CTRL2_AIE; |
| 280 | events |= RTC_AF; |
| 281 | } |
| 282 | |
| 283 | if (status & RV3028_STATUS_UF) { |
| 284 | status |= RV3028_STATUS_UF; |
| 285 | ctrl |= RV3028_CTRL2_UIE; |
| 286 | events |= RTC_UF; |
| 287 | } |
| 288 | |
| 289 | if (events) { |
| 290 | rtc_update_irq(rv3028->rtc, 1, events); |
| 291 | regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0); |
| 292 | regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0); |
| 293 | } |
| 294 | |
| 295 | if (status & RV3028_STATUS_EVF) { |
| 296 | sysfs_notify(&rv3028->rtc->dev.kobj, NULL, |
| 297 | dev_attr_timestamp0.attr.name); |
| 298 | dev_warn(&rv3028->rtc->dev, "event detected"); |
| 299 | } |
| 300 | |
| 301 | return IRQ_HANDLED; |
| 302 | } |
| 303 | |
| 304 | static int rv3028_get_time(struct device *dev, struct rtc_time *tm) |
| 305 | { |
| 306 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
| 307 | u8 date[7]; |
| 308 | int ret, status; |
| 309 | |
| 310 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); |
| 311 | if (ret < 0) |
| 312 | return ret; |
| 313 | |
| 314 | if (status & RV3028_STATUS_PORF) { |
| 315 | dev_warn(dev, "Voltage low, data is invalid.\n"); |
| 316 | return -EINVAL; |
| 317 | } |
| 318 | |
| 319 | ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date)); |
| 320 | if (ret) |
| 321 | return ret; |
| 322 | |
| 323 | tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f); |
| 324 | tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f); |
| 325 | tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f); |
| 326 | tm->tm_wday = ilog2(date[RV3028_WDAY] & 0x7f); |
| 327 | tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f); |
| 328 | tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1; |
| 329 | tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100; |
| 330 | |
| 331 | return 0; |
| 332 | } |
| 333 | |
| 334 | static int rv3028_set_time(struct device *dev, struct rtc_time *tm) |
| 335 | { |
| 336 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
| 337 | u8 date[7]; |
| 338 | int ret; |
| 339 | |
| 340 | date[RV3028_SEC] = bin2bcd(tm->tm_sec); |
| 341 | date[RV3028_MIN] = bin2bcd(tm->tm_min); |
| 342 | date[RV3028_HOUR] = bin2bcd(tm->tm_hour); |
| 343 | date[RV3028_WDAY] = 1 << (tm->tm_wday); |
| 344 | date[RV3028_DAY] = bin2bcd(tm->tm_mday); |
| 345 | date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1); |
| 346 | date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100); |
| 347 | |
| 348 | /* |
| 349 | * Writing to the Seconds register has the same effect as setting RESET |
| 350 | * bit to 1 |
| 351 | */ |
| 352 | ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date, |
| 353 | sizeof(date)); |
| 354 | if (ret) |
| 355 | return ret; |
| 356 | |
| 357 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, |
| 358 | RV3028_STATUS_PORF, 0); |
| 359 | |
| 360 | return ret; |
| 361 | } |
| 362 | |
| 363 | static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 364 | { |
| 365 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
| 366 | u8 alarmvals[3]; |
| 367 | int status, ctrl, ret; |
| 368 | |
| 369 | ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, |
| 370 | sizeof(alarmvals)); |
| 371 | if (ret) |
| 372 | return ret; |
| 373 | |
| 374 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); |
| 375 | if (ret < 0) |
| 376 | return ret; |
| 377 | |
| 378 | ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl); |
| 379 | if (ret < 0) |
| 380 | return ret; |
| 381 | |
| 382 | alrm->time.tm_sec = 0; |
| 383 | alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); |
| 384 | alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); |
| 385 | alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f); |
| 386 | |
| 387 | alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE); |
| 388 | alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled; |
| 389 | |
| 390 | return 0; |
| 391 | } |
| 392 | |
| 393 | static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 394 | { |
| 395 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
| 396 | u8 alarmvals[3]; |
| 397 | u8 ctrl = 0; |
| 398 | int ret; |
| 399 | |
| 400 | /* The alarm has no seconds, round up to nearest minute */ |
| 401 | if (alrm->time.tm_sec) { |
| 402 | time64_t alarm_time = rtc_tm_to_time64(&alrm->time); |
| 403 | |
| 404 | alarm_time += 60 - alrm->time.tm_sec; |
| 405 | rtc_time64_to_tm(alarm_time, &alrm->time); |
| 406 | } |
| 407 | |
| 408 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, |
| 409 | RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0); |
| 410 | if (ret) |
| 411 | return ret; |
| 412 | |
| 413 | alarmvals[0] = bin2bcd(alrm->time.tm_min); |
| 414 | alarmvals[1] = bin2bcd(alrm->time.tm_hour); |
| 415 | alarmvals[2] = bin2bcd(alrm->time.tm_mday); |
| 416 | |
| 417 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, |
| 418 | RV3028_STATUS_AF, 0); |
| 419 | if (ret) |
| 420 | return ret; |
| 421 | |
| 422 | ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, |
| 423 | sizeof(alarmvals)); |
| 424 | if (ret) |
| 425 | return ret; |
| 426 | |
| 427 | if (alrm->enabled) { |
| 428 | if (rv3028->rtc->uie_rtctimer.enabled) |
| 429 | ctrl |= RV3028_CTRL2_UIE; |
| 430 | if (rv3028->rtc->aie_timer.enabled) |
| 431 | ctrl |= RV3028_CTRL2_AIE; |
| 432 | } |
| 433 | |
| 434 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, |
| 435 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); |
| 436 | |
| 437 | return ret; |
| 438 | } |
| 439 | |
| 440 | static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 441 | { |
| 442 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
| 443 | int ctrl = 0, ret; |
| 444 | |
| 445 | if (enabled) { |
| 446 | if (rv3028->rtc->uie_rtctimer.enabled) |
| 447 | ctrl |= RV3028_CTRL2_UIE; |
| 448 | if (rv3028->rtc->aie_timer.enabled) |
| 449 | ctrl |= RV3028_CTRL2_AIE; |
| 450 | } |
| 451 | |
| 452 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, |
| 453 | RV3028_STATUS_AF | RV3028_STATUS_UF, 0); |
| 454 | if (ret) |
| 455 | return ret; |
| 456 | |
| 457 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, |
| 458 | RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); |
| 459 | if (ret) |
| 460 | return ret; |
| 461 | |
| 462 | return 0; |
| 463 | } |
| 464 | |
| 465 | static int rv3028_read_offset(struct device *dev, long *offset) |
| 466 | { |
| 467 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
| 468 | int ret, value, steps; |
| 469 | |
| 470 | ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value); |
| 471 | if (ret < 0) |
| 472 | return ret; |
| 473 | |
| 474 | steps = sign_extend32(value << 1, 8); |
| 475 | |
| 476 | ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value); |
| 477 | if (ret < 0) |
| 478 | return ret; |
| 479 | |
| 480 | steps += value >> 7; |
| 481 | |
| 482 | *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000); |
| 483 | |
| 484 | return 0; |
| 485 | } |
| 486 | |
| 487 | static int rv3028_set_offset(struct device *dev, long offset) |
| 488 | { |
| 489 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
Alexandre Belloni | 024e6f3 | 2020-10-09 17:31:01 +0200 | [diff] [blame] | 490 | u32 eerd; |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 491 | int ret; |
| 492 | |
| 493 | offset = clamp(offset, -244141L, 243187L) * 1000; |
| 494 | offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); |
| 495 | |
Alexandre Belloni | 024e6f3 | 2020-10-09 17:31:01 +0200 | [diff] [blame] | 496 | ret = rv3028_enter_eerd(rv3028, &eerd); |
| 497 | if (ret) |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 498 | return ret; |
| 499 | |
Alexandre Belloni | 024e6f3 | 2020-10-09 17:31:01 +0200 | [diff] [blame] | 500 | ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1); |
| 501 | if (ret < 0) |
| 502 | goto exit_eerd; |
| 503 | |
| 504 | ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7), |
| 505 | offset << 7); |
| 506 | if (ret < 0) |
| 507 | goto exit_eerd; |
| 508 | |
| 509 | return rv3028_update_eeprom(rv3028, eerd); |
| 510 | |
| 511 | exit_eerd: |
| 512 | rv3028_exit_eerd(rv3028, eerd); |
| 513 | |
| 514 | return ret; |
| 515 | |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 516 | } |
| 517 | |
| 518 | static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
| 519 | { |
| 520 | struct rv3028_data *rv3028 = dev_get_drvdata(dev); |
| 521 | int status, ret = 0; |
| 522 | |
| 523 | switch (cmd) { |
| 524 | case RTC_VL_READ: |
| 525 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); |
| 526 | if (ret < 0) |
| 527 | return ret; |
| 528 | |
Alexandre Belloni | 86e655f | 2019-12-14 23:02:55 +0100 | [diff] [blame] | 529 | status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0; |
| 530 | return put_user(status, (unsigned int __user *)arg); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 531 | |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 532 | default: |
| 533 | return -ENOIOCTLCMD; |
| 534 | } |
| 535 | } |
| 536 | |
| 537 | static int rv3028_nvram_write(void *priv, unsigned int offset, void *val, |
| 538 | size_t bytes) |
| 539 | { |
| 540 | return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes); |
| 541 | } |
| 542 | |
| 543 | static int rv3028_nvram_read(void *priv, unsigned int offset, void *val, |
| 544 | size_t bytes) |
| 545 | { |
| 546 | return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes); |
| 547 | } |
| 548 | |
| 549 | static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val, |
| 550 | size_t bytes) |
| 551 | { |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 552 | struct rv3028_data *rv3028 = priv; |
| 553 | u32 status, eerd; |
| 554 | int i, ret; |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 555 | u8 *buf = val; |
| 556 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 557 | ret = rv3028_enter_eerd(rv3028, &eerd); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 558 | if (ret) |
| 559 | return ret; |
| 560 | |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 561 | for (i = 0; i < bytes; i++) { |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 562 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 563 | if (ret) |
| 564 | goto restore_eerd; |
| 565 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 566 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 567 | if (ret) |
| 568 | goto restore_eerd; |
| 569 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 570 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 571 | if (ret) |
| 572 | goto restore_eerd; |
| 573 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 574 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 575 | RV3028_EEPROM_CMD_WRITE); |
| 576 | if (ret) |
| 577 | goto restore_eerd; |
| 578 | |
| 579 | usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); |
| 580 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 581 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 582 | !(status & RV3028_STATUS_EEBUSY), |
| 583 | RV3028_EEBUSY_POLL, |
| 584 | RV3028_EEBUSY_TIMEOUT); |
| 585 | if (ret) |
| 586 | goto restore_eerd; |
| 587 | } |
| 588 | |
| 589 | restore_eerd: |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 590 | rv3028_exit_eerd(rv3028, eerd); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 591 | |
| 592 | return ret; |
| 593 | } |
| 594 | |
| 595 | static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val, |
| 596 | size_t bytes) |
| 597 | { |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 598 | struct rv3028_data *rv3028 = priv; |
| 599 | u32 status, eerd, data; |
| 600 | int i, ret; |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 601 | u8 *buf = val; |
| 602 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 603 | ret = rv3028_enter_eerd(rv3028, &eerd); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 604 | if (ret) |
| 605 | return ret; |
| 606 | |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 607 | for (i = 0; i < bytes; i++) { |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 608 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 609 | if (ret) |
| 610 | goto restore_eerd; |
| 611 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 612 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 613 | if (ret) |
| 614 | goto restore_eerd; |
| 615 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 616 | ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 617 | RV3028_EEPROM_CMD_READ); |
| 618 | if (ret) |
| 619 | goto restore_eerd; |
| 620 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 621 | ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status, |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 622 | !(status & RV3028_STATUS_EEBUSY), |
| 623 | RV3028_EEBUSY_POLL, |
| 624 | RV3028_EEBUSY_TIMEOUT); |
| 625 | if (ret) |
| 626 | goto restore_eerd; |
| 627 | |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 628 | ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 629 | if (ret) |
| 630 | goto restore_eerd; |
| 631 | buf[i] = data; |
| 632 | } |
| 633 | |
| 634 | restore_eerd: |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 635 | rv3028_exit_eerd(rv3028, eerd); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 636 | |
| 637 | return ret; |
| 638 | } |
| 639 | |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 640 | #ifdef CONFIG_COMMON_CLK |
| 641 | #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw) |
| 642 | |
| 643 | static int clkout_rates[] = { |
| 644 | 32768, |
| 645 | 8192, |
| 646 | 1024, |
| 647 | 64, |
| 648 | 32, |
| 649 | 1, |
| 650 | }; |
| 651 | |
| 652 | static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw, |
| 653 | unsigned long parent_rate) |
| 654 | { |
| 655 | int clkout, ret; |
| 656 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
| 657 | |
| 658 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout); |
| 659 | if (ret < 0) |
| 660 | return 0; |
| 661 | |
| 662 | clkout &= RV3028_CLKOUT_FD_MASK; |
| 663 | return clkout_rates[clkout]; |
| 664 | } |
| 665 | |
| 666 | static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate, |
| 667 | unsigned long *prate) |
| 668 | { |
| 669 | int i; |
| 670 | |
| 671 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
| 672 | if (clkout_rates[i] <= rate) |
| 673 | return clkout_rates[i]; |
| 674 | |
| 675 | return 0; |
| 676 | } |
| 677 | |
| 678 | static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate, |
| 679 | unsigned long parent_rate) |
| 680 | { |
| 681 | int i, ret; |
Alexandre Belloni | 00e8e87 | 2020-10-09 17:30:58 +0200 | [diff] [blame] | 682 | u32 enabled; |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 683 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
| 684 | |
Alexandre Belloni | 00e8e87 | 2020-10-09 17:30:58 +0200 | [diff] [blame] | 685 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled); |
| 686 | if (ret < 0) |
| 687 | return ret; |
| 688 | |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 689 | ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0); |
| 690 | if (ret < 0) |
| 691 | return ret; |
| 692 | |
Alexandre Belloni | 00e8e87 | 2020-10-09 17:30:58 +0200 | [diff] [blame] | 693 | enabled &= RV3028_CLKOUT_CLKOE; |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 694 | |
Alexandre Belloni | 00e8e87 | 2020-10-09 17:30:58 +0200 | [diff] [blame] | 695 | for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) |
| 696 | if (clkout_rates[i] == rate) |
Alexandre Belloni | 024e6f3 | 2020-10-09 17:31:01 +0200 | [diff] [blame] | 697 | return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff, |
| 698 | RV3028_CLKOUT_CLKSY | enabled | i); |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 699 | |
| 700 | return -EINVAL; |
| 701 | } |
| 702 | |
| 703 | static int rv3028_clkout_prepare(struct clk_hw *hw) |
| 704 | { |
| 705 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
| 706 | |
| 707 | return regmap_write(rv3028->regmap, RV3028_CLKOUT, |
| 708 | RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE); |
| 709 | } |
| 710 | |
| 711 | static void rv3028_clkout_unprepare(struct clk_hw *hw) |
| 712 | { |
| 713 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
| 714 | |
| 715 | regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0); |
| 716 | regmap_update_bits(rv3028->regmap, RV3028_STATUS, |
| 717 | RV3028_STATUS_CLKF, 0); |
| 718 | } |
| 719 | |
| 720 | static int rv3028_clkout_is_prepared(struct clk_hw *hw) |
| 721 | { |
| 722 | int clkout, ret; |
| 723 | struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw); |
| 724 | |
| 725 | ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout); |
| 726 | if (ret < 0) |
| 727 | return ret; |
| 728 | |
| 729 | return !!(clkout & RV3028_CLKOUT_CLKOE); |
| 730 | } |
| 731 | |
| 732 | static const struct clk_ops rv3028_clkout_ops = { |
| 733 | .prepare = rv3028_clkout_prepare, |
| 734 | .unprepare = rv3028_clkout_unprepare, |
| 735 | .is_prepared = rv3028_clkout_is_prepared, |
| 736 | .recalc_rate = rv3028_clkout_recalc_rate, |
| 737 | .round_rate = rv3028_clkout_round_rate, |
| 738 | .set_rate = rv3028_clkout_set_rate, |
| 739 | }; |
| 740 | |
| 741 | static int rv3028_clkout_register_clk(struct rv3028_data *rv3028, |
| 742 | struct i2c_client *client) |
| 743 | { |
| 744 | int ret; |
| 745 | struct clk *clk; |
| 746 | struct clk_init_data init; |
| 747 | struct device_node *node = client->dev.of_node; |
| 748 | |
| 749 | ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, |
| 750 | RV3028_STATUS_CLKF, 0); |
| 751 | if (ret < 0) |
| 752 | return ret; |
| 753 | |
| 754 | init.name = "rv3028-clkout"; |
| 755 | init.ops = &rv3028_clkout_ops; |
| 756 | init.flags = 0; |
| 757 | init.parent_names = NULL; |
| 758 | init.num_parents = 0; |
| 759 | rv3028->clkout_hw.init = &init; |
| 760 | |
| 761 | /* optional override of the clockname */ |
| 762 | of_property_read_string(node, "clock-output-names", &init.name); |
| 763 | |
| 764 | /* register the clock */ |
| 765 | clk = devm_clk_register(&client->dev, &rv3028->clkout_hw); |
| 766 | if (!IS_ERR(clk)) |
| 767 | of_clk_add_provider(node, of_clk_src_simple_get, clk); |
| 768 | |
| 769 | return 0; |
| 770 | } |
| 771 | #endif |
| 772 | |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 773 | static struct rtc_class_ops rv3028_rtc_ops = { |
| 774 | .read_time = rv3028_get_time, |
| 775 | .set_time = rv3028_set_time, |
| 776 | .read_offset = rv3028_read_offset, |
| 777 | .set_offset = rv3028_set_offset, |
| 778 | .ioctl = rv3028_ioctl, |
| 779 | }; |
| 780 | |
| 781 | static const struct regmap_config regmap_config = { |
| 782 | .reg_bits = 8, |
| 783 | .val_bits = 8, |
| 784 | .max_register = 0x37, |
| 785 | }; |
| 786 | |
| 787 | static int rv3028_probe(struct i2c_client *client) |
| 788 | { |
| 789 | struct rv3028_data *rv3028; |
| 790 | int ret, status; |
| 791 | u32 ohms; |
| 792 | struct nvmem_config nvmem_cfg = { |
| 793 | .name = "rv3028_nvram", |
| 794 | .word_size = 1, |
| 795 | .stride = 1, |
| 796 | .size = 2, |
| 797 | .type = NVMEM_TYPE_BATTERY_BACKED, |
| 798 | .reg_read = rv3028_nvram_read, |
| 799 | .reg_write = rv3028_nvram_write, |
| 800 | }; |
| 801 | struct nvmem_config eeprom_cfg = { |
| 802 | .name = "rv3028_eeprom", |
| 803 | .word_size = 1, |
| 804 | .stride = 1, |
| 805 | .size = 43, |
| 806 | .type = NVMEM_TYPE_EEPROM, |
| 807 | .reg_read = rv3028_eeprom_read, |
| 808 | .reg_write = rv3028_eeprom_write, |
| 809 | }; |
| 810 | |
| 811 | rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data), |
| 812 | GFP_KERNEL); |
| 813 | if (!rv3028) |
| 814 | return -ENOMEM; |
| 815 | |
| 816 | rv3028->regmap = devm_regmap_init_i2c(client, ®map_config); |
Chuhong Yuan | c3b29bf | 2020-05-28 18:39:50 +0800 | [diff] [blame] | 817 | if (IS_ERR(rv3028->regmap)) |
| 818 | return PTR_ERR(rv3028->regmap); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 819 | |
| 820 | i2c_set_clientdata(client, rv3028); |
| 821 | |
| 822 | ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); |
| 823 | if (ret < 0) |
| 824 | return ret; |
| 825 | |
| 826 | if (status & RV3028_STATUS_PORF) |
| 827 | dev_warn(&client->dev, "Voltage low, data loss detected.\n"); |
| 828 | |
| 829 | if (status & RV3028_STATUS_AF) |
| 830 | dev_warn(&client->dev, "An alarm may have been missed.\n"); |
| 831 | |
| 832 | rv3028->rtc = devm_rtc_allocate_device(&client->dev); |
Alexandre Belloni | 44c638c | 2019-08-19 00:00:41 +0200 | [diff] [blame] | 833 | if (IS_ERR(rv3028->rtc)) |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 834 | return PTR_ERR(rv3028->rtc); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 835 | |
| 836 | if (client->irq > 0) { |
| 837 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
| 838 | NULL, rv3028_handle_irq, |
| 839 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, |
| 840 | "rv3028", rv3028); |
| 841 | if (ret) { |
| 842 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); |
| 843 | client->irq = 0; |
| 844 | } else { |
| 845 | rv3028_rtc_ops.read_alarm = rv3028_get_alarm; |
| 846 | rv3028_rtc_ops.set_alarm = rv3028_set_alarm; |
| 847 | rv3028_rtc_ops.alarm_irq_enable = rv3028_alarm_irq_enable; |
| 848 | } |
| 849 | } |
| 850 | |
| 851 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1, |
| 852 | RV3028_CTRL1_WADA, RV3028_CTRL1_WADA); |
| 853 | if (ret) |
| 854 | return ret; |
| 855 | |
| 856 | /* setup timestamping */ |
| 857 | ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, |
| 858 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE, |
| 859 | RV3028_CTRL2_EIE | RV3028_CTRL2_TSE); |
| 860 | if (ret) |
| 861 | return ret; |
| 862 | |
| 863 | /* setup trickle charger */ |
| 864 | if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms", |
| 865 | &ohms)) { |
| 866 | int i; |
| 867 | |
| 868 | for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++) |
| 869 | if (ohms == rv3028_trickle_resistors[i]) |
| 870 | break; |
| 871 | |
| 872 | if (i < ARRAY_SIZE(rv3028_trickle_resistors)) { |
Alexandre Belloni | 024e6f3 | 2020-10-09 17:31:01 +0200 | [diff] [blame] | 873 | ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE | |
| 874 | RV3028_BACKUP_TCR_MASK, RV3028_BACKUP_TCE | i); |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 875 | if (ret) |
| 876 | return ret; |
| 877 | } else { |
| 878 | dev_warn(&client->dev, "invalid trickle resistor value\n"); |
| 879 | } |
| 880 | } |
| 881 | |
| 882 | ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group); |
| 883 | if (ret) |
| 884 | return ret; |
| 885 | |
| 886 | rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; |
| 887 | rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099; |
| 888 | rv3028->rtc->ops = &rv3028_rtc_ops; |
| 889 | ret = rtc_register_device(rv3028->rtc); |
| 890 | if (ret) |
| 891 | return ret; |
| 892 | |
| 893 | nvmem_cfg.priv = rv3028->regmap; |
| 894 | rtc_nvmem_register(rv3028->rtc, &nvmem_cfg); |
Alexandre Belloni | de0ad60 | 2020-10-09 17:31:00 +0200 | [diff] [blame] | 895 | eeprom_cfg.priv = rv3028; |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 896 | rtc_nvmem_register(rv3028->rtc, &eeprom_cfg); |
| 897 | |
| 898 | rv3028->rtc->max_user_freq = 1; |
| 899 | |
Parthiban Nallathambi | f583c34 | 2019-10-18 12:04:25 +0200 | [diff] [blame] | 900 | #ifdef CONFIG_COMMON_CLK |
| 901 | rv3028_clkout_register_clk(rv3028, client); |
| 902 | #endif |
Alexandre Belloni | e6e7376 | 2019-02-13 00:21:36 +0100 | [diff] [blame] | 903 | return 0; |
| 904 | } |
| 905 | |
| 906 | static const struct of_device_id rv3028_of_match[] = { |
| 907 | { .compatible = "microcrystal,rv3028", }, |
| 908 | { } |
| 909 | }; |
| 910 | MODULE_DEVICE_TABLE(of, rv3028_of_match); |
| 911 | |
| 912 | static struct i2c_driver rv3028_driver = { |
| 913 | .driver = { |
| 914 | .name = "rtc-rv3028", |
| 915 | .of_match_table = of_match_ptr(rv3028_of_match), |
| 916 | }, |
| 917 | .probe_new = rv3028_probe, |
| 918 | }; |
| 919 | module_i2c_driver(rv3028_driver); |
| 920 | |
| 921 | MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); |
| 922 | MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver"); |
| 923 | MODULE_LICENSE("GPL v2"); |