blob: 192cf76fbf93ca92914a76df62b9fd45bf892249 [file] [log] [blame]
Andrew Lunn82bb2da2012-11-17 17:00:45 +01001/ {
2 ocp@f1000000 {
3
4 pinctrl: pinctrl@10000 {
5 compatible = "marvell,88f6282-pinctrl";
6 reg = <0x10000 0x20>;
7
Nobuhiro Iwamatsu92904692012-12-23 11:34:36 +09008 pmx_nand: pmx-nand {
9 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
10 "mpp4", "mpp5", "mpp18", "mpp19";
11 marvell,function = "nand";
12 };
13
Andrew Lunn82bb2da2012-11-17 17:00:45 +010014 pmx_sata0: pmx-sata0 {
15 marvell,pins = "mpp5", "mpp21", "mpp23";
16 marvell,function = "sata0";
17 };
18 pmx_sata1: pmx-sata1 {
19 marvell,pins = "mpp4", "mpp20", "mpp22";
20 marvell,function = "sata1";
21 };
22 pmx_spi: pmx-spi {
23 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
24 marvell,function = "spi";
25 };
26 pmx_twsi0: pmx-twsi0 {
27 marvell,pins = "mpp8", "mpp9";
28 marvell,function = "twsi0";
29 };
Nobuhiro Iwamatsu00211e92012-12-23 11:34:34 +090030
31 pmx_twsi1: pmx-twsi1 {
32 marvell,pins = "mpp36", "mpp37";
33 marvell,function = "twsi1";
34 };
35
Andrew Lunn82bb2da2012-11-17 17:00:45 +010036 pmx_uart0: pmx-uart0 {
37 marvell,pins = "mpp10", "mpp11";
38 marvell,function = "uart0";
39 };
40
41 pmx_uart1: pmx-uart1 {
42 marvell,pins = "mpp13", "mpp14";
43 marvell,function = "uart1";
44 };
Thomas Petazzoni8059fc12012-12-21 15:49:13 +010045 pmx_sdio: pmx-sdio {
46 marvell,pins = "mpp12", "mpp13", "mpp14",
47 "mpp15", "mpp16", "mpp17";
48 marvell,function = "sdio";
49 };
Andrew Lunn82bb2da2012-11-17 17:00:45 +010050 };
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090051
52 i2c@11100 {
53 compatible = "marvell,mv64xxx-i2c";
54 reg = <0x11100 0x20>;
55 #address-cells = <1>;
56 #size-cells = <0>;
57 interrupts = <32>;
58 clock-frequency = <100000>;
Nobuhiro Iwamatsu107c21c2013-01-06 11:10:36 +010059 clocks = <&gate_clk 7>;
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090060 status = "disabled";
61 };
Andrew Lunn82bb2da2012-11-17 17:00:45 +010062 };
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090063};