Thomas Gleixner | 4f19048 | 2019-05-27 08:55:14 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * (C) 2003 Dave Jones. |
| 4 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * AMD-specific information |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | union msr_fidvidctl { |
| 9 | struct { |
| 10 | unsigned FID:5, // 4:0 |
| 11 | reserved1:3, // 7:5 |
| 12 | VID:5, // 12:8 |
| 13 | reserved2:3, // 15:13 |
| 14 | FIDC:1, // 16 |
| 15 | VIDC:1, // 17 |
| 16 | reserved3:2, // 19:18 |
| 17 | FIDCHGRATIO:1, // 20 |
| 18 | reserved4:11, // 31-21 |
| 19 | SGTC:20, // 32:51 |
| 20 | reserved5:12; // 63:52 |
| 21 | } bits; |
| 22 | unsigned long long val; |
| 23 | }; |
| 24 | |
| 25 | union msr_fidvidstatus { |
| 26 | struct { |
| 27 | unsigned CFID:5, // 4:0 |
| 28 | reserved1:3, // 7:5 |
| 29 | SFID:5, // 12:8 |
| 30 | reserved2:3, // 15:13 |
| 31 | MFID:5, // 20:16 |
| 32 | reserved3:11, // 31:21 |
| 33 | CVID:5, // 36:32 |
| 34 | reserved4:3, // 39:37 |
| 35 | SVID:5, // 44:40 |
| 36 | reserved5:3, // 47:45 |
| 37 | MVID:5, // 52:48 |
| 38 | reserved6:11; // 63:53 |
| 39 | } bits; |
| 40 | unsigned long long val; |
| 41 | }; |