blob: 042334d9be325f61cb5bed5d300de797ad5c6fd6 [file] [log] [blame]
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -06001/*
2 * bytcr_rt5651.c - ASoc Machine driver for Intel Byt CR platform
3 * (derived from bytcr_rt5640.c)
4 *
5 * Copyright (C) 2015 Intel Corp
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
18 */
19
20#include <linux/init.h>
Hans de Goede46058ae2018-03-04 15:35:59 +010021#include <linux/i2c.h>
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -060022#include <linux/module.h>
23#include <linux/platform_device.h>
Hans de Goede46058ae2018-03-04 15:35:59 +010024#include <linux/property.h>
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -060025#include <linux/acpi.h>
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -050026#include <linux/clk.h>
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -060027#include <linux/device.h>
28#include <linux/dmi.h>
29#include <linux/slab.h>
Hans de Goede8a880a22018-03-04 15:36:07 +010030#include <asm/cpu_device_id.h>
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -050031#include <asm/platform_sst_audio.h>
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -060032#include <sound/pcm.h>
33#include <sound/pcm_params.h>
34#include <sound/soc.h>
35#include <sound/jack.h>
Pierre-Louis Bossart7feb2f72017-10-12 18:49:38 -050036#include <sound/soc-acpi.h>
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -060037#include "../../codecs/rt5651.h"
38#include "../atom/sst-atom-controls.h"
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -050039
40enum {
41 BYT_RT5651_DMIC_MAP,
42 BYT_RT5651_IN1_MAP,
Carlo Caioneea261bd2017-11-21 17:15:45 +000043 BYT_RT5651_IN1_IN2_MAP,
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -050044};
45
Hans de Goede46058ae2018-03-04 15:35:59 +010046enum {
47 BYT_RT5651_JD_NULL = (RT5651_JD_NULL << 4),
48 BYT_RT5651_JD1_1 = (RT5651_JD1_1 << 4),
49 BYT_RT5651_JD1_2 = (RT5651_JD1_2 << 4),
50 BYT_RT5651_JD2 = (RT5651_JD2 << 4),
51};
52
Hans de Goede8ffaa6a2018-03-04 15:36:02 +010053enum {
54 BYT_RT5651_OVCD_TH_600UA = (6 << 8),
55 BYT_RT5651_OVCD_TH_1500UA = (15 << 8),
56 BYT_RT5651_OVCD_TH_2000UA = (20 << 8),
57};
58
59enum {
60 BYT_RT5651_OVCD_SF_0P5 = (RT5651_OVCD_SF_0P5 << 13),
61 BYT_RT5651_OVCD_SF_0P75 = (RT5651_OVCD_SF_0P75 << 13),
62 BYT_RT5651_OVCD_SF_1P0 = (RT5651_OVCD_SF_1P0 << 13),
63 BYT_RT5651_OVCD_SF_1P5 = (RT5651_OVCD_SF_1P5 << 13),
64};
65
Hans de Goede46058ae2018-03-04 15:35:59 +010066#define BYT_RT5651_MAP(quirk) ((quirk) & GENMASK(3, 0))
67#define BYT_RT5651_JDSRC(quirk) (((quirk) & GENMASK(7, 4)) >> 4)
Hans de Goede8ffaa6a2018-03-04 15:36:02 +010068#define BYT_RT5651_OVCD_TH(quirk) (((quirk) & GENMASK(12, 8)) >> 8)
69#define BYT_RT5651_OVCD_SF(quirk) (((quirk) & GENMASK(14, 13)) >> 13)
Hans de Goede46058ae2018-03-04 15:35:59 +010070#define BYT_RT5651_DMIC_EN BIT(16)
71#define BYT_RT5651_MCLK_EN BIT(17)
72#define BYT_RT5651_MCLK_25MHZ BIT(18)
Hans de Goede8a880a22018-03-04 15:36:07 +010073#define BYT_RT5651_SSP2_AIF2 BIT(19) /* default is using AIF1 */
74#define BYT_RT5651_SSP0_AIF1 BIT(20)
75#define BYT_RT5651_SSP0_AIF2 BIT(21)
Hans de Goede46058ae2018-03-04 15:35:59 +010076
Hans de Goedefc7c4602018-06-24 16:06:26 +020077#define BYT_RT5651_DEFAULT_QUIRKS (BYT_RT5651_MCLK_EN | \
78 BYT_RT5651_JD1_1 | \
79 BYT_RT5651_OVCD_TH_2000UA | \
80 BYT_RT5651_OVCD_SF_0P75)
81
Hans de Goede8ffaa6a2018-03-04 15:36:02 +010082/* jack-detect-source + dmic-en + ovcd-th + -sf + terminating empty entry */
83#define MAX_NO_PROPS 5
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -050084
85struct byt_rt5651_private {
86 struct clk *mclk;
Carlo Caioned9f8f9b2017-10-20 12:18:56 +010087 struct snd_soc_jack jack;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -050088};
89
Hans de Goede10876d22018-06-24 16:06:27 +020090/* Default: jack-detect on JD1_1, internal mic on in1, headsetmic on in3 */
Hans de Goedefc7c4602018-06-24 16:06:26 +020091static unsigned long byt_rt5651_quirk = BYT_RT5651_DEFAULT_QUIRKS |
Hans de Goedede231472018-06-24 16:06:30 +020092 BYT_RT5651_IN1_MAP;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -050093
94static void log_quirks(struct device *dev)
95{
96 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_DMIC_MAP)
97 dev_info(dev, "quirk DMIC_MAP enabled");
98 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_MAP)
99 dev_info(dev, "quirk IN1_MAP enabled");
Hans de Goede366780d2018-06-24 16:06:28 +0200100 if (BYT_RT5651_MAP(byt_rt5651_quirk) == BYT_RT5651_IN1_IN2_MAP)
101 dev_info(dev, "quirk IN1_IN2_MAP enabled");
Hans de Goede8ffaa6a2018-03-04 15:36:02 +0100102 if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
Hans de Goede46058ae2018-03-04 15:35:59 +0100103 dev_info(dev, "quirk realtek,jack-detect-source %ld\n",
104 BYT_RT5651_JDSRC(byt_rt5651_quirk));
Hans de Goede8ffaa6a2018-03-04 15:36:02 +0100105 dev_info(dev, "quirk realtek,over-current-threshold-microamp %ld\n",
106 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
107 dev_info(dev, "quirk realtek,over-current-scale-factor %ld\n",
108 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
109 }
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500110 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
111 dev_info(dev, "quirk DMIC enabled");
112 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
113 dev_info(dev, "quirk MCLK_EN enabled");
114 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
115 dev_info(dev, "quirk MCLK_25MHZ enabled");
Hans de Goede8a880a22018-03-04 15:36:07 +0100116 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2)
117 dev_info(dev, "quirk SSP2_AIF2 enabled\n");
118 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1)
119 dev_info(dev, "quirk SSP0_AIF1 enabled\n");
120 if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)
121 dev_info(dev, "quirk SSP0_AIF2 enabled\n");
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500122}
123
124#define BYT_CODEC_DAI1 "rt5651-aif1"
Hans de Goede8a880a22018-03-04 15:36:07 +0100125#define BYT_CODEC_DAI2 "rt5651-aif2"
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500126
Hans de Goedeaeec6cc2018-03-04 15:36:03 +0100127static int byt_rt5651_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai,
128 int rate, int bclk_ratio)
129{
130 int clk_id, clk_freq, ret;
131
132 /* Configure the PLL before selecting it */
133 if (!(byt_rt5651_quirk & BYT_RT5651_MCLK_EN)) {
134 clk_id = RT5651_PLL1_S_BCLK1,
135 clk_freq = rate * bclk_ratio;
136 } else {
137 clk_id = RT5651_PLL1_S_MCLK;
138 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
139 clk_freq = 25000000;
140 else
141 clk_freq = 19200000;
142 }
143 ret = snd_soc_dai_set_pll(codec_dai, 0, clk_id, clk_freq, rate * 512);
144 if (ret < 0) {
Kuninori Morimoto2759ba92018-03-28 01:49:36 +0000145 dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret);
Hans de Goedeaeec6cc2018-03-04 15:36:03 +0100146 return ret;
147 }
148
149 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_PLL1,
150 rate * 512, SND_SOC_CLOCK_IN);
151 if (ret < 0) {
Kuninori Morimoto2759ba92018-03-28 01:49:36 +0000152 dev_err(codec_dai->component->dev, "can't set clock %d\n", ret);
Hans de Goedeaeec6cc2018-03-04 15:36:03 +0100153 return ret;
154 }
155
156 return 0;
157}
158
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500159static int platform_clock_control(struct snd_soc_dapm_widget *w,
160 struct snd_kcontrol *k, int event)
161{
162 struct snd_soc_dapm_context *dapm = w->dapm;
163 struct snd_soc_card *card = dapm->card;
164 struct snd_soc_dai *codec_dai;
165 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
166 int ret;
167
Pierre-Louis Bossartdfb6ec72017-10-12 18:38:03 -0500168 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI1);
Hans de Goede8a880a22018-03-04 15:36:07 +0100169 if (!codec_dai)
170 codec_dai = snd_soc_card_get_codec_dai(card, BYT_CODEC_DAI2);
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500171 if (!codec_dai) {
172 dev_err(card->dev,
173 "Codec dai not found; Unable to set platform clock\n");
174 return -EIO;
175 }
176
177 if (SND_SOC_DAPM_EVENT_ON(event)) {
178 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
179 ret = clk_prepare_enable(priv->mclk);
180 if (ret < 0) {
181 dev_err(card->dev,
182 "could not configure MCLK state");
183 return ret;
184 }
185 }
Hans de Goedeaeec6cc2018-03-04 15:36:03 +0100186 ret = byt_rt5651_prepare_and_enable_pll1(codec_dai, 48000, 50);
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500187 } else {
188 /*
189 * Set codec clock source to internal clock before
190 * turning off the platform clock. Codec needs clock
191 * for Jack detection and button press
192 */
193 ret = snd_soc_dai_set_sysclk(codec_dai, RT5651_SCLK_S_RCCLK,
194 48000 * 512,
195 SND_SOC_CLOCK_IN);
196 if (!ret)
197 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
198 clk_disable_unprepare(priv->mclk);
199 }
200
201 if (ret < 0) {
202 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
203 return ret;
204 }
205
206 return 0;
207}
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600208
209static const struct snd_soc_dapm_widget byt_rt5651_widgets[] = {
210 SND_SOC_DAPM_HP("Headphone", NULL),
211 SND_SOC_DAPM_MIC("Headset Mic", NULL),
212 SND_SOC_DAPM_MIC("Internal Mic", NULL),
213 SND_SOC_DAPM_SPK("Speaker", NULL),
Pierre-Louis Bossartea39bdc2018-01-05 13:20:23 -0600214 SND_SOC_DAPM_LINE("Line In", NULL),
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500215 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
216 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
217 SND_SOC_DAPM_POST_PMD),
218
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600219};
220
221static const struct snd_soc_dapm_route byt_rt5651_audio_map[] = {
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500222 {"Headphone", NULL, "Platform Clock"},
223 {"Headset Mic", NULL, "Platform Clock"},
224 {"Internal Mic", NULL, "Platform Clock"},
225 {"Speaker", NULL, "Platform Clock"},
Pierre-Louis Bossartea39bdc2018-01-05 13:20:23 -0600226 {"Line In", NULL, "Platform Clock"},
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500227
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600228 {"Headset Mic", NULL, "micbias1"}, /* lowercase for rt5651 */
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600229 {"Headphone", NULL, "HPOL"},
230 {"Headphone", NULL, "HPOR"},
231 {"Speaker", NULL, "LOUTL"},
232 {"Speaker", NULL, "LOUTR"},
Pierre-Louis Bossartea39bdc2018-01-05 13:20:23 -0600233 {"IN2P", NULL, "Line In"},
234 {"IN2N", NULL, "Line In"},
235
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600236};
237
Pierre-Louis Bossart6356c782017-09-08 12:43:53 -0500238static const struct snd_soc_dapm_route byt_rt5651_intmic_dmic_map[] = {
239 {"DMIC L1", NULL, "Internal Mic"},
240 {"DMIC R1", NULL, "Internal Mic"},
Hans de Goede37c74012018-06-24 16:06:31 +0200241 {"IN3P", NULL, "Headset Mic"},
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600242};
243
244static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_map[] = {
245 {"Internal Mic", NULL, "micbias1"},
246 {"IN1P", NULL, "Internal Mic"},
Hans de Goedede231472018-06-24 16:06:30 +0200247 {"IN3P", NULL, "Headset Mic"},
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600248};
249
Carlo Caioneea261bd2017-11-21 17:15:45 +0000250static const struct snd_soc_dapm_route byt_rt5651_intmic_in1_in2_map[] = {
251 {"Internal Mic", NULL, "micbias1"},
252 {"IN1P", NULL, "Internal Mic"},
253 {"IN2P", NULL, "Internal Mic"},
254 {"IN3P", NULL, "Headset Mic"},
255};
256
Hans de Goede8a880a22018-03-04 15:36:07 +0100257static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif1_map[] = {
258 {"ssp0 Tx", NULL, "modem_out"},
259 {"modem_in", NULL, "ssp0 Rx"},
260
261 {"AIF1 Playback", NULL, "ssp0 Tx"},
262 {"ssp0 Rx", NULL, "AIF1 Capture"},
263};
264
265static const struct snd_soc_dapm_route byt_rt5651_ssp0_aif2_map[] = {
266 {"ssp0 Tx", NULL, "modem_out"},
267 {"modem_in", NULL, "ssp0 Rx"},
268
269 {"AIF2 Playback", NULL, "ssp0 Tx"},
270 {"ssp0 Rx", NULL, "AIF2 Capture"},
271};
272
273static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif1_map[] = {
274 {"ssp2 Tx", NULL, "codec_out0"},
275 {"ssp2 Tx", NULL, "codec_out1"},
276 {"codec_in0", NULL, "ssp2 Rx"},
277 {"codec_in1", NULL, "ssp2 Rx"},
278
279 {"AIF1 Playback", NULL, "ssp2 Tx"},
280 {"ssp2 Rx", NULL, "AIF1 Capture"},
281};
282
283static const struct snd_soc_dapm_route byt_rt5651_ssp2_aif2_map[] = {
284 {"ssp2 Tx", NULL, "codec_out0"},
285 {"ssp2 Tx", NULL, "codec_out1"},
286 {"codec_in0", NULL, "ssp2 Rx"},
287 {"codec_in1", NULL, "ssp2 Rx"},
288
289 {"AIF2 Playback", NULL, "ssp2 Tx"},
290 {"ssp2 Rx", NULL, "AIF2 Capture"},
291};
292
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600293static const struct snd_kcontrol_new byt_rt5651_controls[] = {
294 SOC_DAPM_PIN_SWITCH("Headphone"),
295 SOC_DAPM_PIN_SWITCH("Headset Mic"),
296 SOC_DAPM_PIN_SWITCH("Internal Mic"),
297 SOC_DAPM_PIN_SWITCH("Speaker"),
Pierre-Louis Bossartea39bdc2018-01-05 13:20:23 -0600298 SOC_DAPM_PIN_SWITCH("Line In"),
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600299};
300
Carlo Caioned9f8f9b2017-10-20 12:18:56 +0100301static struct snd_soc_jack_pin bytcr_jack_pins[] = {
302 {
303 .pin = "Headphone",
304 .mask = SND_JACK_HEADPHONE,
305 },
306 {
307 .pin = "Headset Mic",
308 .mask = SND_JACK_MICROPHONE,
309 },
310};
311
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600312static int byt_rt5651_aif1_hw_params(struct snd_pcm_substream *substream,
313 struct snd_pcm_hw_params *params)
314{
315 struct snd_soc_pcm_runtime *rtd = substream->private_data;
316 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Hans de Goede8a880a22018-03-04 15:36:07 +0100317 snd_pcm_format_t format = params_format(params);
Hans de Goedeaeec6cc2018-03-04 15:36:03 +0100318 int rate = params_rate(params);
Hans de Goede8a880a22018-03-04 15:36:07 +0100319 int bclk_ratio;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600320
Hans de Goede8a880a22018-03-04 15:36:07 +0100321 if (format == SNDRV_PCM_FORMAT_S16_LE)
322 bclk_ratio = 32;
323 else
324 bclk_ratio = 50;
325
326 return byt_rt5651_prepare_and_enable_pll1(codec_dai, rate, bclk_ratio);
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600327}
328
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500329static int byt_rt5651_quirk_cb(const struct dmi_system_id *id)
330{
331 byt_rt5651_quirk = (unsigned long)id->driver_data;
332 return 1;
333}
334
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600335static const struct dmi_system_id byt_rt5651_quirk_table[] = {
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500336 {
337 .callback = byt_rt5651_quirk_cb,
338 .matches = {
339 DMI_MATCH(DMI_SYS_VENDOR, "Circuitco"),
340 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Max B3 PLATFORM"),
341 },
Hans de Goedede231472018-06-24 16:06:30 +0200342 .driver_data = (void *)(BYT_RT5651_IN1_MAP),
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500343 },
Carlo Caione2fe30122017-10-20 12:18:57 +0100344 {
345 .callback = byt_rt5651_quirk_cb,
346 .matches = {
Pierre-Louis Bossart416f2b52018-01-05 13:20:20 -0600347 DMI_MATCH(DMI_SYS_VENDOR, "ADI"),
348 DMI_MATCH(DMI_PRODUCT_NAME, "Minnowboard Turbot"),
349 },
350 .driver_data = (void *)(BYT_RT5651_MCLK_EN |
Hans de Goedede231472018-06-24 16:06:30 +0200351 BYT_RT5651_IN1_MAP),
Pierre-Louis Bossart416f2b52018-01-05 13:20:20 -0600352 },
353 {
354 .callback = byt_rt5651_quirk_cb,
355 .matches = {
Carlo Caione2fe30122017-10-20 12:18:57 +0100356 DMI_MATCH(DMI_SYS_VENDOR, "KIANO"),
357 DMI_MATCH(DMI_PRODUCT_NAME, "KIANO SlimNote 14.2"),
358 },
Hans de Goedefc7c4602018-06-24 16:06:26 +0200359 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
Pierre-Louis Bossart56e49aa2018-01-05 13:20:21 -0600360 BYT_RT5651_IN1_IN2_MAP),
Carlo Caione2fe30122017-10-20 12:18:57 +0100361 },
Hans de Goedef026e062018-03-04 15:36:06 +0100362 {
363 /* Chuwi Vi8 Plus (CWI519) */
364 .callback = byt_rt5651_quirk_cb,
365 .matches = {
366 DMI_MATCH(DMI_SYS_VENDOR, "Hampoo"),
367 DMI_MATCH(DMI_PRODUCT_NAME, "D2D3_Vi8A1"),
368 },
Hans de Goedefc7c4602018-06-24 16:06:26 +0200369 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
Hans de Goedede231472018-06-24 16:06:30 +0200370 BYT_RT5651_IN1_MAP),
Hans de Goedef026e062018-03-04 15:36:06 +0100371 },
Hans de Goedef9877eb2018-03-04 15:36:08 +0100372 {
373 /* VIOS LTH17 */
374 .callback = byt_rt5651_quirk_cb,
375 .matches = {
376 DMI_MATCH(DMI_SYS_VENDOR, "VIOS"),
377 DMI_MATCH(DMI_PRODUCT_NAME, "LTH17"),
378 },
Hans de Goedefc7c4602018-06-24 16:06:26 +0200379 .driver_data = (void *)(BYT_RT5651_DEFAULT_QUIRKS |
Hans de Goedef9877eb2018-03-04 15:36:08 +0100380 BYT_RT5651_IN1_IN2_MAP),
381 },
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600382 {}
383};
384
Hans de Goede46058ae2018-03-04 15:35:59 +0100385/*
386 * Note this MUST be called before snd_soc_register_card(), so that the props
387 * are in place before the codec component driver's probe function parses them.
388 */
389static int byt_rt5651_add_codec_device_props(const char *i2c_dev_name)
390{
391 struct property_entry props[MAX_NO_PROPS] = {};
392 struct device *i2c_dev;
393 int ret, cnt = 0;
394
395 i2c_dev = bus_find_device_by_name(&i2c_bus_type, NULL, i2c_dev_name);
396 if (!i2c_dev)
397 return -EPROBE_DEFER;
398
399 props[cnt++] = PROPERTY_ENTRY_U32("realtek,jack-detect-source",
400 BYT_RT5651_JDSRC(byt_rt5651_quirk));
401
Hans de Goede8ffaa6a2018-03-04 15:36:02 +0100402 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-threshold-microamp",
403 BYT_RT5651_OVCD_TH(byt_rt5651_quirk) * 100);
404
405 props[cnt++] = PROPERTY_ENTRY_U32("realtek,over-current-scale-factor",
406 BYT_RT5651_OVCD_SF(byt_rt5651_quirk));
407
Hans de Goedec2f26932018-03-04 15:36:00 +0100408 if (byt_rt5651_quirk & BYT_RT5651_DMIC_EN)
409 props[cnt++] = PROPERTY_ENTRY_BOOL("realtek,dmic-en");
410
Hans de Goede46058ae2018-03-04 15:35:59 +0100411 ret = device_add_properties(i2c_dev, props);
412 put_device(i2c_dev);
413
414 return ret;
415}
416
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600417static int byt_rt5651_init(struct snd_soc_pcm_runtime *runtime)
418{
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600419 struct snd_soc_card *card = runtime->card;
Kuninori Morimoto17b52012018-01-29 03:44:39 +0000420 struct snd_soc_component *codec = runtime->codec_dai->component;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500421 struct byt_rt5651_private *priv = snd_soc_card_get_drvdata(card);
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600422 const struct snd_soc_dapm_route *custom_map;
423 int num_routes;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500424 int ret;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600425
426 card->dapm.idle_bias_off = true;
427
Hans de Goedec22969d2018-03-04 15:36:10 +0100428 /* Start with RC clk for jack-detect (we disable MCLK below) */
429 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN)
430 snd_soc_component_update_bits(codec, RT5651_GLB_CLK,
431 RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_RCCLK);
432
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600433 switch (BYT_RT5651_MAP(byt_rt5651_quirk)) {
434 case BYT_RT5651_IN1_MAP:
435 custom_map = byt_rt5651_intmic_in1_map;
436 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_map);
437 break;
Carlo Caioneea261bd2017-11-21 17:15:45 +0000438 case BYT_RT5651_IN1_IN2_MAP:
439 custom_map = byt_rt5651_intmic_in1_in2_map;
440 num_routes = ARRAY_SIZE(byt_rt5651_intmic_in1_in2_map);
441 break;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600442 default:
Pierre-Louis Bossart6356c782017-09-08 12:43:53 -0500443 custom_map = byt_rt5651_intmic_dmic_map;
444 num_routes = ARRAY_SIZE(byt_rt5651_intmic_dmic_map);
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600445 }
Pierre-Louis Bossart6356c782017-09-08 12:43:53 -0500446 ret = snd_soc_dapm_add_routes(&card->dapm, custom_map, num_routes);
447 if (ret)
448 return ret;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600449
Hans de Goede8a880a22018-03-04 15:36:07 +0100450 if (byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) {
451 ret = snd_soc_dapm_add_routes(&card->dapm,
452 byt_rt5651_ssp2_aif2_map,
453 ARRAY_SIZE(byt_rt5651_ssp2_aif2_map));
454 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) {
455 ret = snd_soc_dapm_add_routes(&card->dapm,
456 byt_rt5651_ssp0_aif1_map,
457 ARRAY_SIZE(byt_rt5651_ssp0_aif1_map));
458 } else if (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2) {
459 ret = snd_soc_dapm_add_routes(&card->dapm,
460 byt_rt5651_ssp0_aif2_map,
461 ARRAY_SIZE(byt_rt5651_ssp0_aif2_map));
462 } else {
463 ret = snd_soc_dapm_add_routes(&card->dapm,
464 byt_rt5651_ssp2_aif1_map,
465 ARRAY_SIZE(byt_rt5651_ssp2_aif1_map));
466 }
467 if (ret)
468 return ret;
469
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600470 ret = snd_soc_add_card_controls(card, byt_rt5651_controls,
471 ARRAY_SIZE(byt_rt5651_controls));
472 if (ret) {
473 dev_err(card->dev, "unable to add card controls\n");
474 return ret;
475 }
476 snd_soc_dapm_ignore_suspend(&card->dapm, "Headphone");
477 snd_soc_dapm_ignore_suspend(&card->dapm, "Speaker");
478
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500479 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
480 /*
481 * The firmware might enable the clock at
482 * boot (this information may or may not
483 * be reflected in the enable clock register).
484 * To change the rate we must disable the clock
485 * first to cover these cases. Due to common
486 * clock framework restrictions that do not allow
487 * to disable a clock that has not been enabled,
488 * we need to enable the clock first.
489 */
490 ret = clk_prepare_enable(priv->mclk);
491 if (!ret)
492 clk_disable_unprepare(priv->mclk);
493
494 if (byt_rt5651_quirk & BYT_RT5651_MCLK_25MHZ)
495 ret = clk_set_rate(priv->mclk, 25000000);
496 else
497 ret = clk_set_rate(priv->mclk, 19200000);
498
499 if (ret)
500 dev_err(card->dev, "unable to set MCLK rate\n");
501 }
502
Hans de Goedeaed859a2018-03-04 15:36:01 +0100503 if (BYT_RT5651_JDSRC(byt_rt5651_quirk)) {
504 ret = snd_soc_card_jack_new(runtime->card, "Headset",
Carlo Caioned9f8f9b2017-10-20 12:18:56 +0100505 SND_JACK_HEADSET, &priv->jack,
506 bytcr_jack_pins, ARRAY_SIZE(bytcr_jack_pins));
Hans de Goedeaed859a2018-03-04 15:36:01 +0100507 if (ret) {
508 dev_err(runtime->dev, "jack creation failed %d\n", ret);
509 return ret;
510 }
511
512 ret = snd_soc_component_set_jack(codec, &priv->jack, NULL);
513 if (ret)
514 return ret;
Carlo Caioned9f8f9b2017-10-20 12:18:56 +0100515 }
516
Hans de Goedeaed859a2018-03-04 15:36:01 +0100517 return 0;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600518}
519
520static const struct snd_soc_pcm_stream byt_rt5651_dai_params = {
521 .formats = SNDRV_PCM_FMTBIT_S24_LE,
522 .rate_min = 48000,
523 .rate_max = 48000,
524 .channels_min = 2,
525 .channels_max = 2,
526};
527
528static int byt_rt5651_codec_fixup(struct snd_soc_pcm_runtime *rtd,
529 struct snd_pcm_hw_params *params)
530{
531 struct snd_interval *rate = hw_param_interval(params,
532 SNDRV_PCM_HW_PARAM_RATE);
533 struct snd_interval *channels = hw_param_interval(params,
534 SNDRV_PCM_HW_PARAM_CHANNELS);
Hans de Goede8a880a22018-03-04 15:36:07 +0100535 int ret, bits;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600536
Hans de Goede8a880a22018-03-04 15:36:07 +0100537 /* The DSP will covert the FE rate to 48k, stereo */
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600538 rate->min = rate->max = 48000;
539 channels->min = channels->max = 2;
540
Hans de Goede8a880a22018-03-04 15:36:07 +0100541 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
542 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
543 /* set SSP0 to 16-bit */
544 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
545 bits = 16;
546 } else {
547 /* set SSP2 to 24-bit */
548 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
549 bits = 24;
550 }
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600551
552 /*
553 * Default mode for SSP configuration is TDM 4 slot, override config
Hans de Goede8a880a22018-03-04 15:36:07 +0100554 * with explicit setting to I2S 2ch. The word length is set with
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600555 * dai_set_tdm_slot() since there is no other API exposed
556 */
557 ret = snd_soc_dai_set_fmt(rtd->cpu_dai,
558 SND_SOC_DAIFMT_I2S |
Pierre-Louis Bossartf12f5c82017-01-26 14:09:29 -0600559 SND_SOC_DAIFMT_NB_NF |
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600560 SND_SOC_DAIFMT_CBS_CFS
561 );
562
563 if (ret < 0) {
564 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
565 return ret;
566 }
567
Hans de Goede8a880a22018-03-04 15:36:07 +0100568 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, bits);
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600569 if (ret < 0) {
570 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
571 return ret;
572 }
573
574 return 0;
575}
576
Takashi Iwai1ebb4d92017-06-08 23:37:22 +0200577static const unsigned int rates_48000[] = {
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600578 48000,
579};
580
Takashi Iwai1ebb4d92017-06-08 23:37:22 +0200581static const struct snd_pcm_hw_constraint_list constraints_48000 = {
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600582 .count = ARRAY_SIZE(rates_48000),
583 .list = rates_48000,
584};
585
586static int byt_rt5651_aif1_startup(struct snd_pcm_substream *substream)
587{
588 return snd_pcm_hw_constraint_list(substream->runtime, 0,
589 SNDRV_PCM_HW_PARAM_RATE,
590 &constraints_48000);
591}
592
Julia Lawall9b6fdef2016-10-15 16:55:49 +0200593static const struct snd_soc_ops byt_rt5651_aif1_ops = {
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600594 .startup = byt_rt5651_aif1_startup,
595};
596
Julia Lawall9b6fdef2016-10-15 16:55:49 +0200597static const struct snd_soc_ops byt_rt5651_be_ssp2_ops = {
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600598 .hw_params = byt_rt5651_aif1_hw_params,
599};
600
601static struct snd_soc_dai_link byt_rt5651_dais[] = {
602 [MERR_DPCM_AUDIO] = {
603 .name = "Audio Port",
604 .stream_name = "Audio",
605 .cpu_dai_name = "media-cpu-dai",
606 .codec_dai_name = "snd-soc-dummy-dai",
607 .codec_name = "snd-soc-dummy",
608 .platform_name = "sst-mfld-platform",
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600609 .nonatomic = true,
610 .dynamic = 1,
611 .dpcm_playback = 1,
612 .dpcm_capture = 1,
613 .ops = &byt_rt5651_aif1_ops,
614 },
615 [MERR_DPCM_DEEP_BUFFER] = {
616 .name = "Deep-Buffer Audio Port",
617 .stream_name = "Deep-Buffer Audio",
618 .cpu_dai_name = "deepbuffer-cpu-dai",
619 .codec_dai_name = "snd-soc-dummy-dai",
620 .codec_name = "snd-soc-dummy",
621 .platform_name = "sst-mfld-platform",
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600622 .nonatomic = true,
623 .dynamic = 1,
624 .dpcm_playback = 1,
625 .ops = &byt_rt5651_aif1_ops,
626 },
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600627 /* CODEC<->CODEC link */
628 /* back ends */
629 {
630 .name = "SSP2-Codec",
Pierre-Louis Bossart149f7752017-10-12 18:38:04 -0500631 .id = 0,
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600632 .cpu_dai_name = "ssp2-port",
633 .platform_name = "sst-mfld-platform",
634 .no_pcm = 1,
635 .codec_dai_name = "rt5651-aif1",
636 .codec_name = "i2c-10EC5651:00",
637 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
638 | SND_SOC_DAIFMT_CBS_CFS,
639 .be_hw_params_fixup = byt_rt5651_codec_fixup,
640 .ignore_suspend = 1,
641 .nonatomic = true,
642 .dpcm_playback = 1,
643 .dpcm_capture = 1,
644 .init = byt_rt5651_init,
645 .ops = &byt_rt5651_be_ssp2_ops,
646 },
647};
648
649/* SoC card */
650static struct snd_soc_card byt_rt5651_card = {
651 .name = "bytcr-rt5651",
652 .owner = THIS_MODULE,
653 .dai_link = byt_rt5651_dais,
654 .num_links = ARRAY_SIZE(byt_rt5651_dais),
655 .dapm_widgets = byt_rt5651_widgets,
656 .num_dapm_widgets = ARRAY_SIZE(byt_rt5651_widgets),
657 .dapm_routes = byt_rt5651_audio_map,
658 .num_dapm_routes = ARRAY_SIZE(byt_rt5651_audio_map),
659 .fully_routed = true,
660};
661
Pierre-Louis Bossart2be2d572018-01-11 13:52:09 -0600662static char byt_rt5651_codec_name[SND_ACPI_I2C_ID_LEN];
Hans de Goede8a880a22018-03-04 15:36:07 +0100663static char byt_rt5651_codec_aif_name[12]; /* = "rt5651-aif[1|2]" */
664static char byt_rt5651_cpu_dai_name[10]; /* = "ssp[0|2]-port" */
Hans de Goede64484cc2018-05-18 21:35:06 +0200665static char byt_rt5651_long_name[40]; /* = "bytcr-rt5651-*-spk-*-mic" */
Hans de Goede8a880a22018-03-04 15:36:07 +0100666
667static bool is_valleyview(void)
668{
669 static const struct x86_cpu_id cpu_ids[] = {
670 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */
671 {}
672 };
673
674 if (!x86_match_cpu(cpu_ids))
675 return false;
676 return true;
677}
678
679struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */
680 u64 aif_value; /* 1: AIF1, 2: AIF2 */
681 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */
682};
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500683
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600684static int snd_byt_rt5651_mc_probe(struct platform_device *pdev)
685{
Hans de Goedede231472018-06-24 16:06:30 +0200686 const char * const intmic_name[] = { "dmic", "in1", "in12" };
Hans de Goede37c74012018-06-24 16:06:31 +0200687 const char * const hsmic_name[] = { "in3", "in3", "in3" };
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500688 struct byt_rt5651_private *priv;
Pierre-Louis Bossart7feb2f72017-10-12 18:49:38 -0500689 struct snd_soc_acpi_mach *mach;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500690 const char *i2c_name = NULL;
Hans de Goede8a880a22018-03-04 15:36:07 +0100691 bool is_bytcr = false;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600692 int ret_val = 0;
Pierre-Louis Bossart2193eb92017-10-12 18:38:05 -0500693 int dai_index = 0;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500694 int i;
695
Vinod Koulaa5398e2018-04-20 16:14:28 +0530696 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500697 if (!priv)
698 return -ENOMEM;
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600699
700 /* register the soc card */
701 byt_rt5651_card.dev = &pdev->dev;
702
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500703 mach = byt_rt5651_card.dev->platform_data;
704 snd_soc_card_set_drvdata(&byt_rt5651_card, priv);
705
706 /* fix index of codec dai */
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500707 for (i = 0; i < ARRAY_SIZE(byt_rt5651_dais); i++) {
708 if (!strcmp(byt_rt5651_dais[i].codec_name, "i2c-10EC5651:00")) {
709 dai_index = i;
710 break;
711 }
712 }
713
714 /* fixup codec name based on HID */
Andy Shevchenko3a147952018-01-12 23:16:17 +0200715 i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1);
Hans de Goedee39cacc2018-03-04 15:35:58 +0100716 if (!i2c_name) {
717 dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
718 return -ENODEV;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500719 }
Hans de Goedee39cacc2018-03-04 15:35:58 +0100720 snprintf(byt_rt5651_codec_name, sizeof(byt_rt5651_codec_name),
721 "%s%s", "i2c-", i2c_name);
722 byt_rt5651_dais[dai_index].codec_name = byt_rt5651_codec_name;
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500723
Hans de Goede8a880a22018-03-04 15:36:07 +0100724 /*
725 * swap SSP0 if bytcr is detected
726 * (will be overridden if DMI quirk is detected)
727 */
728 if (is_valleyview()) {
729 struct sst_platform_info *p_info = mach->pdata;
730 const struct sst_res_info *res_info = p_info->res_info;
731
732 if (res_info->acpi_ipc_irq_index == 0)
733 is_bytcr = true;
734 }
735
736 if (is_bytcr) {
737 /*
738 * Baytrail CR platforms may have CHAN package in BIOS, try
739 * to find relevant routing quirk based as done on Windows
740 * platforms. We have to read the information directly from the
741 * BIOS, at this stage the card is not created and the links
742 * with the codec driver/pdata are non-existent
743 */
744
745 struct acpi_chan_package chan_package;
746
747 /* format specified: 2 64-bit integers */
748 struct acpi_buffer format = {sizeof("NN"), "NN"};
749 struct acpi_buffer state = {0, NULL};
750 struct snd_soc_acpi_package_context pkg_ctx;
751 bool pkg_found = false;
752
753 state.length = sizeof(chan_package);
754 state.pointer = &chan_package;
755
756 pkg_ctx.name = "CHAN";
757 pkg_ctx.length = 2;
758 pkg_ctx.format = &format;
759 pkg_ctx.state = &state;
760 pkg_ctx.data_valid = false;
761
762 pkg_found = snd_soc_acpi_find_package_from_hid(mach->id,
763 &pkg_ctx);
764 if (pkg_found) {
765 if (chan_package.aif_value == 1) {
766 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n");
767 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF1;
768 } else if (chan_package.aif_value == 2) {
769 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n");
770 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
771 } else {
772 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n");
773 pkg_found = false;
774 }
775 }
776
777 if (!pkg_found) {
778 /* no BIOS indications, assume SSP0-AIF2 connection */
779 byt_rt5651_quirk |= BYT_RT5651_SSP0_AIF2;
780 }
Hans de Goede8a880a22018-03-04 15:36:07 +0100781 }
782
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500783 /* check quirks before creating card */
784 dmi_check_system(byt_rt5651_quirk_table);
Hans de Goede46058ae2018-03-04 15:35:59 +0100785
786 /* Must be called before register_card, also see declaration comment. */
787 ret_val = byt_rt5651_add_codec_device_props(byt_rt5651_codec_name);
788 if (ret_val)
789 return ret_val;
790
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500791 log_quirks(&pdev->dev);
792
Hans de Goede8a880a22018-03-04 15:36:07 +0100793 if ((byt_rt5651_quirk & BYT_RT5651_SSP2_AIF2) ||
794 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
795 /* fixup codec aif name */
796 snprintf(byt_rt5651_codec_aif_name,
797 sizeof(byt_rt5651_codec_aif_name),
798 "%s", "rt5651-aif2");
799
800 byt_rt5651_dais[dai_index].codec_dai_name =
801 byt_rt5651_codec_aif_name;
802 }
803
804 if ((byt_rt5651_quirk & BYT_RT5651_SSP0_AIF1) ||
805 (byt_rt5651_quirk & BYT_RT5651_SSP0_AIF2)) {
806 /* fixup cpu dai name name */
807 snprintf(byt_rt5651_cpu_dai_name,
808 sizeof(byt_rt5651_cpu_dai_name),
809 "%s", "ssp0-port");
810
811 byt_rt5651_dais[dai_index].cpu_dai_name =
812 byt_rt5651_cpu_dai_name;
813 }
814
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500815 if (byt_rt5651_quirk & BYT_RT5651_MCLK_EN) {
816 priv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
817 if (IS_ERR(priv->mclk)) {
Colin Ian Kingde5afce2018-05-02 15:29:45 +0100818 ret_val = PTR_ERR(priv->mclk);
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500819 dev_err(&pdev->dev,
Colin Ian Kingde5afce2018-05-02 15:29:45 +0100820 "Failed to get MCLK from pmc_plt_clk_3: %d\n",
821 ret_val);
Pierre-Louis Bossart02c0a3b2017-10-12 18:37:57 -0500822 /*
823 * Fall back to bit clock usage for -ENOENT (clock not
824 * available likely due to missing dependencies), bail
825 * for all other errors, including -EPROBE_DEFER
826 */
827 if (ret_val != -ENOENT)
828 return ret_val;
829 byt_rt5651_quirk &= ~BYT_RT5651_MCLK_EN;
830 }
831 }
832
Hans de Goede64484cc2018-05-18 21:35:06 +0200833 snprintf(byt_rt5651_long_name, sizeof(byt_rt5651_long_name),
834 "bytcr-rt5651-%s-intmic-%s-hsmic",
835 intmic_name[BYT_RT5651_MAP(byt_rt5651_quirk)],
836 hsmic_name[BYT_RT5651_MAP(byt_rt5651_quirk)]);
837 byt_rt5651_card.long_name = byt_rt5651_long_name;
838
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600839 ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5651_card);
840
841 if (ret_val) {
842 dev_err(&pdev->dev, "devm_snd_soc_register_card failed %d\n",
843 ret_val);
844 return ret_val;
845 }
846 platform_set_drvdata(pdev, &byt_rt5651_card);
847 return ret_val;
848}
849
850static struct platform_driver snd_byt_rt5651_mc_driver = {
851 .driver = {
852 .name = "bytcr_rt5651",
Pierre-Louis Bossart2bd5bd12016-01-04 17:20:24 -0600853 },
854 .probe = snd_byt_rt5651_mc_probe,
855};
856
857module_platform_driver(snd_byt_rt5651_mc_driver);
858
859MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver for RT5651");
860MODULE_AUTHOR("Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>");
861MODULE_LICENSE("GPL v2");
862MODULE_ALIAS("platform:bytcr_rt5651");