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Catalin Marinas4f04d8f2012-03-05 11:49:27 +00001/*
2 * Copyright (C) 2012 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#ifndef __ASM_PGTABLE_H
17#define __ASM_PGTABLE_H
18
19#include <asm/proc-fns.h>
20
21#include <asm/memory.h>
22#include <asm/pgtable-hwdef.h>
23
24/*
25 * Software defined PTE bits definition.
26 */
Will Deacona6fadf72012-12-18 14:15:15 +000027#define PTE_VALID (_AT(pteval_t, 1) << 0)
28#define PTE_PROT_NONE (_AT(pteval_t, 1) << 1) /* only when !PTE_VALID */
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000029#define PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !pte_present() */
30#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
31#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
32
33/*
34 * VMALLOC and SPARSEMEM_VMEMMAP ranges.
35 */
36#define VMALLOC_START UL(0xffffff8000000000)
37#define VMALLOC_END (PAGE_OFFSET - UL(0x400000000) - SZ_64K)
38
39#define vmemmap ((struct page *)(VMALLOC_END + SZ_64K))
40
41#define FIRST_USER_ADDRESS 0
42
43#ifndef __ASSEMBLY__
44extern void __pte_error(const char *file, int line, unsigned long val);
45extern void __pmd_error(const char *file, int line, unsigned long val);
46extern void __pgd_error(const char *file, int line, unsigned long val);
47
48#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
49#ifndef CONFIG_ARM64_64K_PAGES
50#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
51#endif
52#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
53
54/*
55 * The pgprot_* and protection_map entries will be fixed up at runtime to
56 * include the cachable and bufferable bits based on memory policy, as well as
57 * any architecture dependent bits like global/ASID and SMP shared mapping
58 * bits.
59 */
60#define _PAGE_DEFAULT PTE_TYPE_PAGE | PTE_AF
61
62extern pgprot_t pgprot_default;
63
Will Deacona6fadf72012-12-18 14:15:15 +000064#define __pgprot_modify(prot,mask,bits) \
65 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000066
Will Deacona6fadf72012-12-18 14:15:15 +000067#define _MOD_PROT(p, b) __pgprot_modify(p, 0, b)
68
69#define PAGE_NONE __pgprot_modify(pgprot_default, PTE_TYPE_MASK, PTE_PROT_NONE)
Catalin Marinas8e620b02012-11-15 17:21:16 +000070#define PAGE_SHARED _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
71#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN)
72#define PAGE_COPY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
73#define PAGE_COPY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
74#define PAGE_READONLY _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
75#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
76#define PAGE_KERNEL _MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE_DIRTY)
77#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY)
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000078
Marc Zyngier36311602012-12-07 18:35:41 +000079#define PAGE_HYP _MOD_PROT(pgprot_default, PTE_HYP)
80#define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
81
82#define PAGE_S2 __pgprot_modify(pgprot_default, PTE_S2_MEMATTR_MASK, PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
83#define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDWR | PTE_UXN)
84
Will Deacona6fadf72012-12-18 14:15:15 +000085#define __PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) | PTE_PROT_NONE)
Catalin Marinas8e620b02012-11-15 17:21:16 +000086#define __PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
87#define __PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
88#define __PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
89#define __PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
90#define __PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
91#define __PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000092
93#endif /* __ASSEMBLY__ */
94
95#define __P000 __PAGE_NONE
96#define __P001 __PAGE_READONLY
97#define __P010 __PAGE_COPY
98#define __P011 __PAGE_COPY
99#define __P100 __PAGE_READONLY_EXEC
100#define __P101 __PAGE_READONLY_EXEC
101#define __P110 __PAGE_COPY_EXEC
102#define __P111 __PAGE_COPY_EXEC
103
104#define __S000 __PAGE_NONE
105#define __S001 __PAGE_READONLY
106#define __S010 __PAGE_SHARED
107#define __S011 __PAGE_SHARED
108#define __S100 __PAGE_READONLY_EXEC
109#define __S101 __PAGE_READONLY_EXEC
110#define __S110 __PAGE_SHARED_EXEC
111#define __S111 __PAGE_SHARED_EXEC
112
113#ifndef __ASSEMBLY__
114/*
115 * ZERO_PAGE is a global shared page that is always zero: used
116 * for zero-mapped memory areas etc..
117 */
118extern struct page *empty_zero_page;
119#define ZERO_PAGE(vaddr) (empty_zero_page)
120
121#define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
122
123#define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
124
125#define pte_none(pte) (!pte_val(pte))
126#define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
127#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
128#define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
129
130#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
131#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
132#define pte_unmap(pte) do { } while (0)
133#define pte_unmap_nested(pte) do { } while (0)
134
135/*
136 * The following only work if pte_present(). Undefined behaviour otherwise.
137 */
Will Deacona6fadf72012-12-18 14:15:15 +0000138#define pte_present(pte) (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE))
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000139#define pte_dirty(pte) (pte_val(pte) & PTE_DIRTY)
140#define pte_young(pte) (pte_val(pte) & PTE_AF)
141#define pte_special(pte) (pte_val(pte) & PTE_SPECIAL)
142#define pte_write(pte) (!(pte_val(pte) & PTE_RDONLY))
Catalin Marinas8e620b02012-11-15 17:21:16 +0000143#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000144
Will Deacona6fadf72012-12-18 14:15:15 +0000145#define pte_valid_user(pte) \
Will Deacon02522462013-01-09 11:08:10 +0000146 ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000147
148#define PTE_BIT_FUNC(fn,op) \
149static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
150
151PTE_BIT_FUNC(wrprotect, |= PTE_RDONLY);
152PTE_BIT_FUNC(mkwrite, &= ~PTE_RDONLY);
153PTE_BIT_FUNC(mkclean, &= ~PTE_DIRTY);
154PTE_BIT_FUNC(mkdirty, |= PTE_DIRTY);
155PTE_BIT_FUNC(mkold, &= ~PTE_AF);
156PTE_BIT_FUNC(mkyoung, |= PTE_AF);
157PTE_BIT_FUNC(mkspecial, |= PTE_SPECIAL);
158
159static inline void set_pte(pte_t *ptep, pte_t pte)
160{
161 *ptep = pte;
162}
163
164extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
165
166static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
167 pte_t *ptep, pte_t pte)
168{
Will Deacona6fadf72012-12-18 14:15:15 +0000169 if (pte_valid_user(pte)) {
Will Deacon02522462013-01-09 11:08:10 +0000170 if (pte_exec(pte))
171 __sync_icache_dcache(pte, addr);
172 if (!pte_dirty(pte))
173 pte = pte_wrprotect(pte);
174 }
175
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000176 set_pte(ptep, pte);
177}
178
179/*
180 * Huge pte definitions.
181 */
182#define pte_huge(pte) ((pte_val(pte) & PTE_TYPE_MASK) == PTE_TYPE_HUGEPAGE)
183#define pte_mkhuge(pte) (__pte((pte_val(pte) & ~PTE_TYPE_MASK) | PTE_TYPE_HUGEPAGE))
184
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000185#define __HAVE_ARCH_PTE_SPECIAL
186
187/*
188 * Mark the prot value as uncacheable and unbufferable.
189 */
190#define pgprot_noncached(prot) \
191 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE))
192#define pgprot_writecombine(prot) \
193 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_GRE))
194#define pgprot_dmacoherent(prot) \
195 __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC))
196#define __HAVE_PHYS_MEM_ACCESS_PROT
197struct file;
198extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
199 unsigned long size, pgprot_t vma_prot);
200
201#define pmd_none(pmd) (!pmd_val(pmd))
202#define pmd_present(pmd) (pmd_val(pmd))
203
204#define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
205
Marc Zyngier36311602012-12-07 18:35:41 +0000206#define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
207 PMD_TYPE_TABLE)
208#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
209 PMD_TYPE_SECT)
210
211
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000212static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
213{
214 *pmdp = pmd;
215 dsb();
216}
217
218static inline void pmd_clear(pmd_t *pmdp)
219{
220 set_pmd(pmdp, __pmd(0));
221}
222
223static inline pte_t *pmd_page_vaddr(pmd_t pmd)
224{
225 return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
226}
227
228#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
229
230/*
231 * Conversion functions: convert a page and protection to a page entry,
232 * and a page entry and page directory to the page they refer to.
233 */
234#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
235
236#ifndef CONFIG_ARM64_64K_PAGES
237
238#define pud_none(pud) (!pud_val(pud))
239#define pud_bad(pud) (!(pud_val(pud) & 2))
240#define pud_present(pud) (pud_val(pud))
241
242static inline void set_pud(pud_t *pudp, pud_t pud)
243{
244 *pudp = pud;
245 dsb();
246}
247
248static inline void pud_clear(pud_t *pudp)
249{
250 set_pud(pudp, __pud(0));
251}
252
253static inline pmd_t *pud_page_vaddr(pud_t pud)
254{
255 return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
256}
257
258#endif /* CONFIG_ARM64_64K_PAGES */
259
260/* to find an entry in a page-table-directory */
261#define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
262
263#define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr))
264
265/* to find an entry in a kernel page-table-directory */
266#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
267
268/* Find an entry in the second-level page table.. */
269#ifndef CONFIG_ARM64_64K_PAGES
270#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
271static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
272{
273 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
274}
275#endif
276
277/* Find an entry in the third-level page table.. */
278#define __pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
279
280static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
281{
Will Deacona6fadf72012-12-18 14:15:15 +0000282 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
283 PTE_PROT_NONE | PTE_VALID;
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000284 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
285 return pte;
286}
287
288extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
289extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
290
291#define SWAPPER_DIR_SIZE (3 * PAGE_SIZE)
292#define IDMAP_DIR_SIZE (2 * PAGE_SIZE)
293
294/*
295 * Encode and decode a swap entry:
296 * bits 0-1: present (must be zero)
297 * bit 2: PTE_FILE
298 * bits 3-8: swap type
299 * bits 9-63: swap offset
300 */
301#define __SWP_TYPE_SHIFT 3
302#define __SWP_TYPE_BITS 6
303#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
304#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
305
306#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
307#define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
308#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
309
310#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
311#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
312
313/*
314 * Ensure that there are not more swap files than can be encoded in the kernel
315 * the PTEs.
316 */
317#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
318
319/*
320 * Encode and decode a file entry:
321 * bits 0-1: present (must be zero)
322 * bit 2: PTE_FILE
323 * bits 3-63: file offset / PAGE_SIZE
324 */
325#define pte_file(pte) (pte_val(pte) & PTE_FILE)
326#define pte_to_pgoff(x) (pte_val(x) >> 3)
327#define pgoff_to_pte(x) __pte(((x) << 3) | PTE_FILE)
328
329#define PTE_FILE_MAX_BITS 61
330
331extern int kern_addr_valid(unsigned long addr);
332
333#include <asm-generic/pgtable.h>
334
335/*
336 * remap a physical page `pfn' of size `size' with page protection `prot'
337 * into virtual address `from'
338 */
339#define io_remap_pfn_range(vma,from,pfn,size,prot) \
340 remap_pfn_range(vma, from, pfn, size, prot)
341
342#define pgtable_cache_init() do { } while (0)
343
344#endif /* !__ASSEMBLY__ */
345
346#endif /* __ASM_PGTABLE_H */