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Changbin Du3b9bae02019-05-14 22:47:27 +08001.. SPDX-License-Identifier: GPL-2.0
2.. include:: <isonum.txt>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003
Changbin Du3b9bae02019-05-14 22:47:27 +08004==========================
5The MSI Driver Guide HOWTO
6==========================
7
8:Authors: Tom L Nguyen; Martine Silbermann; Matthew Wilcox
9
10:Copyright: 2003, 2008 Intel Corporation
11
12About this guide
13================
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040015This guide describes the basics of Message Signaled Interrupts (MSIs),
16the advantages of using MSI over traditional interrupt mechanisms, how
17to change your driver to use MSI or MSI-X and some basic diagnostics to
18try if a device doesn't support MSIs.
Randy Dunlap2500e7a2005-11-07 01:01:03 -080019
Randy Dunlap2500e7a2005-11-07 01:01:03 -080020
Changbin Du3b9bae02019-05-14 22:47:27 +080021What are MSIs?
22==============
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040024A Message Signaled Interrupt is a write from the device to a special
25address which causes an interrupt to be received by the CPU.
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040027The MSI capability was first specified in PCI 2.2 and was later enhanced
28in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
29capability was also introduced with PCI 3.0. It supports more interrupts
30per device than MSI and allows interrupts to be independently configured.
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040032Devices may support both MSI and MSI-X, but only one can be enabled at
33a time.
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
Linus Torvalds1da177e2005-04-16 15:20:36 -070035
Changbin Du3b9bae02019-05-14 22:47:27 +080036Why use MSIs?
37=============
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040039There are three reasons why using MSIs can give an advantage over
40traditional pin-based interrupts.
Linus Torvalds1da177e2005-04-16 15:20:36 -070041
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040042Pin-based PCI interrupts are often shared amongst several devices.
43To support this, the kernel must call each interrupt handler associated
44with an interrupt, which leads to reduced performance for the system as
45a whole. MSIs are never shared, so this problem cannot arise.
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040047When a device writes data to memory, then raises a pin-based interrupt,
48it is possible that the interrupt may arrive before all the data has
49arrived in memory (this becomes more likely with devices behind PCI-PCI
50bridges). In order to ensure that all the data has arrived in memory,
51the interrupt handler must read a register on the device which raised
52the interrupt. PCI transaction ordering rules require that all the data
Michael Witten891f6922011-07-14 17:53:54 +000053arrive in memory before the value may be returned from the register.
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040054Using MSIs avoids this problem as the interrupt-generating write cannot
55pass the data writes, so by the time the interrupt is raised, the driver
56knows that all the data has arrived in memory.
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040058PCI devices can only support a single pin-based interrupt per function.
59Often drivers have to query the device to find out what event has
60occurred, slowing down interrupt handling for the common case. With
61MSIs, a device can support more interrupts, allowing each interrupt
62to be specialised to a different purpose. One possible design gives
63infrequent conditions (such as errors) their own interrupt which allows
64the driver to handle the normal interrupt handling path more efficiently.
65Other possible designs include giving one interrupt to each packet queue
66in a network card or each port in a storage controller.
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
Linus Torvalds1da177e2005-04-16 15:20:36 -070068
Changbin Du3b9bae02019-05-14 22:47:27 +080069How to use MSIs
70===============
Linus Torvalds1da177e2005-04-16 15:20:36 -070071
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040072PCI devices are initialised to use pin-based interrupts. The device
73driver has to set up the device to use MSI or MSI-X. Not all machines
74support MSIs correctly, and for those machines, the APIs described below
75will simply fail and the device will continue to use pin-based interrupts.
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
Changbin Du3b9bae02019-05-14 22:47:27 +080077Include kernel support for MSIs
78-------------------------------
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040080To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
81option enabled. This option is only available on some architectures,
82and it may depend on some other options also being set. For example,
83on x86, you must also enable X86_UP_APIC or SMP in order to see the
84CONFIG_PCI_MSI option.
Linus Torvalds1da177e2005-04-16 15:20:36 -070085
Changbin Du3b9bae02019-05-14 22:47:27 +080086Using MSI
87---------
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Christoph Hellwigaff17162016-07-12 18:20:17 +090089Most of the hard work is done for the driver in the PCI layer. The driver
90simply has to request that the PCI layer set up the MSI capability for this
Matthew Wilcoxc41ade22009-03-17 08:54:05 -040091device.
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
Christoph Hellwigaff17162016-07-12 18:20:17 +090093To automatically use MSI or MSI-X interrupt vectors, use the following
Changbin Du3b9bae02019-05-14 22:47:27 +080094function::
Alexander Gordeev7918b2d2014-02-13 10:47:51 -070095
Christoph Hellwigaff17162016-07-12 18:20:17 +090096 int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
97 unsigned int max_vecs, unsigned int flags);
Alexander Gordeev7918b2d2014-02-13 10:47:51 -070098
Christoph Hellwigaff17162016-07-12 18:20:17 +090099which allocates up to max_vecs interrupt vectors for a PCI device. It
100returns the number of vectors allocated or a negative error. If the device
101has a requirements for a minimum number of vectors the driver can pass a
102min_vecs argument set to this limit, and the PCI core will return -ENOSPC
103if it can't meet the minimum number of vectors.
Alexander Gordeev7918b2d2014-02-13 10:47:51 -0700104
Christoph Hellwig4fe0d152016-08-11 07:11:04 -0700105The flags argument is used to specify which type of interrupt can be used
106by the device and the driver (PCI_IRQ_LEGACY, PCI_IRQ_MSI, PCI_IRQ_MSIX).
107A convenient short-hand (PCI_IRQ_ALL_TYPES) is also available to ask for
108any possible kind of interrupt. If the PCI_IRQ_AFFINITY flag is set,
109pci_alloc_irq_vectors() will spread the interrupts around the available CPUs.
Christoph Hellwig4ef33682016-07-12 18:20:18 +0900110
Christoph Hellwigaff17162016-07-12 18:20:17 +0900111To get the Linux IRQ numbers passed to request_irq() and free_irq() and the
Changbin Du3b9bae02019-05-14 22:47:27 +0800112vectors, use the following function::
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
Christoph Hellwigaff17162016-07-12 18:20:17 +0900114 int pci_irq_vector(struct pci_dev *dev, unsigned int nr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115
Christoph Hellwigaff17162016-07-12 18:20:17 +0900116Any allocated resources should be freed before removing the device using
Changbin Du3b9bae02019-05-14 22:47:27 +0800117the following function::
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400118
Christoph Hellwigaff17162016-07-12 18:20:17 +0900119 void pci_free_irq_vectors(struct pci_dev *dev);
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400120
Christoph Hellwigaff17162016-07-12 18:20:17 +0900121If a device supports both MSI-X and MSI capabilities, this API will use the
122MSI-X facilities in preference to the MSI facilities. MSI-X supports any
123number of interrupts between 1 and 2048. In contrast, MSI is restricted to
124a maximum of 32 interrupts (and must be a power of two). In addition, the
125MSI interrupt vectors must be allocated consecutively, so the system might
126not be able to allocate as many vectors for MSI as it could for MSI-X. On
127some platforms, MSI interrupts must all be targeted at the same set of CPUs
128whereas MSI-X interrupts can all be targeted at different CPUs.
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400129
Christoph Hellwigaff17162016-07-12 18:20:17 +0900130If a device supports neither MSI-X or MSI it will fall back to a single
131legacy IRQ vector.
Alexander Gordeev302a2522013-12-30 08:28:16 +0100132
Christoph Hellwigaff17162016-07-12 18:20:17 +0900133The typical usage of MSI or MSI-X interrupts is to allocate as many vectors
134as possible, likely up to the limit supported by the device. If nvec is
135larger than the number supported by the device it will automatically be
136capped to the supported limit, so there is no need to query the number of
Changbin Du3b9bae02019-05-14 22:47:27 +0800137vectors supported beforehand::
Alexander Gordeev302a2522013-12-30 08:28:16 +0100138
Christoph Hellwig4fe0d152016-08-11 07:11:04 -0700139 nvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_ALL_TYPES)
Christoph Hellwigaff17162016-07-12 18:20:17 +0900140 if (nvec < 0)
141 goto out_err;
Alexander Gordeev302a2522013-12-30 08:28:16 +0100142
143If a driver is unable or unwilling to deal with a variable number of MSI
Christoph Hellwigaff17162016-07-12 18:20:17 +0900144interrupts it can request a particular number of interrupts by passing that
145number to pci_alloc_irq_vectors() function as both 'min_vecs' and
Changbin Du3b9bae02019-05-14 22:47:27 +0800146'max_vecs' parameters::
Alexander Gordeev302a2522013-12-30 08:28:16 +0100147
Christoph Hellwig4fe0d152016-08-11 07:11:04 -0700148 ret = pci_alloc_irq_vectors(pdev, nvec, nvec, PCI_IRQ_ALL_TYPES);
Christoph Hellwigaff17162016-07-12 18:20:17 +0900149 if (ret < 0)
150 goto out_err;
Alexander Gordeev302a2522013-12-30 08:28:16 +0100151
Christoph Hellwigaff17162016-07-12 18:20:17 +0900152The most notorious example of the request type described above is enabling
153the single MSI mode for a device. It could be done by passing two 1s as
Changbin Du3b9bae02019-05-14 22:47:27 +0800154'min_vecs' and 'max_vecs'::
Alexander Gordeev3ce4e862014-02-13 10:48:02 -0700155
Christoph Hellwig4fe0d152016-08-11 07:11:04 -0700156 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
Christoph Hellwigaff17162016-07-12 18:20:17 +0900157 if (ret < 0)
158 goto out_err;
Alexander Gordeev302a2522013-12-30 08:28:16 +0100159
Christoph Hellwigaff17162016-07-12 18:20:17 +0900160Some devices might not support using legacy line interrupts, in which case
Changbin Du3b9bae02019-05-14 22:47:27 +0800161the driver can specify that only MSI or MSI-X is acceptable::
Alexander Gordeev302a2522013-12-30 08:28:16 +0100162
Christoph Hellwig4fe0d152016-08-11 07:11:04 -0700163 nvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_MSI | PCI_IRQ_MSIX);
Christoph Hellwigaff17162016-07-12 18:20:17 +0900164 if (nvec < 0)
165 goto out_err;
Alexander Gordeev302a2522013-12-30 08:28:16 +0100166
Changbin Du3b9bae02019-05-14 22:47:27 +0800167Legacy APIs
168-----------
Alexander Gordeev7918b2d2014-02-13 10:47:51 -0700169
Christoph Hellwigaff17162016-07-12 18:20:17 +0900170The following old APIs to enable and disable MSI or MSI-X interrupts should
Changbin Du3b9bae02019-05-14 22:47:27 +0800171not be used in new code::
Alexander Gordeev3ce4e862014-02-13 10:48:02 -0700172
Christoph Hellwigaff17162016-07-12 18:20:17 +0900173 pci_enable_msi() /* deprecated */
Christoph Hellwigaff17162016-07-12 18:20:17 +0900174 pci_disable_msi() /* deprecated */
175 pci_enable_msix_range() /* deprecated */
176 pci_enable_msix_exact() /* deprecated */
177 pci_disable_msix() /* deprecated */
Alexander Gordeev3ce4e862014-02-13 10:48:02 -0700178
Christoph Hellwigaff17162016-07-12 18:20:17 +0900179Additionally there are APIs to provide the number of supported MSI or MSI-X
180vectors: pci_msi_vec_count() and pci_msix_vec_count(). In general these
181should be avoided in favor of letting pci_alloc_irq_vectors() cap the
182number of vectors. If you have a legitimate special use case for the count
183of vectors we might have to revisit that decision and add a
184pci_nr_irq_vectors() helper that handles MSI and MSI-X transparently.
Alexander Gordeev3ce4e862014-02-13 10:48:02 -0700185
Changbin Du3b9bae02019-05-14 22:47:27 +0800186Considerations when using MSIs
187------------------------------
Alexander Gordeev3ce4e862014-02-13 10:48:02 -0700188
Changbin Du3b9bae02019-05-14 22:47:27 +0800189Spinlocks
190~~~~~~~~~
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400192Most device drivers have a per-device spinlock which is taken in the
193interrupt handler. With pin-based interrupts or a single MSI, it is not
194necessary to disable interrupts (Linux guarantees the same interrupt will
195not be re-entered). If a device uses multiple interrupts, the driver
196must disable interrupts while the lock is held. If the device sends
197a different interrupt, the driver will deadlock trying to recursively
Valentin Rothberg2f9d7382015-02-27 12:55:16 +0100198acquire the spinlock. Such deadlocks can be avoided by using
199spin_lock_irqsave() or spin_lock_irq() which disable local interrupts
Mauro Carvalho Chehabff41c4192017-05-14 11:50:11 -0300200and acquire the lock (see Documentation/kernel-hacking/locking.rst).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201
Changbin Du3b9bae02019-05-14 22:47:27 +0800202How to tell whether MSI/MSI-X is enabled on a device
203----------------------------------------------------
Randy Dunlap2500e7a2005-11-07 01:01:03 -0800204
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400205Using 'lspci -v' (as root) may show some devices with "MSI", "Message
206Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities
Michael Witten4979de62011-07-14 19:52:56 +0000207has an 'Enable' flag which is followed with either "+" (enabled)
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400208or "-" (disabled).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210
Changbin Du3b9bae02019-05-14 22:47:27 +0800211MSI quirks
212==========
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400214Several PCI chipsets or devices are known not to support MSIs.
215The PCI stack provides three ways to disable MSIs:
Randy Dunlap2500e7a2005-11-07 01:01:03 -0800216
Matthew Wilcoxc41ade22009-03-17 08:54:05 -04002171. globally
2182. on all devices behind a specific bridge
2193. on a single device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220
Changbin Du3b9bae02019-05-14 22:47:27 +0800221Disabling MSIs globally
222-----------------------
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400224Some host chipsets simply don't support MSIs properly. If we're
225lucky, the manufacturer knows this and has indicated it in the ACPI
Michael Witten4979de62011-07-14 19:52:56 +0000226FADT table. In this case, Linux automatically disables MSIs.
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400227Some boards don't include this information in the table and so we have
228to detect them ourselves. The complete list of these is found near the
229quirk_disable_all_msi() function in drivers/pci/quirks.c.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400231If you have a board which has problems with MSIs, you can pass pci=nomsi
232on the kernel command line to disable MSIs on all devices. It would be
233in your best interests to report the problem to linux-pci@vger.kernel.org
234including a full 'lspci -v' so we can add the quirks to the kernel.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235
Changbin Du3b9bae02019-05-14 22:47:27 +0800236Disabling MSIs below a bridge
237-----------------------------
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400239Some PCI bridges are not able to route MSIs between busses properly.
240In this case, MSIs must be disabled on all devices behind the bridge.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200241
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400242Some bridges allow you to enable MSIs by changing some bits in their
243PCI configuration space (especially the Hypertransport chipsets such
244as the nVidia nForce and Serverworks HT2000). As with host chipsets,
245Linux mostly knows about them and automatically enables MSIs if it can.
Michael Wittene6b85a12011-07-15 03:25:44 +0000246If you have a bridge unknown to Linux, you can enable
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400247MSIs in configuration space using whatever method you know works, then
Changbin Du3b9bae02019-05-14 22:47:27 +0800248enable MSIs on that bridge by doing::
Brice Goglin0cc2b372006-10-05 10:24:42 +0200249
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400250 echo 1 > /sys/bus/pci/devices/$bridge/msi_bus
Brice Goglin0cc2b372006-10-05 10:24:42 +0200251
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400252where $bridge is the PCI address of the bridge you've enabled (eg
2530000:00:0e.0).
Brice Goglin0cc2b372006-10-05 10:24:42 +0200254
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400255To disable MSIs, echo 0 instead of 1. Changing this value should be
Michael Witten1b8386f2011-07-15 03:26:37 +0000256done with caution as it could break interrupt handling for all devices
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400257below this bridge.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200258
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400259Again, please notify linux-pci@vger.kernel.org of any bridges that need
260special handling.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200261
Changbin Du3b9bae02019-05-14 22:47:27 +0800262Disabling MSIs on a single device
263---------------------------------
Brice Goglin0cc2b372006-10-05 10:24:42 +0200264
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400265Some devices are known to have faulty MSI implementations. Usually this
Michael Wittenc2b65e12011-07-15 03:27:22 +0000266is handled in the individual device driver, but occasionally it's necessary
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400267to handle this with a quirk. Some drivers have an option to disable use
268of MSI. While this is a convenient workaround for the driver author,
Jeremiah Mahler305af082014-05-22 00:04:26 -0700269it is not good practice, and should not be emulated.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200270
Changbin Du3b9bae02019-05-14 22:47:27 +0800271Finding why MSIs are disabled on a device
272-----------------------------------------
Brice Goglin0cc2b372006-10-05 10:24:42 +0200273
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400274From the above three sections, you can see that there are many reasons
275why MSIs may not be enabled for a given device. Your first step should
276be to examine your dmesg carefully to determine whether MSIs are enabled
277for your machine. You should also check your .config to be sure you
278have enabled CONFIG_PCI_MSI.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200279
Changbin Du3b9bae02019-05-14 22:47:27 +0800280Then, 'lspci -t' gives the list of bridges above a device. Reading
281`/sys/bus/pci/devices/*/msi_bus` will tell you whether MSIs are enabled (1)
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400282or disabled (0). If 0 is found in any of the msi_bus files belonging
283to bridges between the PCI root and the device, MSIs are disabled.
Brice Goglin0cc2b372006-10-05 10:24:42 +0200284
Matthew Wilcoxc41ade22009-03-17 08:54:05 -0400285It is also worth checking the device driver to see whether it supports MSIs.
Zenghui Yu7730c3b2019-12-30 21:14:28 +0800286For example, it may contain calls to pci_alloc_irq_vectors() with the
Christoph Hellwig4fe03952017-01-09 21:37:40 +0100287PCI_IRQ_MSI or PCI_IRQ_MSIX flags.